1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 1995-2003 Russell King 4 * 2001-2002 Keith Owens 5 * 6 * Generate definitions needed by assembly language modules. 7 * This code generates raw asm output which is post-processed to extract 8 * and format the required data. 9 */ 10 #include <linux/compiler.h> 11 #include <linux/sched.h> 12 #include <linux/mm.h> 13 #include <linux/dma-mapping.h> 14 #include <asm/cacheflush.h> 15 #include <asm/kexec-internal.h> 16 #include <asm/glue-df.h> 17 #include <asm/glue-pf.h> 18 #include <asm/mach/arch.h> 19 #include <asm/thread_info.h> 20 #include <asm/memory.h> 21 #include <asm/mpu.h> 22 #include <asm/procinfo.h> 23 #include <asm/suspend.h> 24 #include <asm/vdso_datapage.h> 25 #include <asm/hardware/cache-l2x0.h> 26 #include <linux/kbuild.h> 27 #include <linux/arm-smccc.h> 28 #include "signal.h" 29 30 /* 31 * Make sure that the compiler and target are compatible. 32 */ 33 #if defined(__APCS_26__) 34 #error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32 35 #endif 36 37 int main(void) 38 { 39 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm)); 40 #ifdef CONFIG_STACKPROTECTOR 41 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary)); 42 #endif 43 BLANK(); 44 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); 45 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); 46 DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); 47 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain)); 48 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context)); 49 DEFINE(TI_ABI_SYSCALL, offsetof(struct thread_info, abi_syscall)); 50 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp)); 51 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value)); 52 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate)); 53 #ifdef CONFIG_VFP 54 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate)); 55 #ifdef CONFIG_SMP 56 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu)); 57 #endif 58 #endif 59 DEFINE(SOFTIRQ_DISABLE_OFFSET,SOFTIRQ_DISABLE_OFFSET); 60 #ifdef CONFIG_ARM_THUMBEE 61 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state)); 62 #endif 63 #ifdef CONFIG_IWMMXT 64 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt)); 65 #endif 66 BLANK(); 67 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0)); 68 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1)); 69 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2)); 70 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3)); 71 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4)); 72 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5)); 73 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6)); 74 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7)); 75 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8)); 76 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9)); 77 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10)); 78 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp)); 79 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip)); 80 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp)); 81 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr)); 82 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc)); 83 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr)); 84 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0)); 85 DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs)); 86 DEFINE(SVC_DACR, offsetof(struct svc_pt_regs, dacr)); 87 DEFINE(SVC_REGS_SIZE, sizeof(struct svc_pt_regs)); 88 BLANK(); 89 DEFINE(SIGFRAME_RC3_OFFSET, offsetof(struct sigframe, retcode[3])); 90 DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3])); 91 BLANK(); 92 #ifdef CONFIG_CACHE_L2X0 93 DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base)); 94 DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl)); 95 DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency)); 96 DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency)); 97 DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start)); 98 DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end)); 99 DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl)); 100 DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl)); 101 BLANK(); 102 #endif 103 #ifdef CONFIG_CPU_HAS_ASID 104 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter)); 105 BLANK(); 106 #endif 107 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm)); 108 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags)); 109 BLANK(); 110 DEFINE(VM_EXEC, VM_EXEC); 111 BLANK(); 112 DEFINE(PAGE_SZ, PAGE_SIZE); 113 BLANK(); 114 DEFINE(SYS_ERROR0, 0x9f0000); 115 BLANK(); 116 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc)); 117 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr)); 118 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name)); 119 BLANK(); 120 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list)); 121 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); 122 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags)); 123 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags)); 124 BLANK(); 125 #ifdef MULTI_DABORT 126 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort)); 127 #endif 128 #ifdef MULTI_PABORT 129 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort)); 130 #endif 131 #ifdef MULTI_CPU 132 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size)); 133 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend)); 134 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume)); 135 #endif 136 #ifdef MULTI_CACHE 137 DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all)); 138 #endif 139 #ifdef CONFIG_ARM_CPU_SUSPEND 140 DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp)); 141 DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys)); 142 DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash)); 143 #endif 144 DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); 145 DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); 146 BLANK(); 147 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); 148 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); 149 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE); 150 BLANK(); 151 DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER); 152 DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE); 153 BLANK(); 154 #ifdef CONFIG_VDSO 155 DEFINE(VDSO_DATA_SIZE, sizeof(union vdso_data_store)); 156 #endif 157 BLANK(); 158 #ifdef CONFIG_ARM_MPU 159 DEFINE(MPU_RNG_INFO_RNGS, offsetof(struct mpu_rgn_info, rgns)); 160 DEFINE(MPU_RNG_INFO_USED, offsetof(struct mpu_rgn_info, used)); 161 162 DEFINE(MPU_RNG_SIZE, sizeof(struct mpu_rgn)); 163 DEFINE(MPU_RGN_DRBAR, offsetof(struct mpu_rgn, drbar)); 164 DEFINE(MPU_RGN_DRSR, offsetof(struct mpu_rgn, drsr)); 165 DEFINE(MPU_RGN_DRACR, offsetof(struct mpu_rgn, dracr)); 166 DEFINE(MPU_RGN_PRBAR, offsetof(struct mpu_rgn, prbar)); 167 DEFINE(MPU_RGN_PRLAR, offsetof(struct mpu_rgn, prlar)); 168 #endif 169 DEFINE(KEXEC_START_ADDR, offsetof(struct kexec_relocate_data, kexec_start_address)); 170 DEFINE(KEXEC_INDIR_PAGE, offsetof(struct kexec_relocate_data, kexec_indirection_page)); 171 DEFINE(KEXEC_MACH_TYPE, offsetof(struct kexec_relocate_data, kexec_mach_type)); 172 DEFINE(KEXEC_R2, offsetof(struct kexec_relocate_data, kexec_r2)); 173 return 0; 174 } 175