1 /* 2 * Copyright (C) 1995-2003 Russell King 3 * 2001-2002 Keith Owens 4 * 5 * Generate definitions needed by assembly language modules. 6 * This code generates raw asm output which is post-processed to extract 7 * and format the required data. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 #include <linux/sched.h> 14 #include <linux/mm.h> 15 #include <linux/dma-mapping.h> 16 #ifdef CONFIG_KVM_ARM_HOST 17 #include <linux/kvm_host.h> 18 #endif 19 #include <asm/cacheflush.h> 20 #include <asm/glue-df.h> 21 #include <asm/glue-pf.h> 22 #include <asm/mach/arch.h> 23 #include <asm/thread_info.h> 24 #include <asm/memory.h> 25 #include <asm/procinfo.h> 26 #include <asm/hardware/cache-l2x0.h> 27 #include <linux/kbuild.h> 28 29 /* 30 * Make sure that the compiler and target are compatible. 31 */ 32 #if defined(__APCS_26__) 33 #error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32 34 #endif 35 /* 36 * GCC 3.0, 3.1: general bad code generation. 37 * GCC 3.2.0: incorrect function argument offset calculation. 38 * GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c 39 * (http://gcc.gnu.org/PR8896) and incorrect structure 40 * initialisation in fs/jffs2/erase.c 41 */ 42 #if (__GNUC__ == 3 && __GNUC_MINOR__ < 3) 43 #error Your compiler is too buggy; it is known to miscompile kernels. 44 #error Known good compilers: 3.3 45 #endif 46 47 int main(void) 48 { 49 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm)); 50 #ifdef CONFIG_CC_STACKPROTECTOR 51 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary)); 52 #endif 53 BLANK(); 54 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); 55 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); 56 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); 57 DEFINE(TI_TASK, offsetof(struct thread_info, task)); 58 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain)); 59 DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); 60 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain)); 61 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context)); 62 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp)); 63 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value)); 64 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate)); 65 #ifdef CONFIG_VFP 66 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate)); 67 #ifdef CONFIG_SMP 68 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu)); 69 #endif 70 #endif 71 #ifdef CONFIG_ARM_THUMBEE 72 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state)); 73 #endif 74 #ifdef CONFIG_IWMMXT 75 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt)); 76 #endif 77 #ifdef CONFIG_CRUNCH 78 DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate)); 79 #endif 80 BLANK(); 81 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0)); 82 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1)); 83 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2)); 84 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3)); 85 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4)); 86 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5)); 87 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6)); 88 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7)); 89 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8)); 90 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9)); 91 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10)); 92 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp)); 93 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip)); 94 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp)); 95 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr)); 96 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc)); 97 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr)); 98 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0)); 99 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs)); 100 BLANK(); 101 #ifdef CONFIG_CACHE_L2X0 102 DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base)); 103 DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl)); 104 DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency)); 105 DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency)); 106 DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start)); 107 DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end)); 108 DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl)); 109 DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl)); 110 BLANK(); 111 #endif 112 #ifdef CONFIG_CPU_HAS_ASID 113 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id)); 114 BLANK(); 115 #endif 116 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm)); 117 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags)); 118 BLANK(); 119 DEFINE(VM_EXEC, VM_EXEC); 120 BLANK(); 121 DEFINE(PAGE_SZ, PAGE_SIZE); 122 BLANK(); 123 DEFINE(SYS_ERROR0, 0x9f0000); 124 BLANK(); 125 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc)); 126 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr)); 127 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name)); 128 BLANK(); 129 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list)); 130 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); 131 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags)); 132 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags)); 133 BLANK(); 134 #ifdef MULTI_DABORT 135 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort)); 136 #endif 137 #ifdef MULTI_PABORT 138 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort)); 139 #endif 140 #ifdef MULTI_CPU 141 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size)); 142 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend)); 143 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume)); 144 #endif 145 #ifdef MULTI_CACHE 146 DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all)); 147 #endif 148 BLANK(); 149 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); 150 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); 151 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE); 152 #ifdef CONFIG_KVM_ARM_HOST 153 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm)); 154 DEFINE(VCPU_MIDR, offsetof(struct kvm_vcpu, arch.midr)); 155 DEFINE(VCPU_CP15, offsetof(struct kvm_vcpu, arch.cp15)); 156 DEFINE(VCPU_VFP_GUEST, offsetof(struct kvm_vcpu, arch.vfp_guest)); 157 DEFINE(VCPU_VFP_HOST, offsetof(struct kvm_vcpu, arch.vfp_host)); 158 DEFINE(VCPU_REGS, offsetof(struct kvm_vcpu, arch.regs)); 159 DEFINE(VCPU_USR_REGS, offsetof(struct kvm_vcpu, arch.regs.usr_regs)); 160 DEFINE(VCPU_SVC_REGS, offsetof(struct kvm_vcpu, arch.regs.svc_regs)); 161 DEFINE(VCPU_ABT_REGS, offsetof(struct kvm_vcpu, arch.regs.abt_regs)); 162 DEFINE(VCPU_UND_REGS, offsetof(struct kvm_vcpu, arch.regs.und_regs)); 163 DEFINE(VCPU_IRQ_REGS, offsetof(struct kvm_vcpu, arch.regs.irq_regs)); 164 DEFINE(VCPU_FIQ_REGS, offsetof(struct kvm_vcpu, arch.regs.fiq_regs)); 165 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_pc)); 166 DEFINE(VCPU_CPSR, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_cpsr)); 167 DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines)); 168 DEFINE(VCPU_HSR, offsetof(struct kvm_vcpu, arch.hsr)); 169 DEFINE(VCPU_HxFAR, offsetof(struct kvm_vcpu, arch.hxfar)); 170 DEFINE(VCPU_HPFAR, offsetof(struct kvm_vcpu, arch.hpfar)); 171 DEFINE(VCPU_HYP_PC, offsetof(struct kvm_vcpu, arch.hyp_pc)); 172 #ifdef CONFIG_KVM_ARM_VGIC 173 DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu)); 174 DEFINE(VGIC_CPU_HCR, offsetof(struct vgic_cpu, vgic_hcr)); 175 DEFINE(VGIC_CPU_VMCR, offsetof(struct vgic_cpu, vgic_vmcr)); 176 DEFINE(VGIC_CPU_MISR, offsetof(struct vgic_cpu, vgic_misr)); 177 DEFINE(VGIC_CPU_EISR, offsetof(struct vgic_cpu, vgic_eisr)); 178 DEFINE(VGIC_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_elrsr)); 179 DEFINE(VGIC_CPU_APR, offsetof(struct vgic_cpu, vgic_apr)); 180 DEFINE(VGIC_CPU_LR, offsetof(struct vgic_cpu, vgic_lr)); 181 DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr)); 182 #ifdef CONFIG_KVM_ARM_TIMER 183 DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl)); 184 DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval)); 185 DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff)); 186 DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled)); 187 #endif 188 DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base)); 189 #endif 190 DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr)); 191 #endif 192 return 0; 193 } 194