1 /* 2 * arch/arm/include/asm/ptrace.h 3 * 4 * Copyright (C) 1996-2003 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #ifndef _UAPI__ASM_ARM_PTRACE_H 11 #define _UAPI__ASM_ARM_PTRACE_H 12 13 #include <asm/hwcap.h> 14 15 #define PTRACE_GETREGS 12 16 #define PTRACE_SETREGS 13 17 #define PTRACE_GETFPREGS 14 18 #define PTRACE_SETFPREGS 15 19 /* PTRACE_ATTACH is 16 */ 20 /* PTRACE_DETACH is 17 */ 21 #define PTRACE_GETWMMXREGS 18 22 #define PTRACE_SETWMMXREGS 19 23 /* 20 is unused */ 24 #define PTRACE_OLDSETOPTIONS 21 25 #define PTRACE_GET_THREAD_AREA 22 26 #define PTRACE_SET_SYSCALL 23 27 /* PTRACE_SYSCALL is 24 */ 28 #define PTRACE_GETCRUNCHREGS 25 29 #define PTRACE_SETCRUNCHREGS 26 30 #define PTRACE_GETVFPREGS 27 31 #define PTRACE_SETVFPREGS 28 32 #define PTRACE_GETHBPREGS 29 33 #define PTRACE_SETHBPREGS 30 34 35 /* 36 * PSR bits 37 */ 38 #define USR26_MODE 0x00000000 39 #define FIQ26_MODE 0x00000001 40 #define IRQ26_MODE 0x00000002 41 #define SVC26_MODE 0x00000003 42 #define USR_MODE 0x00000010 43 #define FIQ_MODE 0x00000011 44 #define IRQ_MODE 0x00000012 45 #define SVC_MODE 0x00000013 46 #define ABT_MODE 0x00000017 47 #define HYP_MODE 0x0000001a 48 #define UND_MODE 0x0000001b 49 #define SYSTEM_MODE 0x0000001f 50 #define MODE32_BIT 0x00000010 51 #define MODE_MASK 0x0000001f 52 #define PSR_T_BIT 0x00000020 53 #define PSR_F_BIT 0x00000040 54 #define PSR_I_BIT 0x00000080 55 #define PSR_A_BIT 0x00000100 56 #define PSR_E_BIT 0x00000200 57 #define PSR_J_BIT 0x01000000 58 #define PSR_Q_BIT 0x08000000 59 #define PSR_V_BIT 0x10000000 60 #define PSR_C_BIT 0x20000000 61 #define PSR_Z_BIT 0x40000000 62 #define PSR_N_BIT 0x80000000 63 64 /* 65 * Groups of PSR bits 66 */ 67 #define PSR_f 0xff000000 /* Flags */ 68 #define PSR_s 0x00ff0000 /* Status */ 69 #define PSR_x 0x0000ff00 /* Extension */ 70 #define PSR_c 0x000000ff /* Control */ 71 72 /* 73 * ARMv7 groups of PSR bits 74 */ 75 #define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */ 76 #define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */ 77 #define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 78 #define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */ 79 80 /* 81 * Default endianness state 82 */ 83 #ifdef CONFIG_CPU_ENDIAN_BE8 84 #define PSR_ENDSTATE PSR_E_BIT 85 #else 86 #define PSR_ENDSTATE 0 87 #endif 88 89 /* 90 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a 91 * process is located in memory. 92 */ 93 #define PT_TEXT_ADDR 0x10000 94 #define PT_DATA_ADDR 0x10004 95 #define PT_TEXT_END_ADDR 0x10008 96 97 #ifndef __ASSEMBLY__ 98 99 /* 100 * This struct defines the way the registers are stored on the 101 * stack during a system call. Note that sizeof(struct pt_regs) 102 * has to be a multiple of 8. 103 */ 104 #ifndef __KERNEL__ 105 struct pt_regs { 106 long uregs[18]; 107 }; 108 #endif /* __KERNEL__ */ 109 110 #define ARM_cpsr uregs[16] 111 #define ARM_pc uregs[15] 112 #define ARM_lr uregs[14] 113 #define ARM_sp uregs[13] 114 #define ARM_ip uregs[12] 115 #define ARM_fp uregs[11] 116 #define ARM_r10 uregs[10] 117 #define ARM_r9 uregs[9] 118 #define ARM_r8 uregs[8] 119 #define ARM_r7 uregs[7] 120 #define ARM_r6 uregs[6] 121 #define ARM_r5 uregs[5] 122 #define ARM_r4 uregs[4] 123 #define ARM_r3 uregs[3] 124 #define ARM_r2 uregs[2] 125 #define ARM_r1 uregs[1] 126 #define ARM_r0 uregs[0] 127 #define ARM_ORIG_r0 uregs[17] 128 129 /* 130 * The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS 131 * and core dumps. 132 */ 133 #define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ ) 134 135 136 #endif /* __ASSEMBLY__ */ 137 138 #endif /* _UAPI__ASM_ARM_PTRACE_H */ 139