1fa04e4dbSRob Herring/* arch/arm/mach-realview/include/mach/debug-macro.S 2fa04e4dbSRob Herring * 3fa04e4dbSRob Herring * Debugging macro include header 4fa04e4dbSRob Herring * 5fa04e4dbSRob Herring * Copyright (C) 1994-1999 Russell King 6fa04e4dbSRob Herring * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks 7fa04e4dbSRob Herring * 8fa04e4dbSRob Herring * This program is free software; you can redistribute it and/or modify 9fa04e4dbSRob Herring * it under the terms of the GNU General Public License version 2 as 10fa04e4dbSRob Herring * published by the Free Software Foundation. 11fa04e4dbSRob Herring */ 12fa04e4dbSRob Herring 13fa04e4dbSRob Herring#define DEBUG_LL_PHYS_BASE 0x10000000 14fa04e4dbSRob Herring#define DEBUG_LL_UART_OFFSET 0x00009000 15fa04e4dbSRob Herring 16fa04e4dbSRob Herring#define DEBUG_LL_PHYS_BASE_RS1 0x1c000000 17fa04e4dbSRob Herring#define DEBUG_LL_UART_OFFSET_RS1 0x00090000 18fa04e4dbSRob Herring 19fa04e4dbSRob Herring#define DEBUG_LL_VIRT_BASE 0xf8000000 20fa04e4dbSRob Herring 21fa04e4dbSRob Herring#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT) 22fa04e4dbSRob Herring 23fa04e4dbSRob Herring .macro addruart,rp,rv,tmp 24d892a917SArnd Bergmann .arch armv7-a 25fa04e4dbSRob Herring 26fa04e4dbSRob Herring @ Make an educated guess regarding the memory map: 27852663d9SPawel Moll @ - the original A9 core tile (based on ARM Cortex-A9 r0p1) 28852663d9SPawel Moll @ should use UART at 0x10009000 29fa04e4dbSRob Herring @ - all other (RS1 complaint) tiles use UART mapped 30fa04e4dbSRob Herring @ at 0x1c090000 31852663d9SPawel Moll mrc p15, 0, \rp, c0, c0, 0 32852663d9SPawel Moll movw \rv, #0xc091 33852663d9SPawel Moll movt \rv, #0x410f 34852663d9SPawel Moll cmp \rp, \rv 35fa04e4dbSRob Herring 36fa04e4dbSRob Herring @ Original memory map 37fa04e4dbSRob Herring moveq \rp, #DEBUG_LL_UART_OFFSET 38fa04e4dbSRob Herring orreq \rv, \rp, #DEBUG_LL_VIRT_BASE 39fa04e4dbSRob Herring orreq \rp, \rp, #DEBUG_LL_PHYS_BASE 40fa04e4dbSRob Herring 41fa04e4dbSRob Herring @ RS1 memory map 42fa04e4dbSRob Herring movne \rp, #DEBUG_LL_UART_OFFSET_RS1 43fa04e4dbSRob Herring orrne \rv, \rp, #DEBUG_LL_VIRT_BASE 44fa04e4dbSRob Herring orrne \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1 45fa04e4dbSRob Herring 46fa04e4dbSRob Herring .endm 47fa04e4dbSRob Herring 48fa04e4dbSRob Herring#include <asm/hardware/debug-pl01x.S> 49fa04e4dbSRob Herring 50fa04e4dbSRob Herring#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9) 51fa04e4dbSRob Herring 52fa04e4dbSRob Herring .macro addruart,rp,rv,tmp 53fa04e4dbSRob Herring mov \rp, #DEBUG_LL_UART_OFFSET 54fa04e4dbSRob Herring orr \rv, \rp, #DEBUG_LL_VIRT_BASE 55fa04e4dbSRob Herring orr \rp, \rp, #DEBUG_LL_PHYS_BASE 56fa04e4dbSRob Herring .endm 57fa04e4dbSRob Herring 58fa04e4dbSRob Herring#include <asm/hardware/debug-pl01x.S> 59fa04e4dbSRob Herring 60fa04e4dbSRob Herring#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1) 61fa04e4dbSRob Herring 62fa04e4dbSRob Herring .macro addruart,rp,rv,tmp 63fa04e4dbSRob Herring mov \rp, #DEBUG_LL_UART_OFFSET_RS1 64fa04e4dbSRob Herring orr \rv, \rp, #DEBUG_LL_VIRT_BASE 65fa04e4dbSRob Herring orr \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1 66fa04e4dbSRob Herring .endm 67fa04e4dbSRob Herring 68fa04e4dbSRob Herring#include <asm/hardware/debug-pl01x.S> 69fa04e4dbSRob Herring 70fa04e4dbSRob Herring#else /* CONFIG_DEBUG_LL_UART_NONE */ 71fa04e4dbSRob Herring 72fa04e4dbSRob Herring .macro addruart, rp, rv, tmp 73fa04e4dbSRob Herring /* Safe dummy values */ 74fa04e4dbSRob Herring mov \rp, #0 75fa04e4dbSRob Herring mov \rv, #DEBUG_LL_VIRT_BASE 76fa04e4dbSRob Herring .endm 77fa04e4dbSRob Herring 78fa04e4dbSRob Herring .macro senduart,rd,rx 79fa04e4dbSRob Herring .endm 80fa04e4dbSRob Herring 81fa04e4dbSRob Herring .macro waituart,rd,rx 82fa04e4dbSRob Herring .endm 83fa04e4dbSRob Herring 84fa04e4dbSRob Herring .macro busyuart,rd,rx 85fa04e4dbSRob Herring .endm 86fa04e4dbSRob Herring 87fa04e4dbSRob Herring#endif 88