1f87b95ddSLinus Walleij/* 2f87b95ddSLinus Walleij * Debugging macro include header 3f87b95ddSLinus Walleij * 4f87b95ddSLinus Walleij * Copyright (C) 2009 ST-Ericsson 5f87b95ddSLinus Walleij * 6f87b95ddSLinus Walleij * This program is free software; you can redistribute it and/or modify 7f87b95ddSLinus Walleij * it under the terms of the GNU General Public License version 2 as 8f87b95ddSLinus Walleij * published by the Free Software Foundation. 9f87b95ddSLinus Walleij * 10f87b95ddSLinus Walleij */ 119bed3e05SLinus Walleij 12f87b95ddSLinus Walleij 13f87b95ddSLinus Walleij#if CONFIG_UX500_DEBUG_UART > 2 14f87b95ddSLinus Walleij#error Invalid Ux500 debug UART 15f87b95ddSLinus Walleij#endif 16f87b95ddSLinus Walleij 17f87b95ddSLinus Walleij/* 18f87b95ddSLinus Walleij * DEBUG_LL only works if only one SOC is built in. We don't use #else below 19f87b95ddSLinus Walleij * in order to get "__UX500_UART redefined" warnings if more than one SOC is 20f87b95ddSLinus Walleij * built, so that there's some hint during the build that something is wrong. 21f87b95ddSLinus Walleij */ 22f87b95ddSLinus Walleij 23f87b95ddSLinus Walleij#ifdef CONFIG_UX500_SOC_DB8500 249bed3e05SLinus Walleij#define U8500_UART0_PHYS_BASE (0x80120000) 259bed3e05SLinus Walleij#define U8500_UART1_PHYS_BASE (0x80121000) 269bed3e05SLinus Walleij#define U8500_UART2_PHYS_BASE (0x80007000) 279bed3e05SLinus Walleij#define U8500_UART0_VIRT_BASE (0xa8120000) 289bed3e05SLinus Walleij#define U8500_UART1_VIRT_BASE (0xa8121000) 299bed3e05SLinus Walleij#define U8500_UART2_VIRT_BASE (0xa8007000) 309bed3e05SLinus Walleij#define __UX500_PHYS_UART(n) U8500_UART##n##_PHYS_BASE 319bed3e05SLinus Walleij#define __UX500_VIRT_UART(n) U8500_UART##n##_VIRT_BASE 32f87b95ddSLinus Walleij#endif 33f87b95ddSLinus Walleij 349bed3e05SLinus Walleij#if !defined(__UX500_PHYS_UART) || !defined(__UX500_VIRT_UART) 35f87b95ddSLinus Walleij#error Unknown SOC 36f87b95ddSLinus Walleij#endif 37f87b95ddSLinus Walleij 389bed3e05SLinus Walleij#define UX500_PHYS_UART(n) __UX500_PHYS_UART(n) 399bed3e05SLinus Walleij#define UX500_VIRT_UART(n) __UX500_VIRT_UART(n) 409bed3e05SLinus Walleij#define UART_PHYS_BASE UX500_PHYS_UART(CONFIG_UX500_DEBUG_UART) 419bed3e05SLinus Walleij#define UART_VIRT_BASE UX500_VIRT_UART(CONFIG_UX500_DEBUG_UART) 42f87b95ddSLinus Walleij 43f87b95ddSLinus Walleij .macro addruart, rp, rv, tmp 449bed3e05SLinus Walleij ldr \rp, =UART_PHYS_BASE @ no, physical address 459bed3e05SLinus Walleij ldr \rv, =UART_VIRT_BASE @ yes, virtual address 46f87b95ddSLinus Walleij .endm 47f87b95ddSLinus Walleij 48f87b95ddSLinus Walleij#include <asm/hardware/debug-pl01x.S> 49