1d2912cb1SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 2808b7e07STony Lindgren/* 3808b7e07STony Lindgren * Debugging macro include header 4808b7e07STony Lindgren * 5808b7e07STony Lindgren * Copyright (C) 1994-1999 Russell King 6808b7e07STony Lindgren * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks 7808b7e07STony Lindgren*/ 8808b7e07STony Lindgren 9808b7e07STony Lindgren#include <linux/serial_reg.h> 10808b7e07STony Lindgren 11808b7e07STony Lindgren/* External port on Zoom2/3 */ 12808b7e07STony Lindgren#define ZOOM_UART_BASE 0x10000000 13808b7e07STony Lindgren#define ZOOM_UART_VIRT 0xfa400000 14808b7e07STony Lindgren 15808b7e07STony Lindgren#define OMAP_PORT_SHIFT 2 16808b7e07STony Lindgren#define ZOOM_PORT_SHIFT 1 17808b7e07STony Lindgren 18808b7e07STony Lindgren#define UART_OFFSET(addr) ((addr) & 0x00ffffff) 19808b7e07STony Lindgren 20808b7e07STony Lindgren .pushsection .data 211abd3502SRussell King .align 2 22808b7e07STony Lindgrenomap_uart_phys: .word 0 23808b7e07STony Lindgrenomap_uart_virt: .word 0 24808b7e07STony Lindgrenomap_uart_lsr: .word 0 25808b7e07STony Lindgren .popsection 26808b7e07STony Lindgren 27808b7e07STony Lindgren .macro addruart, rp, rv, tmp 28808b7e07STony Lindgren 29808b7e07STony Lindgren /* Use omap_uart_phys/virt if already configured */ 30808b7e07STony Lindgren10: adr \rp, 99f @ get effective addr of 99f 31808b7e07STony Lindgren ldr \rv, [\rp] @ get absolute addr of 99f 32808b7e07STony Lindgren sub \rv, \rv, \rp @ offset between the two 33808b7e07STony Lindgren ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys 34808b7e07STony Lindgren sub \tmp, \rp, \rv @ make it effective 35808b7e07STony Lindgren ldr \rp, [\tmp, #0] @ omap_uart_phys 36808b7e07STony Lindgren ldr \rv, [\tmp, #4] @ omap_uart_virt 37808b7e07STony Lindgren cmp \rp, #0 @ is port configured? 38808b7e07STony Lindgren cmpne \rv, #0 39808b7e07STony Lindgren bne 100f @ already configured 40808b7e07STony Lindgren 41808b7e07STony Lindgren /* Configure the UART offset from the phys/virt base */ 42808b7e07STony Lindgren#ifdef CONFIG_DEBUG_ZOOM_UART 43808b7e07STony Lindgren ldr \rp, =ZOOM_UART_BASE 44808b7e07STony Lindgren str \rp, [\tmp, #0] @ omap_uart_phys 45808b7e07STony Lindgren ldr \rp, =ZOOM_UART_VIRT 46808b7e07STony Lindgren str \rp, [\tmp, #4] @ omap_uart_virt 47808b7e07STony Lindgren mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) 48808b7e07STony Lindgren str \rp, [\tmp, #8] @ omap_uart_lsr 49808b7e07STony Lindgren#endif 50808b7e07STony Lindgren b 10b 51808b7e07STony Lindgren 52808b7e07STony Lindgren .align 53808b7e07STony Lindgren99: .word . 54808b7e07STony Lindgren .word omap_uart_phys 55808b7e07STony Lindgren .ltorg 56808b7e07STony Lindgren 57808b7e07STony Lindgren100: /* Pass the UART_LSR reg address */ 58808b7e07STony Lindgren ldr \tmp, [\tmp, #8] @ omap_uart_lsr 59808b7e07STony Lindgren add \rp, \rp, \tmp 60808b7e07STony Lindgren add \rv, \rv, \tmp 61808b7e07STony Lindgren .endm 62808b7e07STony Lindgren 63808b7e07STony Lindgren .macro senduart,rd,rx 64808b7e07STony Lindgren orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset 65808b7e07STony Lindgren bic \rx, \rx, #0xff @ get base (THR) reg address 66808b7e07STony Lindgren strb \rd, [\rx] @ send lower byte of rd 67808b7e07STony Lindgren orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR) 68808b7e07STony Lindgren bic \rd, \rd, #(0xff << 24) @ restore original rd 69808b7e07STony Lindgren .endm 70808b7e07STony Lindgren 71808b7e07STony Lindgren .macro busyuart,rd,rx 72808b7e07STony Lindgren1001: ldrb \rd, [\rx] @ rx contains UART_LSR address 73808b7e07STony Lindgren and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 74808b7e07STony Lindgren teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 75808b7e07STony Lindgren bne 1001b 76808b7e07STony Lindgren .endm 77808b7e07STony Lindgren 782c50a570SLinus Walleij .macro waituartcts,rd,rx 792c50a570SLinus Walleij .endm 802c50a570SLinus Walleij 812c50a570SLinus Walleij .macro waituarttxrdy,rd,rx 82808b7e07STony Lindgren .endm 83