xref: /openbmc/linux/arch/arm/include/debug/msm.S (revision d9fd5a71)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *
4 * Copyright (C) 2007 Google, Inc.
5 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
6 * Author: Brian Swetland <swetland@google.com>
7 */
8
9	.macro	addruart, rp, rv, tmp
10	ldr	\rp, =CONFIG_DEBUG_UART_PHYS
11	ldr	\rv, =CONFIG_DEBUG_UART_VIRT
12	.endm
13
14	.macro	senduart, rd, rx
15ARM_BE8(rev	\rd, \rd )
16	@ Write the 1 character to UARTDM_TF
17	str	\rd, [\rx, #0x70]
18	.endm
19
20	.macro	waituartcts,rd,rx
21	.endm
22
23	.macro	waituarttxrdy, rd, rx
24	@ check for TX_EMT in UARTDM_SR
25	ldr	\rd, [\rx, #0x08]
26ARM_BE8(rev     \rd, \rd )
27	tst	\rd, #0x08
28	bne	1002f
29	@ wait for TXREADY in UARTDM_ISR
301001:	ldr	\rd, [\rx, #0x14]
31ARM_BE8(rev     \rd, \rd )
32	tst	\rd, #0x80
33	beq 	1001b
341002:
35	@ Clear TX_READY by writing to the UARTDM_CR register
36	mov	\rd, #0x300
37ARM_BE8(rev     \rd, \rd )
38	str	\rd, [\rx, #0x10]
39	@ Write 0x1 to NCF register
40	mov 	\rd, #0x1
41ARM_BE8(rev     \rd, \rd )
42	str	\rd, [\rx, #0x40]
43	@ UARTDM reg. Read to induce delay
44	ldr	\rd, [\rx, #0x08]
45	.endm
46
47	.macro	busyuart, rd, rx
48	.endm
49