16dde5ac5SShawn Guo/* arch/arm/mach-imx/include/mach/debug-macro.S 26dde5ac5SShawn Guo * 36dde5ac5SShawn Guo * Debugging macro include header 46dde5ac5SShawn Guo * 56dde5ac5SShawn Guo * Copyright (C) 1994-1999 Russell King 66dde5ac5SShawn Guo * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks 76dde5ac5SShawn Guo * 86dde5ac5SShawn Guo * This program is free software; you can redistribute it and/or modify 96dde5ac5SShawn Guo * it under the terms of the GNU General Public License version 2 as 106dde5ac5SShawn Guo * published by the Free Software Foundation. 116dde5ac5SShawn Guo * 126dde5ac5SShawn Guo */ 136dde5ac5SShawn Guo#ifdef CONFIG_DEBUG_IMX1_UART 146dde5ac5SShawn Guo#define UART_PADDR 0x00206000 156dde5ac5SShawn Guo#elif defined (CONFIG_DEBUG_IMX25_UART) 166dde5ac5SShawn Guo#define UART_PADDR 0x43f90000 176dde5ac5SShawn Guo#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART) 186dde5ac5SShawn Guo#define UART_PADDR 0x1000a000 196dde5ac5SShawn Guo#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART) 206dde5ac5SShawn Guo#define UART_PADDR 0x43f90000 216dde5ac5SShawn Guo#elif defined (CONFIG_DEBUG_IMX51_UART) 226dde5ac5SShawn Guo#define UART_PADDR 0x73fbc000 236dde5ac5SShawn Guo#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) 246dde5ac5SShawn Guo#define UART_PADDR 0x53fbc000 256dde5ac5SShawn Guo#elif defined (CONFIG_DEBUG_IMX6Q_UART2) 266dde5ac5SShawn Guo#define UART_PADDR 0x021e8000 276dde5ac5SShawn Guo#elif defined (CONFIG_DEBUG_IMX6Q_UART4) 286dde5ac5SShawn Guo#define UART_PADDR 0x021f0000 296dde5ac5SShawn Guo#endif 306dde5ac5SShawn Guo 316dde5ac5SShawn Guo/* 326dde5ac5SShawn Guo * FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to 336dde5ac5SShawn Guo * stay sync with that. It's hard to maintain, and should be fixed 346dde5ac5SShawn Guo * globally for multi-platform build to use a fixed virtual address 356dde5ac5SShawn Guo * for low-level debug uart port across platforms. 366dde5ac5SShawn Guo */ 376dde5ac5SShawn Guo#define IMX_IO_P2V(x) ( \ 386dde5ac5SShawn Guo (((x) & 0x80000000) >> 7) | \ 396dde5ac5SShawn Guo (0xf4000000 + \ 406dde5ac5SShawn Guo (((x) & 0x50000000) >> 6) + \ 416dde5ac5SShawn Guo (((x) & 0x0b000000) >> 4) + \ 426dde5ac5SShawn Guo (((x) & 0x000fffff)))) 436dde5ac5SShawn Guo 446dde5ac5SShawn Guo#define UART_VADDR IMX_IO_P2V(UART_PADDR) 456dde5ac5SShawn Guo 466dde5ac5SShawn Guo .macro addruart, rp, rv, tmp 476dde5ac5SShawn Guo ldr \rp, =UART_PADDR @ physical 486dde5ac5SShawn Guo ldr \rv, =UART_VADDR @ virtual 496dde5ac5SShawn Guo .endm 506dde5ac5SShawn Guo 516dde5ac5SShawn Guo .macro senduart,rd,rx 526dde5ac5SShawn Guo str \rd, [\rx, #0x40] @ TXDATA 536dde5ac5SShawn Guo .endm 546dde5ac5SShawn Guo 556dde5ac5SShawn Guo .macro waituart,rd,rx 566dde5ac5SShawn Guo .endm 576dde5ac5SShawn Guo 586dde5ac5SShawn Guo .macro busyuart,rd,rx 596dde5ac5SShawn Guo1002: ldr \rd, [\rx, #0x98] @ SR2 606dde5ac5SShawn Guo tst \rd, #1 << 3 @ TXDC 616dde5ac5SShawn Guo beq 1002b @ wait until transmit done 626dde5ac5SShawn Guo .endm 63