1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * arch/arm/include/debug/icedcc.S 4 * 5 * Copyright (C) 1994-1999 Russell King 6 */ 7 8 @@ debug using ARM EmbeddedICE DCC channel 9 10 .macro addruart, rp, rv, tmp 11 .endm 12 13#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) 14 15 .macro senduart, rd, rx 16 mcr p14, 0, \rd, c0, c5, 0 17 .endm 18 19 .macro busyuart, rd, rx 201001: 21 mrc p14, 0, \rx, c0, c1, 0 22 tst \rx, #0x20000000 23 beq 1001b 24 .endm 25 26 .macro waituart, rd, rx 27 mov \rd, #0x2000000 281001: 29 subs \rd, \rd, #1 30 bmi 1002f 31 mrc p14, 0, \rx, c0, c1, 0 32 tst \rx, #0x20000000 33 bne 1001b 341002: 35 .endm 36 37#elif defined(CONFIG_CPU_XSCALE) 38 39 .macro senduart, rd, rx 40 mcr p14, 0, \rd, c8, c0, 0 41 .endm 42 43 .macro busyuart, rd, rx 441001: 45 mrc p14, 0, \rx, c14, c0, 0 46 tst \rx, #0x10000000 47 beq 1001b 48 .endm 49 50 .macro waituart, rd, rx 51 mov \rd, #0x10000000 521001: 53 subs \rd, \rd, #1 54 bmi 1002f 55 mrc p14, 0, \rx, c14, c0, 0 56 tst \rx, #0x10000000 57 bne 1001b 581002: 59 .endm 60 61#else 62 63 .macro senduart, rd, rx 64 mcr p14, 0, \rd, c1, c0, 0 65 .endm 66 67 .macro busyuart, rd, rx 681001: 69 mrc p14, 0, \rx, c0, c0, 0 70 tst \rx, #2 71 beq 1001b 72 73 .endm 74 75 .macro waituart, rd, rx 76 mov \rd, #0x2000000 771001: 78 subs \rd, \rd, #1 79 bmi 1002f 80 mrc p14, 0, \rx, c0, c0, 0 81 tst \rx, #2 82 bne 1001b 831002: 84 .endm 85 86#endif /* CONFIG_CPU_V6 */ 87