12874c5fdSThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-or-later */ 2dd99eef5SAlexander Shiyan/* 3dd99eef5SAlexander Shiyan * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 4dd99eef5SAlexander Shiyan */ 5dd99eef5SAlexander Shiyan 6dd99eef5SAlexander Shiyan#ifndef CONFIG_DEBUG_CLPS711X_UART2 7dd99eef5SAlexander Shiyan#define CLPS711X_UART_PADDR (0x80000000 + 0x0000) 832981ea5SAlexander Shiyan#define CLPS711X_UART_VADDR (0xfeff4000 + 0x0000) 9dd99eef5SAlexander Shiyan#else 10dd99eef5SAlexander Shiyan#define CLPS711X_UART_PADDR (0x80000000 + 0x1000) 1132981ea5SAlexander Shiyan#define CLPS711X_UART_VADDR (0xfeff4000 + 0x1000) 12dd99eef5SAlexander Shiyan#endif 13dd99eef5SAlexander Shiyan 14dd99eef5SAlexander Shiyan#define SYSFLG (0x0140) 15dd99eef5SAlexander Shiyan#define SYSFLG_UBUSY (1 << 11) 16dd99eef5SAlexander Shiyan#define UARTDR (0x0480) 17dd99eef5SAlexander Shiyan 18dd99eef5SAlexander Shiyan .macro addruart, rp, rv, tmp 19dd99eef5SAlexander Shiyan ldr \rv, =CLPS711X_UART_VADDR 20dd99eef5SAlexander Shiyan ldr \rp, =CLPS711X_UART_PADDR 21dd99eef5SAlexander Shiyan .endm 22dd99eef5SAlexander Shiyan 23dd99eef5SAlexander Shiyan .macro waituart,rd,rx 24dd99eef5SAlexander Shiyan .endm 25dd99eef5SAlexander Shiyan 26dd99eef5SAlexander Shiyan .macro senduart,rd,rx 27dd99eef5SAlexander Shiyan str \rd, [\rx, #UARTDR] 28dd99eef5SAlexander Shiyan .endm 29dd99eef5SAlexander Shiyan 30dd99eef5SAlexander Shiyan .macro busyuart,rd,rx 31dd99eef5SAlexander Shiyan1001: ldr \rd, [\rx, #SYSFLG] 32dd99eef5SAlexander Shiyan tst \rd, #SYSFLG_UBUSY 33dd99eef5SAlexander Shiyan bne 1001b 34dd99eef5SAlexander Shiyan .endm 35