xref: /openbmc/linux/arch/arm/include/debug/brcmstb.S (revision 160b8e75)
1/*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 * GNU General Public License for more details.
12 */
13#include <linux/serial_reg.h>
14
15/* Physical register offset and virtual register offset */
16#define REG_PHYS_BASE		0xf0000000
17#define REG_VIRT_BASE		0xfc000000
18#define REG_PHYS_ADDR(x)	((x) + REG_PHYS_BASE)
19
20/* Product id can be read from here */
21#define SUN_TOP_CTRL_BASE	REG_PHYS_ADDR(0x404000)
22
23#define UARTA_3390		REG_PHYS_ADDR(0x40a900)
24#define UARTA_7250		REG_PHYS_ADDR(0x40b400)
25#define UARTA_7260		REG_PHYS_ADDR(0x40c000)
26#define UARTA_7268		UARTA_7260
27#define UARTA_7271		UARTA_7268
28#define UARTA_7364		REG_PHYS_ADDR(0x40b000)
29#define UARTA_7366		UARTA_7364
30#define UARTA_74371		REG_PHYS_ADDR(0x406b00)
31#define UARTA_7439		REG_PHYS_ADDR(0x40a900)
32#define UARTA_7445		REG_PHYS_ADDR(0x40ab00)
33
34#define UART_SHIFT		2
35
36#define checkuart(rp, rv, family_id, family) \
37		/* Load family id */ \
38		ldr	rp, =family_id ; \
39		/* Compare SUN_TOP_CTRL value against it */ \
40		cmp	rp, rv ; \
41		/* Passed test, load address */ \
42		ldreq	rp, =UARTA_##family ; \
43		/* Jump to save UART address */ \
44		beq	91f
45
46		.macro  addruart, rp, rv, tmp
47		adr	\rp, 99f		@ actual addr of 99f
48		ldr	\rv, [\rp]		@ linked addr is stored there
49		sub	\rv, \rv, \rp		@ offset between the two
50		ldr	\rp, [\rp, #4]		@ linked brcmstb_uart_config
51		sub	\tmp, \rp, \rv		@ actual brcmstb_uart_config
52		ldr	\rp, [\tmp]		@ Load brcmstb_uart_config
53		cmp	\rp, #1			@ needs initialization?
54		bne	100f			@ no; go load the addresses
55		mov	\rv, #0			@ yes; record init is done
56		str	\rv, [\tmp]
57
58		/* Check SUN_TOP_CTRL base */
59		ldr	\rp, =SUN_TOP_CTRL_BASE	@ load SUN_TOP_CTRL PA
60		ldr	\rv, [\rp, #0]		@ get register contents
61ARM_BE8(	rev	\rv, \rv )
62		and	\rv, \rv, #0xffffff00	@ strip revision bits [7:0]
63
64		/* Chip specific detection starts here */
6520:		checkuart(\rp, \rv, 0x33900000, 3390)
6621:		checkuart(\rp, \rv, 0x72500000, 7250)
6722:		checkuart(\rp, \rv, 0x72600000, 7260)
6823:		checkuart(\rp, \rv, 0x72680000, 7268)
6924:		checkuart(\rp, \rv, 0x72710000, 7271)
7025:		checkuart(\rp, \rv, 0x73640000, 7364)
7126:		checkuart(\rp, \rv, 0x73660000, 7366)
7227:		checkuart(\rp, \rv, 0x07437100, 74371)
7328:		checkuart(\rp, \rv, 0x74390000, 7439)
7429:		checkuart(\rp, \rv, 0x74450000, 7445)
75
76		/* No valid UART found */
7790:		mov	\rp, #0
78		/* fall through */
79
80		/* Record whichever UART we chose */
8191:		str	\rp, [\tmp, #4]		@ Store in brcmstb_uart_phys
82		cmp	\rp, #0			@ Valid UART address?
83		bne	92f			@ Yes, go process it
84		str	\rp, [\tmp, #8]		@ Store 0 in brcmstb_uart_virt
85		b	100f			@ Done
8692:		and     \rv, \rp, #0xffffff	@ offset within 16MB section
87		add	\rv, \rv, #REG_VIRT_BASE
88		str	\rv, [\tmp, #8]		@ Store in brcmstb_uart_virt
89		b	100f
90
91		.align
9299:		.word	.
93		.word	brcmstb_uart_config
94		.ltorg
95
96		/* Load previously selected UART address */
97100:		ldr	\rp, [\tmp, #4]		@ Load brcmstb_uart_phys
98		ldr	\rv, [\tmp, #8]		@ Load brcmstb_uart_virt
99		.endm
100
101		.macro	store, rd, rx:vararg
102ARM_BE8(	rev	\rd, \rd )
103		str	\rd, \rx
104		.endm
105
106		.macro	load, rd, rx:vararg
107		ldr	\rd, \rx
108ARM_BE8(	rev	\rd, \rd )
109		.endm
110
111		.macro	senduart,rd,rx
112		store	\rd, [\rx, #UART_TX << UART_SHIFT]
113		.endm
114
115		.macro	busyuart,rd,rx
1161002:		load	\rd, [\rx, #UART_LSR << UART_SHIFT]
117		and	\rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
118		teq	\rd, #UART_LSR_TEMT | UART_LSR_THRE
119		bne	1002b
120		.endm
121
122		.macro	waituart,rd,rx
123		.endm
124
125/*
126 * Storage for the state maintained by the macros above.
127 *
128 * In the kernel proper, this data is located in arch/arm/mach-bcm/brcmstb.c.
129 * That's because this header is included from multiple files, and we only
130 * want a single copy of the data. In particular, the UART probing code above
131 * assumes it's running using physical addresses. This is true when this file
132 * is included from head.o, but not when included from debug.o. So we need
133 * to share the probe results between the two copies, rather than having
134 * to re-run the probing again later.
135 *
136 * In the decompressor, we put the symbol/storage right here, since common.c
137 * isn't included in the decompressor build. This symbol gets put in .text
138 * even though it's really data, since .data is discarded from the
139 * decompressor. Luckily, .text is writeable in the decompressor, unless
140 * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
141 */
142#if defined(ZIMAGE)
143brcmstb_uart_config:
144	/* Debug UART initialization required */
145	.word 1
146	/* Debug UART physical address */
147	.word 0
148	/* Debug UART virtual address */
149	.word 0
150#endif
151