xref: /openbmc/linux/arch/arm/include/debug/at91.S (revision 110e6f26)
1/*
2 *  Copyright (C) 2003-2005 SAN People
3 *
4 * Debugging macro include header
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10*/
11
12#ifdef CONFIG_MMU
13#define AT91_IO_P2V(x) ((x) - 0x01000000)
14#else
15#define AT91_IO_P2V(x) (x)
16#endif
17
18#define AT91_DEBUG_UART_VIRT AT91_IO_P2V(CONFIG_DEBUG_UART_PHYS)
19
20#define AT91_DBGU_SR		(0x14)	/* Status Register */
21#define AT91_DBGU_THR		(0x1c)	/* Transmitter Holding Register */
22#define AT91_DBGU_TXRDY		(1 << 1)	/* Transmitter Ready */
23#define AT91_DBGU_TXEMPTY	(1 << 9)	/* Transmitter Empty */
24
25	.macro	addruart, rp, rv, tmp
26	ldr	\rp, =CONFIG_DEBUG_UART_PHYS		@ System peripherals (phys address)
27	ldr	\rv, =AT91_DEBUG_UART_VIRT		@ System peripherals (virt address)
28	.endm
29
30	.macro	senduart,rd,rx
31	strb	\rd, [\rx, #(AT91_DBGU_THR)]		@ Write to Transmitter Holding Register
32	.endm
33
34	.macro	waituart,rd,rx
351001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
36	tst	\rd, #AT91_DBGU_TXRDY			@ DBGU_TXRDY = 1 when ready to transmit
37	beq	1001b
38	.endm
39
40	.macro	busyuart,rd,rx
411001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
42	tst	\rd, #AT91_DBGU_TXEMPTY			@ DBGU_TXEMPTY = 1 when transmission complete
43	beq	1001b
44	.endm
45
46