1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21713ce7cSNathan Lynch /* 31713ce7cSNathan Lynch * Adapted from arm64 version. 41713ce7cSNathan Lynch * 51713ce7cSNathan Lynch * Copyright (C) 2012 ARM Limited 61713ce7cSNathan Lynch */ 71713ce7cSNathan Lynch #ifndef __ASM_VDSO_DATAPAGE_H 81713ce7cSNathan Lynch #define __ASM_VDSO_DATAPAGE_H 91713ce7cSNathan Lynch 101713ce7cSNathan Lynch #ifdef __KERNEL__ 111713ce7cSNathan Lynch 121713ce7cSNathan Lynch #ifndef __ASSEMBLY__ 131713ce7cSNathan Lynch 141713ce7cSNathan Lynch #include <asm/page.h> 151713ce7cSNathan Lynch 161713ce7cSNathan Lynch /* Try to be cache-friendly on systems that don't implement the 171713ce7cSNathan Lynch * generic timer: fit the unconditionally updated fields in the first 181713ce7cSNathan Lynch * 32 bytes. 191713ce7cSNathan Lynch */ 201713ce7cSNathan Lynch struct vdso_data { 211713ce7cSNathan Lynch u32 seq_count; /* sequence count - odd during updates */ 221713ce7cSNathan Lynch u16 tk_is_cntvct; /* fall back to syscall if false */ 231713ce7cSNathan Lynch u16 cs_shift; /* clocksource shift */ 241713ce7cSNathan Lynch u32 xtime_coarse_sec; /* coarse time */ 251713ce7cSNathan Lynch u32 xtime_coarse_nsec; 261713ce7cSNathan Lynch 271713ce7cSNathan Lynch u32 wtm_clock_sec; /* wall to monotonic offset */ 281713ce7cSNathan Lynch u32 wtm_clock_nsec; 291713ce7cSNathan Lynch u32 xtime_clock_sec; /* CLOCK_REALTIME - seconds */ 301713ce7cSNathan Lynch u32 cs_mult; /* clocksource multiplier */ 311713ce7cSNathan Lynch 321713ce7cSNathan Lynch u64 cs_cycle_last; /* last cycle value */ 331713ce7cSNathan Lynch u64 cs_mask; /* clocksource mask */ 341713ce7cSNathan Lynch 351713ce7cSNathan Lynch u64 xtime_clock_snsec; /* CLOCK_REALTIME sub-ns base */ 361713ce7cSNathan Lynch u32 tz_minuteswest; /* timezone info for gettimeofday(2) */ 371713ce7cSNathan Lynch u32 tz_dsttime; 381713ce7cSNathan Lynch }; 391713ce7cSNathan Lynch 401713ce7cSNathan Lynch union vdso_data_store { 411713ce7cSNathan Lynch struct vdso_data data; 421713ce7cSNathan Lynch u8 page[PAGE_SIZE]; 431713ce7cSNathan Lynch }; 441713ce7cSNathan Lynch 451713ce7cSNathan Lynch #endif /* !__ASSEMBLY__ */ 461713ce7cSNathan Lynch 471713ce7cSNathan Lynch #endif /* __KERNEL__ */ 481713ce7cSNathan Lynch 491713ce7cSNathan Lynch #endif /* __ASM_VDSO_DATAPAGE_H */ 50