xref: /openbmc/linux/arch/arm/include/asm/tls.h (revision 95e9fd10)
1 #ifndef __ASMARM_TLS_H
2 #define __ASMARM_TLS_H
3 
4 #ifdef __ASSEMBLY__
5 	.macro set_tls_none, tp, tmp1, tmp2
6 	.endm
7 
8 	.macro set_tls_v6k, tp, tmp1, tmp2
9 	mcr	p15, 0, \tp, c13, c0, 3		@ set TLS register
10 	mov	\tmp1, #0
11 	mcr	p15, 0, \tmp1, c13, c0, 2	@ clear user r/w TLS register
12 	.endm
13 
14 	.macro set_tls_v6, tp, tmp1, tmp2
15 	ldr	\tmp1, =elf_hwcap
16 	ldr	\tmp1, [\tmp1, #0]
17 	mov	\tmp2, #0xffff0fff
18 	tst	\tmp1, #HWCAP_TLS		@ hardware TLS available?
19 	mcrne	p15, 0, \tp, c13, c0, 3		@ yes, set TLS register
20 	movne	\tmp1, #0
21 	mcrne	p15, 0, \tmp1, c13, c0, 2	@ clear user r/w TLS register
22 	streq	\tp, [\tmp2, #-15]		@ set TLS value at 0xffff0ff0
23 	.endm
24 
25 	.macro set_tls_software, tp, tmp1, tmp2
26 	mov	\tmp1, #0xffff0fff
27 	str	\tp, [\tmp1, #-15]		@ set TLS value at 0xffff0ff0
28 	.endm
29 #endif
30 
31 #ifdef CONFIG_TLS_REG_EMUL
32 #define tls_emu		1
33 #define has_tls_reg		1
34 #define set_tls		set_tls_none
35 #elif defined(CONFIG_CPU_V6)
36 #define tls_emu		0
37 #define has_tls_reg		(elf_hwcap & HWCAP_TLS)
38 #define set_tls		set_tls_v6
39 #elif defined(CONFIG_CPU_32v6K)
40 #define tls_emu		0
41 #define has_tls_reg		1
42 #define set_tls		set_tls_v6k
43 #else
44 #define tls_emu		0
45 #define has_tls_reg		0
46 #define set_tls		set_tls_software
47 #endif
48 
49 #endif	/* __ASMARM_TLS_H */
50