1 /* 2 * arch/arm/include/asm/byteorder.h 3 * 4 * ARM Endian-ness. In little endian mode, the data bus is connected such 5 * that byte accesses appear as: 6 * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31 7 * and word accesses (data or instruction) appear as: 8 * d0...d31 9 * 10 * When in big endian mode, byte accesses appear as: 11 * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7 12 * and word accesses (data or instruction) appear as: 13 * d0...d31 14 */ 15 #ifndef __ASM_ARM_SWAB_H 16 #define __ASM_ARM_SWAB_H 17 18 #include <linux/compiler.h> 19 #include <linux/types.h> 20 21 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) 22 # define __SWAB_64_THRU_32__ 23 #endif 24 25 static inline __attribute_const__ __u32 __arch_swab32(__u32 x) 26 { 27 __u32 t; 28 29 #ifndef __thumb__ 30 if (!__builtin_constant_p(x)) { 31 /* 32 * The compiler needs a bit of a hint here to always do the 33 * right thing and not screw it up to different degrees 34 * depending on the gcc version. 35 */ 36 asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x)); 37 } else 38 #endif 39 t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */ 40 41 x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */ 42 t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */ 43 x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */ 44 45 return x; 46 } 47 #define __arch_swab32 __arch_swab32 48 49 #endif 50 51