1 #ifndef __ASMARM_SMP_TWD_H 2 #define __ASMARM_SMP_TWD_H 3 4 #define TWD_TIMER_LOAD 0x00 5 #define TWD_TIMER_COUNTER 0x04 6 #define TWD_TIMER_CONTROL 0x08 7 #define TWD_TIMER_INTSTAT 0x0C 8 9 #define TWD_WDOG_LOAD 0x20 10 #define TWD_WDOG_COUNTER 0x24 11 #define TWD_WDOG_CONTROL 0x28 12 #define TWD_WDOG_INTSTAT 0x2C 13 #define TWD_WDOG_RESETSTAT 0x30 14 #define TWD_WDOG_DISABLE 0x34 15 16 #define TWD_TIMER_CONTROL_ENABLE (1 << 0) 17 #define TWD_TIMER_CONTROL_ONESHOT (0 << 1) 18 #define TWD_TIMER_CONTROL_PERIODIC (1 << 1) 19 #define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2) 20 21 struct clock_event_device; 22 23 extern void __iomem *twd_base; 24 25 void twd_timer_setup(struct clock_event_device *); 26 void twd_timer_stop(struct clock_event_device *); 27 28 #endif 29