xref: /openbmc/linux/arch/arm/include/asm/pgtable.h (revision 9d749629)
1 /*
2  *  arch/arm/include/asm/pgtable.h
3  *
4  *  Copyright (C) 1995-2002 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #ifndef _ASMARM_PGTABLE_H
11 #define _ASMARM_PGTABLE_H
12 
13 #include <linux/const.h>
14 #include <asm/proc-fns.h>
15 
16 #ifndef CONFIG_MMU
17 
18 #include <asm-generic/4level-fixup.h>
19 #include <asm/pgtable-nommu.h>
20 
21 #else
22 
23 #include <asm-generic/pgtable-nopud.h>
24 #include <asm/memory.h>
25 #include <asm/pgtable-hwdef.h>
26 
27 #ifdef CONFIG_ARM_LPAE
28 #include <asm/pgtable-3level.h>
29 #else
30 #include <asm/pgtable-2level.h>
31 #endif
32 
33 /*
34  * Just any arbitrary offset to the start of the vmalloc VM area: the
35  * current 8MB value just means that there will be a 8MB "hole" after the
36  * physical memory until the kernel virtual memory starts.  That means that
37  * any out-of-bounds memory accesses will hopefully be caught.
38  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
39  * area for the same reason. ;)
40  */
41 #define VMALLOC_OFFSET		(8*1024*1024)
42 #define VMALLOC_START		(((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
43 #define VMALLOC_END		0xff000000UL
44 
45 #define LIBRARY_TEXT_START	0x0c000000
46 
47 #ifndef __ASSEMBLY__
48 extern void __pte_error(const char *file, int line, pte_t);
49 extern void __pmd_error(const char *file, int line, pmd_t);
50 extern void __pgd_error(const char *file, int line, pgd_t);
51 
52 #define pte_ERROR(pte)		__pte_error(__FILE__, __LINE__, pte)
53 #define pmd_ERROR(pmd)		__pmd_error(__FILE__, __LINE__, pmd)
54 #define pgd_ERROR(pgd)		__pgd_error(__FILE__, __LINE__, pgd)
55 
56 /*
57  * This is the lowest virtual address we can permit any user space
58  * mapping to be mapped at.  This is particularly important for
59  * non-high vector CPUs.
60  */
61 #define FIRST_USER_ADDRESS	PAGE_SIZE
62 
63 /*
64  * The pgprot_* and protection_map entries will be fixed up in runtime
65  * to include the cachable and bufferable bits based on memory policy,
66  * as well as any architecture dependent bits like global/ASID and SMP
67  * shared mapping bits.
68  */
69 #define _L_PTE_DEFAULT	L_PTE_PRESENT | L_PTE_YOUNG
70 
71 extern pgprot_t		pgprot_user;
72 extern pgprot_t		pgprot_kernel;
73 extern pgprot_t		pgprot_hyp_device;
74 extern pgprot_t		pgprot_s2;
75 extern pgprot_t		pgprot_s2_device;
76 
77 #define _MOD_PROT(p, b)	__pgprot(pgprot_val(p) | (b))
78 
79 #define PAGE_NONE		_MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY | L_PTE_NONE)
80 #define PAGE_SHARED		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_XN)
81 #define PAGE_SHARED_EXEC	_MOD_PROT(pgprot_user, L_PTE_USER)
82 #define PAGE_COPY		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
83 #define PAGE_COPY_EXEC		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
84 #define PAGE_READONLY		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
85 #define PAGE_READONLY_EXEC	_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
86 #define PAGE_KERNEL		_MOD_PROT(pgprot_kernel, L_PTE_XN)
87 #define PAGE_KERNEL_EXEC	pgprot_kernel
88 #define PAGE_HYP		_MOD_PROT(pgprot_kernel, L_PTE_HYP)
89 #define PAGE_HYP_DEVICE		_MOD_PROT(pgprot_hyp_device, L_PTE_HYP)
90 #define PAGE_S2			_MOD_PROT(pgprot_s2, L_PTE_S2_RDONLY)
91 #define PAGE_S2_DEVICE		_MOD_PROT(pgprot_s2_device, L_PTE_USER | L_PTE_S2_RDONLY)
92 
93 #define __PAGE_NONE		__pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE)
94 #define __PAGE_SHARED		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)
95 #define __PAGE_SHARED_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER)
96 #define __PAGE_COPY		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
97 #define __PAGE_COPY_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
98 #define __PAGE_READONLY		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
99 #define __PAGE_READONLY_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
100 
101 #define __pgprot_modify(prot,mask,bits)		\
102 	__pgprot((pgprot_val(prot) & ~(mask)) | (bits))
103 
104 #define pgprot_noncached(prot) \
105 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
106 
107 #define pgprot_writecombine(prot) \
108 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
109 
110 #define pgprot_stronglyordered(prot) \
111 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
112 
113 #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
114 #define pgprot_dmacoherent(prot) \
115 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN)
116 #define __HAVE_PHYS_MEM_ACCESS_PROT
117 struct file;
118 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
119 				     unsigned long size, pgprot_t vma_prot);
120 #else
121 #define pgprot_dmacoherent(prot) \
122 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED | L_PTE_XN)
123 #endif
124 
125 #endif /* __ASSEMBLY__ */
126 
127 /*
128  * The table below defines the page protection levels that we insert into our
129  * Linux page table version.  These get translated into the best that the
130  * architecture can perform.  Note that on most ARM hardware:
131  *  1) We cannot do execute protection
132  *  2) If we could do execute protection, then read is implied
133  *  3) write implies read permissions
134  */
135 #define __P000  __PAGE_NONE
136 #define __P001  __PAGE_READONLY
137 #define __P010  __PAGE_COPY
138 #define __P011  __PAGE_COPY
139 #define __P100  __PAGE_READONLY_EXEC
140 #define __P101  __PAGE_READONLY_EXEC
141 #define __P110  __PAGE_COPY_EXEC
142 #define __P111  __PAGE_COPY_EXEC
143 
144 #define __S000  __PAGE_NONE
145 #define __S001  __PAGE_READONLY
146 #define __S010  __PAGE_SHARED
147 #define __S011  __PAGE_SHARED
148 #define __S100  __PAGE_READONLY_EXEC
149 #define __S101  __PAGE_READONLY_EXEC
150 #define __S110  __PAGE_SHARED_EXEC
151 #define __S111  __PAGE_SHARED_EXEC
152 
153 #ifndef __ASSEMBLY__
154 /*
155  * ZERO_PAGE is a global shared page that is always zero: used
156  * for zero-mapped memory areas etc..
157  */
158 extern struct page *empty_zero_page;
159 #define ZERO_PAGE(vaddr)	(empty_zero_page)
160 
161 
162 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
163 
164 /* to find an entry in a page-table-directory */
165 #define pgd_index(addr)		((addr) >> PGDIR_SHIFT)
166 
167 #define pgd_offset(mm, addr)	((mm)->pgd + pgd_index(addr))
168 
169 /* to find an entry in a kernel page-table-directory */
170 #define pgd_offset_k(addr)	pgd_offset(&init_mm, addr)
171 
172 #define pmd_none(pmd)		(!pmd_val(pmd))
173 #define pmd_present(pmd)	(pmd_val(pmd))
174 
175 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
176 {
177 	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
178 }
179 
180 #define pmd_page(pmd)		pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
181 
182 #ifndef CONFIG_HIGHPTE
183 #define __pte_map(pmd)		pmd_page_vaddr(*(pmd))
184 #define __pte_unmap(pte)	do { } while (0)
185 #else
186 #define __pte_map(pmd)		(pte_t *)kmap_atomic(pmd_page(*(pmd)))
187 #define __pte_unmap(pte)	kunmap_atomic(pte)
188 #endif
189 
190 #define pte_index(addr)		(((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
191 
192 #define pte_offset_kernel(pmd,addr)	(pmd_page_vaddr(*(pmd)) + pte_index(addr))
193 
194 #define pte_offset_map(pmd,addr)	(__pte_map(pmd) + pte_index(addr))
195 #define pte_unmap(pte)			__pte_unmap(pte)
196 
197 #define pte_pfn(pte)		((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
198 #define pfn_pte(pfn,prot)	__pte(__pfn_to_phys(pfn) | pgprot_val(prot))
199 
200 #define pte_page(pte)		pfn_to_page(pte_pfn(pte))
201 #define mk_pte(page,prot)	pfn_pte(page_to_pfn(page), prot)
202 
203 #define pte_clear(mm,addr,ptep)	set_pte_ext(ptep, __pte(0), 0)
204 
205 #define pte_none(pte)		(!pte_val(pte))
206 #define pte_present(pte)	(pte_val(pte) & L_PTE_PRESENT)
207 #define pte_write(pte)		(!(pte_val(pte) & L_PTE_RDONLY))
208 #define pte_dirty(pte)		(pte_val(pte) & L_PTE_DIRTY)
209 #define pte_young(pte)		(pte_val(pte) & L_PTE_YOUNG)
210 #define pte_exec(pte)		(!(pte_val(pte) & L_PTE_XN))
211 #define pte_special(pte)	(0)
212 
213 #define pte_present_user(pte)  (pte_present(pte) && (pte_val(pte) & L_PTE_USER))
214 
215 #if __LINUX_ARM_ARCH__ < 6
216 static inline void __sync_icache_dcache(pte_t pteval)
217 {
218 }
219 #else
220 extern void __sync_icache_dcache(pte_t pteval);
221 #endif
222 
223 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
224 			      pte_t *ptep, pte_t pteval)
225 {
226 	unsigned long ext = 0;
227 
228 	if (addr < TASK_SIZE && pte_present_user(pteval)) {
229 		__sync_icache_dcache(pteval);
230 		ext |= PTE_EXT_NG;
231 	}
232 
233 	set_pte_ext(ptep, pteval, ext);
234 }
235 
236 #define PTE_BIT_FUNC(fn,op) \
237 static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
238 
239 PTE_BIT_FUNC(wrprotect, |= L_PTE_RDONLY);
240 PTE_BIT_FUNC(mkwrite,   &= ~L_PTE_RDONLY);
241 PTE_BIT_FUNC(mkclean,   &= ~L_PTE_DIRTY);
242 PTE_BIT_FUNC(mkdirty,   |= L_PTE_DIRTY);
243 PTE_BIT_FUNC(mkold,     &= ~L_PTE_YOUNG);
244 PTE_BIT_FUNC(mkyoung,   |= L_PTE_YOUNG);
245 
246 static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
247 
248 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
249 {
250 	const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER | L_PTE_NONE;
251 	pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
252 	return pte;
253 }
254 
255 /*
256  * Encode and decode a swap entry.  Swap entries are stored in the Linux
257  * page tables as follows:
258  *
259  *   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
260  *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
261  *   <--------------- offset ----------------------> < type -> 0 0 0
262  *
263  * This gives us up to 31 swap files and 64GB per swap file.  Note that
264  * the offset field is always non-zero.
265  */
266 #define __SWP_TYPE_SHIFT	3
267 #define __SWP_TYPE_BITS		5
268 #define __SWP_TYPE_MASK		((1 << __SWP_TYPE_BITS) - 1)
269 #define __SWP_OFFSET_SHIFT	(__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
270 
271 #define __swp_type(x)		(((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
272 #define __swp_offset(x)		((x).val >> __SWP_OFFSET_SHIFT)
273 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
274 
275 #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
276 #define __swp_entry_to_pte(swp)	((pte_t) { (swp).val })
277 
278 /*
279  * It is an error for the kernel to have more swap files than we can
280  * encode in the PTEs.  This ensures that we know when MAX_SWAPFILES
281  * is increased beyond what we presently support.
282  */
283 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
284 
285 /*
286  * Encode and decode a file entry.  File entries are stored in the Linux
287  * page tables as follows:
288  *
289  *   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
290  *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
291  *   <----------------------- offset ------------------------> 1 0 0
292  */
293 #define pte_file(pte)		(pte_val(pte) & L_PTE_FILE)
294 #define pte_to_pgoff(x)		(pte_val(x) >> 3)
295 #define pgoff_to_pte(x)		__pte(((x) << 3) | L_PTE_FILE)
296 
297 #define PTE_FILE_MAX_BITS	29
298 
299 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
300 /* FIXME: this is not correct */
301 #define kern_addr_valid(addr)	(1)
302 
303 #include <asm-generic/pgtable.h>
304 
305 /*
306  * We provide our own arch_get_unmapped_area to cope with VIPT caches.
307  */
308 #define HAVE_ARCH_UNMAPPED_AREA
309 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
310 
311 /*
312  * remap a physical page `pfn' of size `size' with page protection `prot'
313  * into virtual address `from'
314  */
315 #define io_remap_pfn_range(vma,from,pfn,size,prot) \
316 		remap_pfn_range(vma, from, pfn, size, prot)
317 
318 #define pgtable_cache_init() do { } while (0)
319 
320 #endif /* !__ASSEMBLY__ */
321 
322 #endif /* CONFIG_MMU */
323 
324 #endif /* _ASMARM_PGTABLE_H */
325