1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright 2012 Calxeda, Inc. 4 */ 5 #ifndef _ASM_ARM_PERCPU_H_ 6 #define _ASM_ARM_PERCPU_H_ 7 8 /* 9 * Same as asm-generic/percpu.h, except that we store the per cpu offset 10 * in the TPIDRPRW. TPIDRPRW only exists on V6K and V7 11 */ 12 #if defined(CONFIG_SMP) && !defined(CONFIG_CPU_V6) 13 static inline void set_my_cpu_offset(unsigned long off) 14 { 15 /* Set TPIDRPRW */ 16 asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory"); 17 } 18 19 static inline unsigned long __my_cpu_offset(void) 20 { 21 unsigned long off; 22 23 /* 24 * Read TPIDRPRW. 25 * We want to allow caching the value, so avoid using volatile and 26 * instead use a fake stack read to hazard against barrier(). 27 */ 28 asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) 29 : "Q" (*(const unsigned long *)current_stack_pointer)); 30 31 return off; 32 } 33 #define __my_cpu_offset __my_cpu_offset() 34 #else 35 #define set_my_cpu_offset(x) do {} while(0) 36 37 #endif /* CONFIG_SMP */ 38 39 #include <asm-generic/percpu.h> 40 41 #endif /* _ASM_ARM_PERCPU_H_ */ 42