1bf67fd31SWill Deacon #ifndef __ASM_MCS_LOCK_H
2bf67fd31SWill Deacon #define __ASM_MCS_LOCK_H
3bf67fd31SWill Deacon 
4bf67fd31SWill Deacon #ifdef CONFIG_SMP
5bf67fd31SWill Deacon #include <asm/spinlock.h>
6bf67fd31SWill Deacon 
7bf67fd31SWill Deacon /* MCS spin-locking. */
8bf67fd31SWill Deacon #define arch_mcs_spin_lock_contended(lock)				\
9bf67fd31SWill Deacon do {									\
10bf67fd31SWill Deacon 	/* Ensure prior stores are observed before we enter wfe. */	\
11bf67fd31SWill Deacon 	smp_mb();							\
12bf67fd31SWill Deacon 	while (!(smp_load_acquire(lock)))				\
13bf67fd31SWill Deacon 		wfe();							\
14bf67fd31SWill Deacon } while (0)								\
15bf67fd31SWill Deacon 
16bf67fd31SWill Deacon #define arch_mcs_spin_unlock_contended(lock)				\
17bf67fd31SWill Deacon do {									\
18bf67fd31SWill Deacon 	smp_store_release(lock, 1);					\
19bf67fd31SWill Deacon 	dsb_sev();							\
20bf67fd31SWill Deacon } while (0)
21bf67fd31SWill Deacon 
22bf67fd31SWill Deacon #endif	/* CONFIG_SMP */
23bf67fd31SWill Deacon #endif	/* __ASM_MCS_LOCK_H */
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