1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_ARM_DIV64 3 #define __ASM_ARM_DIV64 4 5 #include <linux/types.h> 6 #include <asm/compiler.h> 7 8 /* 9 * The semantics of __div64_32() are: 10 * 11 * uint32_t __div64_32(uint64_t *n, uint32_t base) 12 * { 13 * uint32_t remainder = *n % base; 14 * *n = *n / base; 15 * return remainder; 16 * } 17 * 18 * In other words, a 64-bit dividend with a 32-bit divisor producing 19 * a 64-bit result and a 32-bit remainder. To accomplish this optimally 20 * we override the generic version in lib/div64.c to call our __do_div64 21 * assembly implementation with completely non standard calling convention 22 * for arguments and results (beware). 23 */ 24 static inline uint32_t __div64_32(uint64_t *n, uint32_t base) 25 { 26 register unsigned int __base asm("r4") = base; 27 register unsigned long long __n asm("r0") = *n; 28 register unsigned long long __res asm("r2"); 29 unsigned int __rem; 30 asm( __asmeq("%0", "r0") 31 __asmeq("%1", "r2") 32 __asmeq("%2", "r4") 33 "bl __do_div64" 34 : "+r" (__n), "=r" (__res) 35 : "r" (__base) 36 : "ip", "lr", "cc"); 37 __rem = __n >> 32; 38 *n = __res; 39 return __rem; 40 } 41 #define __div64_32 __div64_32 42 43 #if !defined(CONFIG_AEABI) 44 45 /* 46 * In OABI configurations, some uses of the do_div function 47 * cause gcc to run out of registers. To work around that, 48 * we can force the use of the out-of-line version for 49 * configurations that build a OABI kernel. 50 */ 51 #define do_div(n, base) __div64_32(&(n), base) 52 53 #else 54 55 /* 56 * gcc versions earlier than 4.0 are simply too problematic for the 57 * __div64_const32() code in asm-generic/div64.h. First there is 58 * gcc PR 15089 that tend to trig on more complex constructs, spurious 59 * .global __udivsi3 are inserted even if none of those symbols are 60 * referenced in the generated code, and those gcc versions are not able 61 * to do constant propagation on long long values anyway. 62 */ 63 64 #define __div64_const32_is_OK (__GNUC__ >= 4) 65 66 static inline uint64_t __arch_xprod_64(uint64_t m, uint64_t n, bool bias) 67 { 68 unsigned long long res; 69 register unsigned int tmp asm("ip") = 0; 70 71 if (!bias) { 72 asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" 73 "mov %Q0, #0" 74 : "=&r" (res) 75 : "r" (m), "r" (n) 76 : "cc"); 77 } else if (!(m & ((1ULL << 63) | (1ULL << 31)))) { 78 res = m; 79 asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" 80 "mov %Q0, #0" 81 : "+&r" (res) 82 : "r" (m), "r" (n) 83 : "cc"); 84 } else { 85 asm ( "umull %Q0, %R0, %Q2, %Q3\n\t" 86 "cmn %Q0, %Q2\n\t" 87 "adcs %R0, %R0, %R2\n\t" 88 "adc %Q0, %1, #0" 89 : "=&r" (res), "+&r" (tmp) 90 : "r" (m), "r" (n) 91 : "cc"); 92 } 93 94 if (!(m & ((1ULL << 63) | (1ULL << 31)))) { 95 asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" 96 "umlal %R0, %Q0, %Q1, %R2\n\t" 97 "mov %R0, #0\n\t" 98 "umlal %Q0, %R0, %R1, %R2" 99 : "+&r" (res) 100 : "r" (m), "r" (n) 101 : "cc"); 102 } else { 103 asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" 104 "umlal %R0, %1, %Q2, %R3\n\t" 105 "mov %R0, #0\n\t" 106 "adds %Q0, %1, %Q0\n\t" 107 "adc %R0, %R0, #0\n\t" 108 "umlal %Q0, %R0, %R2, %R3" 109 : "+&r" (res), "+&r" (tmp) 110 : "r" (m), "r" (n) 111 : "cc"); 112 } 113 114 return res; 115 } 116 #define __arch_xprod_64 __arch_xprod_64 117 118 #include <asm-generic/div64.h> 119 120 #endif 121 122 #endif 123