14baa9922SRussell King /* 24baa9922SRussell King * arch/arm/include/asm/cache.h 34baa9922SRussell King */ 44baa9922SRussell King #ifndef __ASMARM_CACHE_H 54baa9922SRussell King #define __ASMARM_CACHE_H 64baa9922SRussell King 74baa9922SRussell King #define L1_CACHE_SHIFT 5 84baa9922SRussell King #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 94baa9922SRussell King 104baa9922SRussell King #endif 11