xref: /openbmc/linux/arch/arm/common/sa1111.c (revision 87c2ce3b)
1 /*
2  * linux/arch/arm/mach-sa1100/sa1111.c
3  *
4  * SA1111 support
5  *
6  * Original code by John Dorsey
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This file contains all generic SA1111 support.
13  *
14  * All initialization functions provided here are intended to be called
15  * from machine specific code with proper arguments when required.
16  */
17 #include <linux/config.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/delay.h>
22 #include <linux/ptrace.h>
23 #include <linux/errno.h>
24 #include <linux/ioport.h>
25 #include <linux/platform_device.h>
26 #include <linux/slab.h>
27 #include <linux/spinlock.h>
28 #include <linux/dma-mapping.h>
29 
30 #include <asm/hardware.h>
31 #include <asm/mach-types.h>
32 #include <asm/io.h>
33 #include <asm/irq.h>
34 #include <asm/mach/irq.h>
35 #include <asm/sizes.h>
36 
37 #include <asm/hardware/sa1111.h>
38 
39 #ifdef CONFIG_ARCH_PXA
40 #include <asm/arch/pxa-regs.h>
41 #endif
42 
43 extern void __init sa1110_mb_enable(void);
44 
45 /*
46  * We keep the following data for the overall SA1111.  Note that the
47  * struct device and struct resource are "fake"; they should be supplied
48  * by the bus above us.  However, in the interests of getting all SA1111
49  * drivers converted over to the device model, we provide this as an
50  * anchor point for all the other drivers.
51  */
52 struct sa1111 {
53 	struct device	*dev;
54 	unsigned long	phys;
55 	int		irq;
56 	spinlock_t	lock;
57 	void __iomem	*base;
58 };
59 
60 /*
61  * We _really_ need to eliminate this.  Its only users
62  * are the PWM and DMA checking code.
63  */
64 static struct sa1111 *g_sa1111;
65 
66 struct sa1111_dev_info {
67 	unsigned long	offset;
68 	unsigned long	skpcr_mask;
69 	unsigned int	devid;
70 	unsigned int	irq[6];
71 };
72 
73 static struct sa1111_dev_info sa1111_devices[] = {
74 	{
75 		.offset		= SA1111_USB,
76 		.skpcr_mask	= SKPCR_UCLKEN,
77 		.devid		= SA1111_DEVID_USB,
78 		.irq = {
79 			IRQ_USBPWR,
80 			IRQ_HCIM,
81 			IRQ_HCIBUFFACC,
82 			IRQ_HCIRMTWKP,
83 			IRQ_NHCIMFCIR,
84 			IRQ_USB_PORT_RESUME
85 		},
86 	},
87 	{
88 		.offset		= 0x0600,
89 		.skpcr_mask	= SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
90 		.devid		= SA1111_DEVID_SAC,
91 		.irq = {
92 			AUDXMTDMADONEA,
93 			AUDXMTDMADONEB,
94 			AUDRCVDMADONEA,
95 			AUDRCVDMADONEB
96 		},
97 	},
98 	{
99 		.offset		= 0x0800,
100 		.skpcr_mask	= SKPCR_SCLKEN,
101 		.devid		= SA1111_DEVID_SSP,
102 	},
103 	{
104 		.offset		= SA1111_KBD,
105 		.skpcr_mask	= SKPCR_PTCLKEN,
106 		.devid		= SA1111_DEVID_PS2,
107 		.irq = {
108 			IRQ_TPRXINT,
109 			IRQ_TPTXINT
110 		},
111 	},
112 	{
113 		.offset		= SA1111_MSE,
114 		.skpcr_mask	= SKPCR_PMCLKEN,
115 		.devid		= SA1111_DEVID_PS2,
116 		.irq = {
117 			IRQ_MSRXINT,
118 			IRQ_MSTXINT
119 		},
120 	},
121 	{
122 		.offset		= 0x1800,
123 		.skpcr_mask	= 0,
124 		.devid		= SA1111_DEVID_PCMCIA,
125 		.irq = {
126 			IRQ_S0_READY_NINT,
127 			IRQ_S0_CD_VALID,
128 			IRQ_S0_BVD1_STSCHG,
129 			IRQ_S1_READY_NINT,
130 			IRQ_S1_CD_VALID,
131 			IRQ_S1_BVD1_STSCHG,
132 		},
133 	},
134 };
135 
136 void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes)
137 {
138 	unsigned int sz = SZ_1M >> PAGE_SHIFT;
139 
140 	if (node != 0)
141 		sz = 0;
142 
143 	size[1] = size[0] - sz;
144 	size[0] = sz;
145 }
146 
147 /*
148  * SA1111 interrupt support.  Since clearing an IRQ while there are
149  * active IRQs causes the interrupt output to pulse, the upper levels
150  * will call us again if there are more interrupts to process.
151  */
152 static void
153 sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
154 {
155 	unsigned int stat0, stat1, i;
156 	void __iomem *base = desc->data;
157 
158 	stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
159 	stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
160 
161 	sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
162 
163 	desc->chip->ack(irq);
164 
165 	sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
166 
167 	if (stat0 == 0 && stat1 == 0) {
168 		do_bad_IRQ(irq, desc, regs);
169 		return;
170 	}
171 
172 	for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
173 		if (stat0 & 1)
174 			do_edge_IRQ(i, irq_desc + i, regs);
175 
176 	for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
177 		if (stat1 & 1)
178 			do_edge_IRQ(i, irq_desc + i, regs);
179 
180 	/* For level-based interrupts */
181 	desc->chip->unmask(irq);
182 }
183 
184 #define SA1111_IRQMASK_LO(x)	(1 << (x - IRQ_SA1111_START))
185 #define SA1111_IRQMASK_HI(x)	(1 << (x - IRQ_SA1111_START - 32))
186 
187 static void sa1111_ack_irq(unsigned int irq)
188 {
189 }
190 
191 static void sa1111_mask_lowirq(unsigned int irq)
192 {
193 	void __iomem *mapbase = get_irq_chipdata(irq);
194 	unsigned long ie0;
195 
196 	ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
197 	ie0 &= ~SA1111_IRQMASK_LO(irq);
198 	writel(ie0, mapbase + SA1111_INTEN0);
199 }
200 
201 static void sa1111_unmask_lowirq(unsigned int irq)
202 {
203 	void __iomem *mapbase = get_irq_chipdata(irq);
204 	unsigned long ie0;
205 
206 	ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
207 	ie0 |= SA1111_IRQMASK_LO(irq);
208 	sa1111_writel(ie0, mapbase + SA1111_INTEN0);
209 }
210 
211 /*
212  * Attempt to re-trigger the interrupt.  The SA1111 contains a register
213  * (INTSET) which claims to do this.  However, in practice no amount of
214  * manipulation of INTEN and INTSET guarantees that the interrupt will
215  * be triggered.  In fact, its very difficult, if not impossible to get
216  * INTSET to re-trigger the interrupt.
217  */
218 static int sa1111_retrigger_lowirq(unsigned int irq)
219 {
220 	unsigned int mask = SA1111_IRQMASK_LO(irq);
221 	void __iomem *mapbase = get_irq_chipdata(irq);
222 	unsigned long ip0;
223 	int i;
224 
225 	ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
226 	for (i = 0; i < 8; i++) {
227 		sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
228 		sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
229 		if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
230 			break;
231 	}
232 
233 	if (i == 8)
234 		printk(KERN_ERR "Danger Will Robinson: failed to "
235 			"re-trigger IRQ%d\n", irq);
236 	return i == 8 ? -1 : 0;
237 }
238 
239 static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
240 {
241 	unsigned int mask = SA1111_IRQMASK_LO(irq);
242 	void __iomem *mapbase = get_irq_chipdata(irq);
243 	unsigned long ip0;
244 
245 	if (flags == IRQT_PROBE)
246 		return 0;
247 
248 	if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
249 		return -EINVAL;
250 
251 	ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
252 	if (flags & __IRQT_RISEDGE)
253 		ip0 &= ~mask;
254 	else
255 		ip0 |= mask;
256 	sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
257 	sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
258 
259 	return 0;
260 }
261 
262 static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
263 {
264 	unsigned int mask = SA1111_IRQMASK_LO(irq);
265 	void __iomem *mapbase = get_irq_chipdata(irq);
266 	unsigned long we0;
267 
268 	we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
269 	if (on)
270 		we0 |= mask;
271 	else
272 		we0 &= ~mask;
273 	sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
274 
275 	return 0;
276 }
277 
278 static struct irqchip sa1111_low_chip = {
279 	.ack		= sa1111_ack_irq,
280 	.mask		= sa1111_mask_lowirq,
281 	.unmask		= sa1111_unmask_lowirq,
282 	.retrigger	= sa1111_retrigger_lowirq,
283 	.set_type	= sa1111_type_lowirq,
284 	.set_wake	= sa1111_wake_lowirq,
285 };
286 
287 static void sa1111_mask_highirq(unsigned int irq)
288 {
289 	void __iomem *mapbase = get_irq_chipdata(irq);
290 	unsigned long ie1;
291 
292 	ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
293 	ie1 &= ~SA1111_IRQMASK_HI(irq);
294 	sa1111_writel(ie1, mapbase + SA1111_INTEN1);
295 }
296 
297 static void sa1111_unmask_highirq(unsigned int irq)
298 {
299 	void __iomem *mapbase = get_irq_chipdata(irq);
300 	unsigned long ie1;
301 
302 	ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
303 	ie1 |= SA1111_IRQMASK_HI(irq);
304 	sa1111_writel(ie1, mapbase + SA1111_INTEN1);
305 }
306 
307 /*
308  * Attempt to re-trigger the interrupt.  The SA1111 contains a register
309  * (INTSET) which claims to do this.  However, in practice no amount of
310  * manipulation of INTEN and INTSET guarantees that the interrupt will
311  * be triggered.  In fact, its very difficult, if not impossible to get
312  * INTSET to re-trigger the interrupt.
313  */
314 static int sa1111_retrigger_highirq(unsigned int irq)
315 {
316 	unsigned int mask = SA1111_IRQMASK_HI(irq);
317 	void __iomem *mapbase = get_irq_chipdata(irq);
318 	unsigned long ip1;
319 	int i;
320 
321 	ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
322 	for (i = 0; i < 8; i++) {
323 		sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
324 		sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
325 		if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
326 			break;
327 	}
328 
329 	if (i == 8)
330 		printk(KERN_ERR "Danger Will Robinson: failed to "
331 			"re-trigger IRQ%d\n", irq);
332 	return i == 8 ? -1 : 0;
333 }
334 
335 static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
336 {
337 	unsigned int mask = SA1111_IRQMASK_HI(irq);
338 	void __iomem *mapbase = get_irq_chipdata(irq);
339 	unsigned long ip1;
340 
341 	if (flags == IRQT_PROBE)
342 		return 0;
343 
344 	if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
345 		return -EINVAL;
346 
347 	ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
348 	if (flags & __IRQT_RISEDGE)
349 		ip1 &= ~mask;
350 	else
351 		ip1 |= mask;
352 	sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
353 	sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
354 
355 	return 0;
356 }
357 
358 static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
359 {
360 	unsigned int mask = SA1111_IRQMASK_HI(irq);
361 	void __iomem *mapbase = get_irq_chipdata(irq);
362 	unsigned long we1;
363 
364 	we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
365 	if (on)
366 		we1 |= mask;
367 	else
368 		we1 &= ~mask;
369 	sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
370 
371 	return 0;
372 }
373 
374 static struct irqchip sa1111_high_chip = {
375 	.ack		= sa1111_ack_irq,
376 	.mask		= sa1111_mask_highirq,
377 	.unmask		= sa1111_unmask_highirq,
378 	.retrigger	= sa1111_retrigger_highirq,
379 	.set_type	= sa1111_type_highirq,
380 	.set_wake	= sa1111_wake_highirq,
381 };
382 
383 static void sa1111_setup_irq(struct sa1111 *sachip)
384 {
385 	void __iomem *irqbase = sachip->base + SA1111_INTC;
386 	unsigned int irq;
387 
388 	/*
389 	 * We're guaranteed that this region hasn't been taken.
390 	 */
391 	request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
392 
393 	/* disable all IRQs */
394 	sa1111_writel(0, irqbase + SA1111_INTEN0);
395 	sa1111_writel(0, irqbase + SA1111_INTEN1);
396 	sa1111_writel(0, irqbase + SA1111_WAKEEN0);
397 	sa1111_writel(0, irqbase + SA1111_WAKEEN1);
398 
399 	/*
400 	 * detect on rising edge.  Note: Feb 2001 Errata for SA1111
401 	 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
402 	 */
403 	sa1111_writel(0, irqbase + SA1111_INTPOL0);
404 	sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
405 		      SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
406 		      irqbase + SA1111_INTPOL1);
407 
408 	/* clear all IRQs */
409 	sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
410 	sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
411 
412 	for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
413 		set_irq_chip(irq, &sa1111_low_chip);
414 		set_irq_chipdata(irq, irqbase);
415 		set_irq_handler(irq, do_edge_IRQ);
416 		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
417 	}
418 
419 	for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
420 		set_irq_chip(irq, &sa1111_high_chip);
421 		set_irq_chipdata(irq, irqbase);
422 		set_irq_handler(irq, do_edge_IRQ);
423 		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
424 	}
425 
426 	/*
427 	 * Register SA1111 interrupt
428 	 */
429 	set_irq_type(sachip->irq, IRQT_RISING);
430 	set_irq_data(sachip->irq, irqbase);
431 	set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
432 }
433 
434 /*
435  * Bring the SA1111 out of reset.  This requires a set procedure:
436  *  1. nRESET asserted (by hardware)
437  *  2. CLK turned on from SA1110
438  *  3. nRESET deasserted
439  *  4. VCO turned on, PLL_BYPASS turned off
440  *  5. Wait lock time, then assert RCLKEn
441  *  7. PCR set to allow clocking of individual functions
442  *
443  * Until we've done this, the only registers we can access are:
444  *   SBI_SKCR
445  *   SBI_SMCR
446  *   SBI_SKID
447  */
448 static void sa1111_wake(struct sa1111 *sachip)
449 {
450 	unsigned long flags, r;
451 
452 	spin_lock_irqsave(&sachip->lock, flags);
453 
454 #ifdef CONFIG_ARCH_SA1100
455 	/*
456 	 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
457 	 * (SA-1110 Developer's Manual, section 9.1.2.1)
458 	 */
459 	GAFR |= GPIO_32_768kHz;
460 	GPDR |= GPIO_32_768kHz;
461 	TUCR = TUCR_3_6864MHz;
462 #elif CONFIG_ARCH_PXA
463 	pxa_gpio_mode(GPIO11_3_6MHz_MD);
464 #else
465 #error missing clock setup
466 #endif
467 
468 	/*
469 	 * Turn VCO on, and disable PLL Bypass.
470 	 */
471 	r = sa1111_readl(sachip->base + SA1111_SKCR);
472 	r &= ~SKCR_VCO_OFF;
473 	sa1111_writel(r, sachip->base + SA1111_SKCR);
474 	r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
475 	sa1111_writel(r, sachip->base + SA1111_SKCR);
476 
477 	/*
478 	 * Wait lock time.  SA1111 manual _doesn't_
479 	 * specify a figure for this!  We choose 100us.
480 	 */
481 	udelay(100);
482 
483 	/*
484 	 * Enable RCLK.  We also ensure that RDYEN is set.
485 	 */
486 	r |= SKCR_RCLKEN | SKCR_RDYEN;
487 	sa1111_writel(r, sachip->base + SA1111_SKCR);
488 
489 	/*
490 	 * Wait 14 RCLK cycles for the chip to finish coming out
491 	 * of reset. (RCLK=24MHz).  This is 590ns.
492 	 */
493 	udelay(1);
494 
495 	/*
496 	 * Ensure all clocks are initially off.
497 	 */
498 	sa1111_writel(0, sachip->base + SA1111_SKPCR);
499 
500 	spin_unlock_irqrestore(&sachip->lock, flags);
501 }
502 
503 #ifdef CONFIG_ARCH_SA1100
504 
505 static u32 sa1111_dma_mask[] = {
506 	~0,
507 	~(1 << 20),
508 	~(1 << 23),
509 	~(1 << 24),
510 	~(1 << 25),
511 	~(1 << 20),
512 	~(1 << 20),
513 	0,
514 };
515 
516 /*
517  * Configure the SA1111 shared memory controller.
518  */
519 void
520 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
521 		     unsigned int cas_latency)
522 {
523 	unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
524 
525 	if (cas_latency == 3)
526 		smcr |= SMCR_CLAT;
527 
528 	sa1111_writel(smcr, sachip->base + SA1111_SMCR);
529 
530 	/*
531 	 * Now clear the bits in the DMA mask to work around the SA1111
532 	 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
533 	 * Chip Specification Update, June 2000, Erratum #7).
534 	 */
535 	if (sachip->dev->dma_mask)
536 		*sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
537 
538 	sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
539 }
540 
541 #endif
542 
543 static void sa1111_dev_release(struct device *_dev)
544 {
545 	struct sa1111_dev *dev = SA1111_DEV(_dev);
546 
547 	release_resource(&dev->res);
548 	kfree(dev);
549 }
550 
551 static int
552 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
553 		      struct sa1111_dev_info *info)
554 {
555 	struct sa1111_dev *dev;
556 	int ret;
557 
558 	dev = kmalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
559 	if (!dev) {
560 		ret = -ENOMEM;
561 		goto out;
562 	}
563 	memset(dev, 0, sizeof(struct sa1111_dev));
564 
565 	snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id),
566 		 "%4.4lx", info->offset);
567 
568 	dev->devid	 = info->devid;
569 	dev->dev.parent  = sachip->dev;
570 	dev->dev.bus     = &sa1111_bus_type;
571 	dev->dev.release = sa1111_dev_release;
572 	dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
573 	dev->res.start   = sachip->phys + info->offset;
574 	dev->res.end     = dev->res.start + 511;
575 	dev->res.name    = dev->dev.bus_id;
576 	dev->res.flags   = IORESOURCE_MEM;
577 	dev->mapbase     = sachip->base + info->offset;
578 	dev->skpcr_mask  = info->skpcr_mask;
579 	memmove(dev->irq, info->irq, sizeof(dev->irq));
580 
581 	ret = request_resource(parent, &dev->res);
582 	if (ret) {
583 		printk("SA1111: failed to allocate resource for %s\n",
584 			dev->res.name);
585 		kfree(dev);
586 		goto out;
587 	}
588 
589 
590 	ret = device_register(&dev->dev);
591 	if (ret) {
592 		release_resource(&dev->res);
593 		kfree(dev);
594 		goto out;
595 	}
596 
597 	/*
598 	 * If the parent device has a DMA mask associated with it,
599 	 * propagate it down to the children.
600 	 */
601 	if (sachip->dev->dma_mask) {
602 		dev->dma_mask = *sachip->dev->dma_mask;
603 		dev->dev.dma_mask = &dev->dma_mask;
604 
605 		if (dev->dma_mask != 0xffffffffUL) {
606 			ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
607 			if (ret) {
608 				printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id);
609 				device_unregister(&dev->dev);
610 			}
611 		}
612 	}
613 
614 out:
615 	return ret;
616 }
617 
618 /**
619  *	sa1111_probe - probe for a single SA1111 chip.
620  *	@phys_addr: physical address of device.
621  *
622  *	Probe for a SA1111 chip.  This must be called
623  *	before any other SA1111-specific code.
624  *
625  *	Returns:
626  *	%-ENODEV	device not found.
627  *	%-EBUSY		physical address already marked in-use.
628  *	%0		successful.
629  */
630 static int
631 __sa1111_probe(struct device *me, struct resource *mem, int irq)
632 {
633 	struct sa1111 *sachip;
634 	unsigned long id;
635 	unsigned int has_devs, val;
636 	int i, ret = -ENODEV;
637 
638 	sachip = kmalloc(sizeof(struct sa1111), GFP_KERNEL);
639 	if (!sachip)
640 		return -ENOMEM;
641 
642 	memset(sachip, 0, sizeof(struct sa1111));
643 
644 	spin_lock_init(&sachip->lock);
645 
646 	sachip->dev = me;
647 	dev_set_drvdata(sachip->dev, sachip);
648 
649 	sachip->phys = mem->start;
650 	sachip->irq = irq;
651 
652 	/*
653 	 * Map the whole region.  This also maps the
654 	 * registers for our children.
655 	 */
656 	sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
657 	if (!sachip->base) {
658 		ret = -ENOMEM;
659 		goto out;
660 	}
661 
662 	/*
663 	 * Probe for the chip.  Only touch the SBI registers.
664 	 */
665 	id = sa1111_readl(sachip->base + SA1111_SKID);
666 	if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
667 		printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
668 		ret = -ENODEV;
669 		goto unmap;
670 	}
671 
672 	printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
673 		"silicon revision %lx, metal revision %lx\n",
674 		(id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
675 
676 	/*
677 	 * We found it.  Wake the chip up, and initialise.
678 	 */
679 	sa1111_wake(sachip);
680 
681 #ifdef CONFIG_ARCH_SA1100
682 	/*
683 	 * The SDRAM configuration of the SA1110 and the SA1111 must
684 	 * match.  This is very important to ensure that SA1111 accesses
685 	 * don't corrupt the SDRAM.  Note that this ungates the SA1111's
686 	 * MBGNT signal, so we must have called sa1110_mb_disable()
687 	 * beforehand.
688 	 */
689 	sa1111_configure_smc(sachip, 1,
690 			     FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
691 			     FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
692 
693 	/*
694 	 * We only need to turn on DCLK whenever we want to use the
695 	 * DMA.  It can otherwise be held firmly in the off position.
696 	 * (currently, we always enable it.)
697 	 */
698 	val = sa1111_readl(sachip->base + SA1111_SKPCR);
699 	sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
700 
701 	/*
702 	 * Enable the SA1110 memory bus request and grant signals.
703 	 */
704 	sa1110_mb_enable();
705 #endif
706 
707 	/*
708 	 * The interrupt controller must be initialised before any
709 	 * other device to ensure that the interrupts are available.
710 	 */
711 	if (sachip->irq != NO_IRQ)
712 		sa1111_setup_irq(sachip);
713 
714 	g_sa1111 = sachip;
715 
716 	has_devs = ~0;
717 	if (machine_is_assabet() || machine_is_jornada720() ||
718 	    machine_is_badge4())
719 		has_devs &= ~(1 << 4);
720 	else
721 		has_devs &= ~(1 << 1);
722 
723 	for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
724 		if (has_devs & (1 << i))
725 			sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
726 
727 	return 0;
728 
729  unmap:
730 	iounmap(sachip->base);
731  out:
732 	kfree(sachip);
733 	return ret;
734 }
735 
736 static int sa1111_remove_one(struct device *dev, void *data)
737 {
738 	device_unregister(dev);
739 	return 0;
740 }
741 
742 static void __sa1111_remove(struct sa1111 *sachip)
743 {
744 	void __iomem *irqbase = sachip->base + SA1111_INTC;
745 
746 	device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
747 
748 	/* disable all IRQs */
749 	sa1111_writel(0, irqbase + SA1111_INTEN0);
750 	sa1111_writel(0, irqbase + SA1111_INTEN1);
751 	sa1111_writel(0, irqbase + SA1111_WAKEEN0);
752 	sa1111_writel(0, irqbase + SA1111_WAKEEN1);
753 
754 	if (sachip->irq != NO_IRQ) {
755 		set_irq_chained_handler(sachip->irq, NULL);
756 		set_irq_data(sachip->irq, NULL);
757 
758 		release_mem_region(sachip->phys + SA1111_INTC, 512);
759 	}
760 
761 	iounmap(sachip->base);
762 	kfree(sachip);
763 }
764 
765 /*
766  * According to the "Intel StrongARM SA-1111 Microprocessor Companion
767  * Chip Specification Update" (June 2000), erratum #7, there is a
768  * significant bug in the SA1111 SDRAM shared memory controller.  If
769  * an access to a region of memory above 1MB relative to the bank base,
770  * it is important that address bit 10 _NOT_ be asserted. Depending
771  * on the configuration of the RAM, bit 10 may correspond to one
772  * of several different (processor-relative) address bits.
773  *
774  * This routine only identifies whether or not a given DMA address
775  * is susceptible to the bug.
776  *
777  * This should only get called for sa1111_device types due to the
778  * way we configure our device dma_masks.
779  */
780 int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
781 {
782 	/*
783 	 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
784 	 * User's Guide" mentions that jumpers R51 and R52 control the
785 	 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
786 	 * SDRAM bank 1 on Neponset). The default configuration selects
787 	 * Assabet, so any address in bank 1 is necessarily invalid.
788 	 */
789 	return ((machine_is_assabet() || machine_is_pfs168()) &&
790 		(addr >= 0xc8000000 || (addr + size) >= 0xc8000000));
791 }
792 
793 struct sa1111_save_data {
794 	unsigned int	skcr;
795 	unsigned int	skpcr;
796 	unsigned int	skcdr;
797 	unsigned char	skaud;
798 	unsigned char	skpwm0;
799 	unsigned char	skpwm1;
800 
801 	/*
802 	 * Interrupt controller
803 	 */
804 	unsigned int	intpol0;
805 	unsigned int	intpol1;
806 	unsigned int	inten0;
807 	unsigned int	inten1;
808 	unsigned int	wakepol0;
809 	unsigned int	wakepol1;
810 	unsigned int	wakeen0;
811 	unsigned int	wakeen1;
812 };
813 
814 #ifdef CONFIG_PM
815 
816 static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
817 {
818 	struct sa1111 *sachip = platform_get_drvdata(dev);
819 	struct sa1111_save_data *save;
820 	unsigned long flags;
821 	unsigned int val;
822 	void __iomem *base;
823 
824 	save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
825 	if (!save)
826 		return -ENOMEM;
827 	dev->dev.power.saved_state = save;
828 
829 	spin_lock_irqsave(&sachip->lock, flags);
830 
831 	/*
832 	 * Save state.
833 	 */
834 	base = sachip->base;
835 	save->skcr     = sa1111_readl(base + SA1111_SKCR);
836 	save->skpcr    = sa1111_readl(base + SA1111_SKPCR);
837 	save->skcdr    = sa1111_readl(base + SA1111_SKCDR);
838 	save->skaud    = sa1111_readl(base + SA1111_SKAUD);
839 	save->skpwm0   = sa1111_readl(base + SA1111_SKPWM0);
840 	save->skpwm1   = sa1111_readl(base + SA1111_SKPWM1);
841 
842 	base = sachip->base + SA1111_INTC;
843 	save->intpol0  = sa1111_readl(base + SA1111_INTPOL0);
844 	save->intpol1  = sa1111_readl(base + SA1111_INTPOL1);
845 	save->inten0   = sa1111_readl(base + SA1111_INTEN0);
846 	save->inten1   = sa1111_readl(base + SA1111_INTEN1);
847 	save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
848 	save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
849 	save->wakeen0  = sa1111_readl(base + SA1111_WAKEEN0);
850 	save->wakeen1  = sa1111_readl(base + SA1111_WAKEEN1);
851 
852 	/*
853 	 * Disable.
854 	 */
855 	val = sa1111_readl(sachip->base + SA1111_SKCR);
856 	sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
857 	sa1111_writel(0, sachip->base + SA1111_SKPWM0);
858 	sa1111_writel(0, sachip->base + SA1111_SKPWM1);
859 
860 	spin_unlock_irqrestore(&sachip->lock, flags);
861 
862 	return 0;
863 }
864 
865 /*
866  *	sa1111_resume - Restore the SA1111 device state.
867  *	@dev: device to restore
868  *
869  *	Restore the general state of the SA1111; clock control and
870  *	interrupt controller.  Other parts of the SA1111 must be
871  *	restored by their respective drivers, and must be called
872  *	via LDM after this function.
873  */
874 static int sa1111_resume(struct platform_device *dev)
875 {
876 	struct sa1111 *sachip = platform_get_drvdata(dev);
877 	struct sa1111_save_data *save;
878 	unsigned long flags, id;
879 	void __iomem *base;
880 
881 	save = (struct sa1111_save_data *)dev->dev.power.saved_state;
882 	if (!save)
883 		return 0;
884 
885 	spin_lock_irqsave(&sachip->lock, flags);
886 
887 	/*
888 	 * Ensure that the SA1111 is still here.
889 	 * FIXME: shouldn't do this here.
890 	 */
891 	id = sa1111_readl(sachip->base + SA1111_SKID);
892 	if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
893 		__sa1111_remove(sachip);
894 		platform_set_drvdata(dev, NULL);
895 		kfree(save);
896 		return 0;
897 	}
898 
899 	/*
900 	 * First of all, wake up the chip.
901 	 */
902 	sa1111_wake(sachip);
903 	sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
904 	sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
905 
906 	base = sachip->base;
907 	sa1111_writel(save->skcr,     base + SA1111_SKCR);
908 	sa1111_writel(save->skpcr,    base + SA1111_SKPCR);
909 	sa1111_writel(save->skcdr,    base + SA1111_SKCDR);
910 	sa1111_writel(save->skaud,    base + SA1111_SKAUD);
911 	sa1111_writel(save->skpwm0,   base + SA1111_SKPWM0);
912 	sa1111_writel(save->skpwm1,   base + SA1111_SKPWM1);
913 
914 	base = sachip->base + SA1111_INTC;
915 	sa1111_writel(save->intpol0,  base + SA1111_INTPOL0);
916 	sa1111_writel(save->intpol1,  base + SA1111_INTPOL1);
917 	sa1111_writel(save->inten0,   base + SA1111_INTEN0);
918 	sa1111_writel(save->inten1,   base + SA1111_INTEN1);
919 	sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
920 	sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
921 	sa1111_writel(save->wakeen0,  base + SA1111_WAKEEN0);
922 	sa1111_writel(save->wakeen1,  base + SA1111_WAKEEN1);
923 
924 	spin_unlock_irqrestore(&sachip->lock, flags);
925 
926 	dev->dev.power.saved_state = NULL;
927 	kfree(save);
928 
929 	return 0;
930 }
931 
932 #else
933 #define sa1111_suspend NULL
934 #define sa1111_resume  NULL
935 #endif
936 
937 static int sa1111_probe(struct platform_device *pdev)
938 {
939 	struct resource *mem;
940 	int irq;
941 
942 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
943 	if (!mem)
944 		return -EINVAL;
945 	irq = platform_get_irq(pdev, 0);
946 
947 	return __sa1111_probe(&pdev->dev, mem, irq);
948 }
949 
950 static int sa1111_remove(struct platform_device *pdev)
951 {
952 	struct sa1111 *sachip = platform_get_drvdata(pdev);
953 
954 	if (sachip) {
955 		__sa1111_remove(sachip);
956 		platform_set_drvdata(pdev, NULL);
957 
958 #ifdef CONFIG_PM
959 		kfree(pdev->dev.power.saved_state);
960 		pdev->dev.power.saved_state = NULL;
961 #endif
962 	}
963 
964 	return 0;
965 }
966 
967 /*
968  *	Not sure if this should be on the system bus or not yet.
969  *	We really want some way to register a system device at
970  *	the per-machine level, and then have this driver pick
971  *	up the registered devices.
972  *
973  *	We also need to handle the SDRAM configuration for
974  *	PXA250/SA1110 machine classes.
975  */
976 static struct platform_driver sa1111_device_driver = {
977 	.probe		= sa1111_probe,
978 	.remove		= sa1111_remove,
979 	.suspend	= sa1111_suspend,
980 	.resume		= sa1111_resume,
981 	.driver		= {
982 		.name	= "sa1111",
983 	},
984 };
985 
986 /*
987  *	Get the parent device driver (us) structure
988  *	from a child function device
989  */
990 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
991 {
992 	return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
993 }
994 
995 /*
996  * The bits in the opdiv field are non-linear.
997  */
998 static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
999 
1000 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1001 {
1002 	unsigned int skcdr, fbdiv, ipdiv, opdiv;
1003 
1004 	skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1005 
1006 	fbdiv = (skcdr & 0x007f) + 2;
1007 	ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1008 	opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1009 
1010 	return 3686400 * fbdiv / (ipdiv * opdiv);
1011 }
1012 
1013 /**
1014  *	sa1111_pll_clock - return the current PLL clock frequency.
1015  *	@sadev: SA1111 function block
1016  *
1017  *	BUG: we should look at SKCR.  We also blindly believe that
1018  *	the chip is being fed with the 3.6864MHz clock.
1019  *
1020  *	Returns the PLL clock in Hz.
1021  */
1022 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1023 {
1024 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1025 
1026 	return __sa1111_pll_clock(sachip);
1027 }
1028 
1029 /**
1030  *	sa1111_select_audio_mode - select I2S or AC link mode
1031  *	@sadev: SA1111 function block
1032  *	@mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1033  *
1034  *	Frob the SKCR to select AC Link mode or I2S mode for
1035  *	the audio block.
1036  */
1037 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1038 {
1039 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1040 	unsigned long flags;
1041 	unsigned int val;
1042 
1043 	spin_lock_irqsave(&sachip->lock, flags);
1044 
1045 	val = sa1111_readl(sachip->base + SA1111_SKCR);
1046 	if (mode == SA1111_AUDIO_I2S) {
1047 		val &= ~SKCR_SELAC;
1048 	} else {
1049 		val |= SKCR_SELAC;
1050 	}
1051 	sa1111_writel(val, sachip->base + SA1111_SKCR);
1052 
1053 	spin_unlock_irqrestore(&sachip->lock, flags);
1054 }
1055 
1056 /**
1057  *	sa1111_set_audio_rate - set the audio sample rate
1058  *	@sadev: SA1111 SAC function block
1059  *	@rate: sample rate to select
1060  */
1061 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1062 {
1063 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1064 	unsigned int div;
1065 
1066 	if (sadev->devid != SA1111_DEVID_SAC)
1067 		return -EINVAL;
1068 
1069 	div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1070 	if (div == 0)
1071 		div = 1;
1072 	if (div > 128)
1073 		div = 128;
1074 
1075 	sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1076 
1077 	return 0;
1078 }
1079 
1080 /**
1081  *	sa1111_get_audio_rate - get the audio sample rate
1082  *	@sadev: SA1111 SAC function block device
1083  */
1084 int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1085 {
1086 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1087 	unsigned long div;
1088 
1089 	if (sadev->devid != SA1111_DEVID_SAC)
1090 		return -EINVAL;
1091 
1092 	div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1093 
1094 	return __sa1111_pll_clock(sachip) / (256 * div);
1095 }
1096 
1097 void sa1111_set_io_dir(struct sa1111_dev *sadev,
1098 		       unsigned int bits, unsigned int dir,
1099 		       unsigned int sleep_dir)
1100 {
1101 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1102 	unsigned long flags;
1103 	unsigned int val;
1104 	void __iomem *gpio = sachip->base + SA1111_GPIO;
1105 
1106 #define MODIFY_BITS(port, mask, dir)		\
1107 	if (mask) {				\
1108 		val = sa1111_readl(port);	\
1109 		val &= ~(mask);			\
1110 		val |= (dir) & (mask);		\
1111 		sa1111_writel(val, port);	\
1112 	}
1113 
1114 	spin_lock_irqsave(&sachip->lock, flags);
1115 	MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
1116 	MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
1117 	MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
1118 
1119 	MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
1120 	MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
1121 	MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
1122 	spin_unlock_irqrestore(&sachip->lock, flags);
1123 }
1124 
1125 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1126 {
1127 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1128 	unsigned long flags;
1129 	unsigned int val;
1130 	void __iomem *gpio = sachip->base + SA1111_GPIO;
1131 
1132 	spin_lock_irqsave(&sachip->lock, flags);
1133 	MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
1134 	MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
1135 	MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
1136 	spin_unlock_irqrestore(&sachip->lock, flags);
1137 }
1138 
1139 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1140 {
1141 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1142 	unsigned long flags;
1143 	unsigned int val;
1144 	void __iomem *gpio = sachip->base + SA1111_GPIO;
1145 
1146 	spin_lock_irqsave(&sachip->lock, flags);
1147 	MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
1148 	MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
1149 	MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
1150 	spin_unlock_irqrestore(&sachip->lock, flags);
1151 }
1152 
1153 /*
1154  * Individual device operations.
1155  */
1156 
1157 /**
1158  *	sa1111_enable_device - enable an on-chip SA1111 function block
1159  *	@sadev: SA1111 function block device to enable
1160  */
1161 void sa1111_enable_device(struct sa1111_dev *sadev)
1162 {
1163 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1164 	unsigned long flags;
1165 	unsigned int val;
1166 
1167 	spin_lock_irqsave(&sachip->lock, flags);
1168 	val = sa1111_readl(sachip->base + SA1111_SKPCR);
1169 	sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1170 	spin_unlock_irqrestore(&sachip->lock, flags);
1171 }
1172 
1173 /**
1174  *	sa1111_disable_device - disable an on-chip SA1111 function block
1175  *	@sadev: SA1111 function block device to disable
1176  */
1177 void sa1111_disable_device(struct sa1111_dev *sadev)
1178 {
1179 	struct sa1111 *sachip = sa1111_chip_driver(sadev);
1180 	unsigned long flags;
1181 	unsigned int val;
1182 
1183 	spin_lock_irqsave(&sachip->lock, flags);
1184 	val = sa1111_readl(sachip->base + SA1111_SKPCR);
1185 	sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1186 	spin_unlock_irqrestore(&sachip->lock, flags);
1187 }
1188 
1189 /*
1190  *	SA1111 "Register Access Bus."
1191  *
1192  *	We model this as a regular bus type, and hang devices directly
1193  *	off this.
1194  */
1195 static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1196 {
1197 	struct sa1111_dev *dev = SA1111_DEV(_dev);
1198 	struct sa1111_driver *drv = SA1111_DRV(_drv);
1199 
1200 	return dev->devid == drv->devid;
1201 }
1202 
1203 static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
1204 {
1205 	struct sa1111_dev *sadev = SA1111_DEV(dev);
1206 	struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1207 	int ret = 0;
1208 
1209 	if (drv && drv->suspend)
1210 		ret = drv->suspend(sadev, state);
1211 	return ret;
1212 }
1213 
1214 static int sa1111_bus_resume(struct device *dev)
1215 {
1216 	struct sa1111_dev *sadev = SA1111_DEV(dev);
1217 	struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1218 	int ret = 0;
1219 
1220 	if (drv && drv->resume)
1221 		ret = drv->resume(sadev);
1222 	return ret;
1223 }
1224 
1225 static int sa1111_bus_probe(struct device *dev)
1226 {
1227 	struct sa1111_dev *sadev = SA1111_DEV(dev);
1228 	struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1229 	int ret = -ENODEV;
1230 
1231 	if (drv->probe)
1232 		ret = drv->probe(sadev);
1233 	return ret;
1234 }
1235 
1236 static int sa1111_bus_remove(struct device *dev)
1237 {
1238 	struct sa1111_dev *sadev = SA1111_DEV(dev);
1239 	struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1240 	int ret = 0;
1241 
1242 	if (drv->remove)
1243 		ret = drv->remove(sadev);
1244 	return ret;
1245 }
1246 
1247 struct bus_type sa1111_bus_type = {
1248 	.name		= "sa1111-rab",
1249 	.match		= sa1111_match,
1250 	.suspend	= sa1111_bus_suspend,
1251 	.resume		= sa1111_bus_resume,
1252 };
1253 
1254 int sa1111_driver_register(struct sa1111_driver *driver)
1255 {
1256 	driver->drv.probe = sa1111_bus_probe;
1257 	driver->drv.remove = sa1111_bus_remove;
1258 	driver->drv.bus = &sa1111_bus_type;
1259 	return driver_register(&driver->drv);
1260 }
1261 
1262 void sa1111_driver_unregister(struct sa1111_driver *driver)
1263 {
1264 	driver_unregister(&driver->drv);
1265 }
1266 
1267 static int __init sa1111_init(void)
1268 {
1269 	int ret = bus_register(&sa1111_bus_type);
1270 	if (ret == 0)
1271 		platform_driver_register(&sa1111_device_driver);
1272 	return ret;
1273 }
1274 
1275 static void __exit sa1111_exit(void)
1276 {
1277 	platform_driver_unregister(&sa1111_device_driver);
1278 	bus_unregister(&sa1111_bus_type);
1279 }
1280 
1281 subsys_initcall(sa1111_init);
1282 module_exit(sa1111_exit);
1283 
1284 MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1285 MODULE_LICENSE("GPL");
1286 
1287 EXPORT_SYMBOL(sa1111_select_audio_mode);
1288 EXPORT_SYMBOL(sa1111_set_audio_rate);
1289 EXPORT_SYMBOL(sa1111_get_audio_rate);
1290 EXPORT_SYMBOL(sa1111_set_io_dir);
1291 EXPORT_SYMBOL(sa1111_set_io);
1292 EXPORT_SYMBOL(sa1111_set_sleep_io);
1293 EXPORT_SYMBOL(sa1111_enable_device);
1294 EXPORT_SYMBOL(sa1111_disable_device);
1295 EXPORT_SYMBOL(sa1111_pll_clock);
1296 EXPORT_SYMBOL(sa1111_bus_type);
1297 EXPORT_SYMBOL(sa1111_driver_register);
1298 EXPORT_SYMBOL(sa1111_driver_unregister);
1299