1 /* 2 * linux/arch/arm/common/sa1111.c 3 * 4 * SA1111 support 5 * 6 * Original code by John Dorsey 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This file contains all generic SA1111 support. 13 * 14 * All initialization functions provided here are intended to be called 15 * from machine specific code with proper arguments when required. 16 */ 17 #include <linux/module.h> 18 #include <linux/init.h> 19 #include <linux/irq.h> 20 #include <linux/kernel.h> 21 #include <linux/delay.h> 22 #include <linux/errno.h> 23 #include <linux/ioport.h> 24 #include <linux/platform_device.h> 25 #include <linux/slab.h> 26 #include <linux/spinlock.h> 27 #include <linux/dma-mapping.h> 28 #include <linux/clk.h> 29 #include <linux/io.h> 30 31 #include <mach/hardware.h> 32 #include <asm/mach/irq.h> 33 #include <asm/mach-types.h> 34 #include <asm/sizes.h> 35 36 #include <asm/hardware/sa1111.h> 37 38 /* SA1111 IRQs */ 39 #define IRQ_GPAIN0 (0) 40 #define IRQ_GPAIN1 (1) 41 #define IRQ_GPAIN2 (2) 42 #define IRQ_GPAIN3 (3) 43 #define IRQ_GPBIN0 (4) 44 #define IRQ_GPBIN1 (5) 45 #define IRQ_GPBIN2 (6) 46 #define IRQ_GPBIN3 (7) 47 #define IRQ_GPBIN4 (8) 48 #define IRQ_GPBIN5 (9) 49 #define IRQ_GPCIN0 (10) 50 #define IRQ_GPCIN1 (11) 51 #define IRQ_GPCIN2 (12) 52 #define IRQ_GPCIN3 (13) 53 #define IRQ_GPCIN4 (14) 54 #define IRQ_GPCIN5 (15) 55 #define IRQ_GPCIN6 (16) 56 #define IRQ_GPCIN7 (17) 57 #define IRQ_MSTXINT (18) 58 #define IRQ_MSRXINT (19) 59 #define IRQ_MSSTOPERRINT (20) 60 #define IRQ_TPTXINT (21) 61 #define IRQ_TPRXINT (22) 62 #define IRQ_TPSTOPERRINT (23) 63 #define SSPXMTINT (24) 64 #define SSPRCVINT (25) 65 #define SSPROR (26) 66 #define AUDXMTDMADONEA (32) 67 #define AUDRCVDMADONEA (33) 68 #define AUDXMTDMADONEB (34) 69 #define AUDRCVDMADONEB (35) 70 #define AUDTFSR (36) 71 #define AUDRFSR (37) 72 #define AUDTUR (38) 73 #define AUDROR (39) 74 #define AUDDTS (40) 75 #define AUDRDD (41) 76 #define AUDSTO (42) 77 #define IRQ_USBPWR (43) 78 #define IRQ_HCIM (44) 79 #define IRQ_HCIBUFFACC (45) 80 #define IRQ_HCIRMTWKP (46) 81 #define IRQ_NHCIMFCIR (47) 82 #define IRQ_USB_PORT_RESUME (48) 83 #define IRQ_S0_READY_NINT (49) 84 #define IRQ_S1_READY_NINT (50) 85 #define IRQ_S0_CD_VALID (51) 86 #define IRQ_S1_CD_VALID (52) 87 #define IRQ_S0_BVD1_STSCHG (53) 88 #define IRQ_S1_BVD1_STSCHG (54) 89 #define SA1111_IRQ_NR (55) 90 91 extern void sa1110_mb_enable(void); 92 extern void sa1110_mb_disable(void); 93 94 /* 95 * We keep the following data for the overall SA1111. Note that the 96 * struct device and struct resource are "fake"; they should be supplied 97 * by the bus above us. However, in the interests of getting all SA1111 98 * drivers converted over to the device model, we provide this as an 99 * anchor point for all the other drivers. 100 */ 101 struct sa1111 { 102 struct device *dev; 103 struct clk *clk; 104 unsigned long phys; 105 int irq; 106 int irq_base; /* base for cascaded on-chip IRQs */ 107 spinlock_t lock; 108 void __iomem *base; 109 struct sa1111_platform_data *pdata; 110 #ifdef CONFIG_PM 111 void *saved_state; 112 #endif 113 }; 114 115 /* 116 * We _really_ need to eliminate this. Its only users 117 * are the PWM and DMA checking code. 118 */ 119 static struct sa1111 *g_sa1111; 120 121 struct sa1111_dev_info { 122 unsigned long offset; 123 unsigned long skpcr_mask; 124 bool dma; 125 unsigned int devid; 126 unsigned int irq[6]; 127 }; 128 129 static struct sa1111_dev_info sa1111_devices[] = { 130 { 131 .offset = SA1111_USB, 132 .skpcr_mask = SKPCR_UCLKEN, 133 .dma = true, 134 .devid = SA1111_DEVID_USB, 135 .irq = { 136 IRQ_USBPWR, 137 IRQ_HCIM, 138 IRQ_HCIBUFFACC, 139 IRQ_HCIRMTWKP, 140 IRQ_NHCIMFCIR, 141 IRQ_USB_PORT_RESUME 142 }, 143 }, 144 { 145 .offset = 0x0600, 146 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, 147 .dma = true, 148 .devid = SA1111_DEVID_SAC, 149 .irq = { 150 AUDXMTDMADONEA, 151 AUDXMTDMADONEB, 152 AUDRCVDMADONEA, 153 AUDRCVDMADONEB 154 }, 155 }, 156 { 157 .offset = 0x0800, 158 .skpcr_mask = SKPCR_SCLKEN, 159 .devid = SA1111_DEVID_SSP, 160 }, 161 { 162 .offset = SA1111_KBD, 163 .skpcr_mask = SKPCR_PTCLKEN, 164 .devid = SA1111_DEVID_PS2_KBD, 165 .irq = { 166 IRQ_TPRXINT, 167 IRQ_TPTXINT 168 }, 169 }, 170 { 171 .offset = SA1111_MSE, 172 .skpcr_mask = SKPCR_PMCLKEN, 173 .devid = SA1111_DEVID_PS2_MSE, 174 .irq = { 175 IRQ_MSRXINT, 176 IRQ_MSTXINT 177 }, 178 }, 179 { 180 .offset = 0x1800, 181 .skpcr_mask = 0, 182 .devid = SA1111_DEVID_PCMCIA, 183 .irq = { 184 IRQ_S0_READY_NINT, 185 IRQ_S0_CD_VALID, 186 IRQ_S0_BVD1_STSCHG, 187 IRQ_S1_READY_NINT, 188 IRQ_S1_CD_VALID, 189 IRQ_S1_BVD1_STSCHG, 190 }, 191 }, 192 }; 193 194 /* 195 * SA1111 interrupt support. Since clearing an IRQ while there are 196 * active IRQs causes the interrupt output to pulse, the upper levels 197 * will call us again if there are more interrupts to process. 198 */ 199 static void 200 sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 201 { 202 unsigned int stat0, stat1, i; 203 struct sa1111 *sachip = irq_get_handler_data(irq); 204 void __iomem *mapbase = sachip->base + SA1111_INTC; 205 206 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); 207 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1); 208 209 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); 210 211 desc->irq_data.chip->irq_ack(&desc->irq_data); 212 213 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); 214 215 if (stat0 == 0 && stat1 == 0) { 216 do_bad_IRQ(irq, desc); 217 return; 218 } 219 220 for (i = 0; stat0; i++, stat0 >>= 1) 221 if (stat0 & 1) 222 generic_handle_irq(i + sachip->irq_base); 223 224 for (i = 32; stat1; i++, stat1 >>= 1) 225 if (stat1 & 1) 226 generic_handle_irq(i + sachip->irq_base); 227 228 /* For level-based interrupts */ 229 desc->irq_data.chip->irq_unmask(&desc->irq_data); 230 } 231 232 #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) 233 #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) 234 235 static void sa1111_ack_irq(struct irq_data *d) 236 { 237 } 238 239 static void sa1111_mask_lowirq(struct irq_data *d) 240 { 241 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 242 void __iomem *mapbase = sachip->base + SA1111_INTC; 243 unsigned long ie0; 244 245 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 246 ie0 &= ~SA1111_IRQMASK_LO(d->irq); 247 writel(ie0, mapbase + SA1111_INTEN0); 248 } 249 250 static void sa1111_unmask_lowirq(struct irq_data *d) 251 { 252 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 253 void __iomem *mapbase = sachip->base + SA1111_INTC; 254 unsigned long ie0; 255 256 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 257 ie0 |= SA1111_IRQMASK_LO(d->irq); 258 sa1111_writel(ie0, mapbase + SA1111_INTEN0); 259 } 260 261 /* 262 * Attempt to re-trigger the interrupt. The SA1111 contains a register 263 * (INTSET) which claims to do this. However, in practice no amount of 264 * manipulation of INTEN and INTSET guarantees that the interrupt will 265 * be triggered. In fact, its very difficult, if not impossible to get 266 * INTSET to re-trigger the interrupt. 267 */ 268 static int sa1111_retrigger_lowirq(struct irq_data *d) 269 { 270 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 271 void __iomem *mapbase = sachip->base + SA1111_INTC; 272 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 273 unsigned long ip0; 274 int i; 275 276 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 277 for (i = 0; i < 8; i++) { 278 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); 279 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 280 if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask) 281 break; 282 } 283 284 if (i == 8) 285 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n", 286 d->irq); 287 return i == 8 ? -1 : 0; 288 } 289 290 static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags) 291 { 292 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 293 void __iomem *mapbase = sachip->base + SA1111_INTC; 294 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 295 unsigned long ip0; 296 297 if (flags == IRQ_TYPE_PROBE) 298 return 0; 299 300 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 301 return -EINVAL; 302 303 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 304 if (flags & IRQ_TYPE_EDGE_RISING) 305 ip0 &= ~mask; 306 else 307 ip0 |= mask; 308 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 309 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); 310 311 return 0; 312 } 313 314 static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on) 315 { 316 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 317 void __iomem *mapbase = sachip->base + SA1111_INTC; 318 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 319 unsigned long we0; 320 321 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); 322 if (on) 323 we0 |= mask; 324 else 325 we0 &= ~mask; 326 sa1111_writel(we0, mapbase + SA1111_WAKEEN0); 327 328 return 0; 329 } 330 331 static struct irq_chip sa1111_low_chip = { 332 .name = "SA1111-l", 333 .irq_ack = sa1111_ack_irq, 334 .irq_mask = sa1111_mask_lowirq, 335 .irq_unmask = sa1111_unmask_lowirq, 336 .irq_retrigger = sa1111_retrigger_lowirq, 337 .irq_set_type = sa1111_type_lowirq, 338 .irq_set_wake = sa1111_wake_lowirq, 339 }; 340 341 static void sa1111_mask_highirq(struct irq_data *d) 342 { 343 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 344 void __iomem *mapbase = sachip->base + SA1111_INTC; 345 unsigned long ie1; 346 347 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 348 ie1 &= ~SA1111_IRQMASK_HI(d->irq); 349 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 350 } 351 352 static void sa1111_unmask_highirq(struct irq_data *d) 353 { 354 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 355 void __iomem *mapbase = sachip->base + SA1111_INTC; 356 unsigned long ie1; 357 358 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 359 ie1 |= SA1111_IRQMASK_HI(d->irq); 360 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 361 } 362 363 /* 364 * Attempt to re-trigger the interrupt. The SA1111 contains a register 365 * (INTSET) which claims to do this. However, in practice no amount of 366 * manipulation of INTEN and INTSET guarantees that the interrupt will 367 * be triggered. In fact, its very difficult, if not impossible to get 368 * INTSET to re-trigger the interrupt. 369 */ 370 static int sa1111_retrigger_highirq(struct irq_data *d) 371 { 372 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 373 void __iomem *mapbase = sachip->base + SA1111_INTC; 374 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 375 unsigned long ip1; 376 int i; 377 378 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 379 for (i = 0; i < 8; i++) { 380 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); 381 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 382 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 383 break; 384 } 385 386 if (i == 8) 387 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n", 388 d->irq); 389 return i == 8 ? -1 : 0; 390 } 391 392 static int sa1111_type_highirq(struct irq_data *d, unsigned int flags) 393 { 394 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 395 void __iomem *mapbase = sachip->base + SA1111_INTC; 396 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 397 unsigned long ip1; 398 399 if (flags == IRQ_TYPE_PROBE) 400 return 0; 401 402 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 403 return -EINVAL; 404 405 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 406 if (flags & IRQ_TYPE_EDGE_RISING) 407 ip1 &= ~mask; 408 else 409 ip1 |= mask; 410 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 411 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); 412 413 return 0; 414 } 415 416 static int sa1111_wake_highirq(struct irq_data *d, unsigned int on) 417 { 418 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 419 void __iomem *mapbase = sachip->base + SA1111_INTC; 420 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 421 unsigned long we1; 422 423 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); 424 if (on) 425 we1 |= mask; 426 else 427 we1 &= ~mask; 428 sa1111_writel(we1, mapbase + SA1111_WAKEEN1); 429 430 return 0; 431 } 432 433 static struct irq_chip sa1111_high_chip = { 434 .name = "SA1111-h", 435 .irq_ack = sa1111_ack_irq, 436 .irq_mask = sa1111_mask_highirq, 437 .irq_unmask = sa1111_unmask_highirq, 438 .irq_retrigger = sa1111_retrigger_highirq, 439 .irq_set_type = sa1111_type_highirq, 440 .irq_set_wake = sa1111_wake_highirq, 441 }; 442 443 static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base) 444 { 445 void __iomem *irqbase = sachip->base + SA1111_INTC; 446 unsigned i, irq; 447 int ret; 448 449 /* 450 * We're guaranteed that this region hasn't been taken. 451 */ 452 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); 453 454 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1); 455 if (ret <= 0) { 456 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n", 457 SA1111_IRQ_NR, ret); 458 if (ret == 0) 459 ret = -EINVAL; 460 return ret; 461 } 462 463 sachip->irq_base = ret; 464 465 /* disable all IRQs */ 466 sa1111_writel(0, irqbase + SA1111_INTEN0); 467 sa1111_writel(0, irqbase + SA1111_INTEN1); 468 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 469 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 470 471 /* 472 * detect on rising edge. Note: Feb 2001 Errata for SA1111 473 * specifies that S0ReadyInt and S1ReadyInt should be '1'. 474 */ 475 sa1111_writel(0, irqbase + SA1111_INTPOL0); 476 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) | 477 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT), 478 irqbase + SA1111_INTPOL1); 479 480 /* clear all IRQs */ 481 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); 482 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); 483 484 for (i = IRQ_GPAIN0; i <= SSPROR; i++) { 485 irq = sachip->irq_base + i; 486 irq_set_chip_and_handler(irq, &sa1111_low_chip, 487 handle_edge_irq); 488 irq_set_chip_data(irq, sachip); 489 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 490 } 491 492 for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) { 493 irq = sachip->irq_base + i; 494 irq_set_chip_and_handler(irq, &sa1111_high_chip, 495 handle_edge_irq); 496 irq_set_chip_data(irq, sachip); 497 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 498 } 499 500 /* 501 * Register SA1111 interrupt 502 */ 503 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); 504 irq_set_handler_data(sachip->irq, sachip); 505 irq_set_chained_handler(sachip->irq, sa1111_irq_handler); 506 507 dev_info(sachip->dev, "Providing IRQ%u-%u\n", 508 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1); 509 510 return 0; 511 } 512 513 /* 514 * Bring the SA1111 out of reset. This requires a set procedure: 515 * 1. nRESET asserted (by hardware) 516 * 2. CLK turned on from SA1110 517 * 3. nRESET deasserted 518 * 4. VCO turned on, PLL_BYPASS turned off 519 * 5. Wait lock time, then assert RCLKEn 520 * 7. PCR set to allow clocking of individual functions 521 * 522 * Until we've done this, the only registers we can access are: 523 * SBI_SKCR 524 * SBI_SMCR 525 * SBI_SKID 526 */ 527 static void sa1111_wake(struct sa1111 *sachip) 528 { 529 unsigned long flags, r; 530 531 spin_lock_irqsave(&sachip->lock, flags); 532 533 clk_enable(sachip->clk); 534 535 /* 536 * Turn VCO on, and disable PLL Bypass. 537 */ 538 r = sa1111_readl(sachip->base + SA1111_SKCR); 539 r &= ~SKCR_VCO_OFF; 540 sa1111_writel(r, sachip->base + SA1111_SKCR); 541 r |= SKCR_PLL_BYPASS | SKCR_OE_EN; 542 sa1111_writel(r, sachip->base + SA1111_SKCR); 543 544 /* 545 * Wait lock time. SA1111 manual _doesn't_ 546 * specify a figure for this! We choose 100us. 547 */ 548 udelay(100); 549 550 /* 551 * Enable RCLK. We also ensure that RDYEN is set. 552 */ 553 r |= SKCR_RCLKEN | SKCR_RDYEN; 554 sa1111_writel(r, sachip->base + SA1111_SKCR); 555 556 /* 557 * Wait 14 RCLK cycles for the chip to finish coming out 558 * of reset. (RCLK=24MHz). This is 590ns. 559 */ 560 udelay(1); 561 562 /* 563 * Ensure all clocks are initially off. 564 */ 565 sa1111_writel(0, sachip->base + SA1111_SKPCR); 566 567 spin_unlock_irqrestore(&sachip->lock, flags); 568 } 569 570 #ifdef CONFIG_ARCH_SA1100 571 572 static u32 sa1111_dma_mask[] = { 573 ~0, 574 ~(1 << 20), 575 ~(1 << 23), 576 ~(1 << 24), 577 ~(1 << 25), 578 ~(1 << 20), 579 ~(1 << 20), 580 0, 581 }; 582 583 /* 584 * Configure the SA1111 shared memory controller. 585 */ 586 void 587 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, 588 unsigned int cas_latency) 589 { 590 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); 591 592 if (cas_latency == 3) 593 smcr |= SMCR_CLAT; 594 595 sa1111_writel(smcr, sachip->base + SA1111_SMCR); 596 597 /* 598 * Now clear the bits in the DMA mask to work around the SA1111 599 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion 600 * Chip Specification Update, June 2000, Erratum #7). 601 */ 602 if (sachip->dev->dma_mask) 603 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; 604 605 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; 606 } 607 #endif 608 609 static void sa1111_dev_release(struct device *_dev) 610 { 611 struct sa1111_dev *dev = SA1111_DEV(_dev); 612 613 kfree(dev); 614 } 615 616 static int 617 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, 618 struct sa1111_dev_info *info) 619 { 620 struct sa1111_dev *dev; 621 unsigned i; 622 int ret; 623 624 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); 625 if (!dev) { 626 ret = -ENOMEM; 627 goto err_alloc; 628 } 629 630 device_initialize(&dev->dev); 631 dev_set_name(&dev->dev, "%4.4lx", info->offset); 632 dev->devid = info->devid; 633 dev->dev.parent = sachip->dev; 634 dev->dev.bus = &sa1111_bus_type; 635 dev->dev.release = sa1111_dev_release; 636 dev->res.start = sachip->phys + info->offset; 637 dev->res.end = dev->res.start + 511; 638 dev->res.name = dev_name(&dev->dev); 639 dev->res.flags = IORESOURCE_MEM; 640 dev->mapbase = sachip->base + info->offset; 641 dev->skpcr_mask = info->skpcr_mask; 642 643 for (i = 0; i < ARRAY_SIZE(info->irq); i++) 644 dev->irq[i] = sachip->irq_base + info->irq[i]; 645 646 /* 647 * If the parent device has a DMA mask associated with it, and 648 * this child supports DMA, propagate it down to the children. 649 */ 650 if (info->dma && sachip->dev->dma_mask) { 651 dev->dma_mask = *sachip->dev->dma_mask; 652 dev->dev.dma_mask = &dev->dma_mask; 653 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; 654 } 655 656 ret = request_resource(parent, &dev->res); 657 if (ret) { 658 dev_err(sachip->dev, "failed to allocate resource for %s\n", 659 dev->res.name); 660 goto err_resource; 661 } 662 663 ret = device_add(&dev->dev); 664 if (ret) 665 goto err_add; 666 return 0; 667 668 err_add: 669 release_resource(&dev->res); 670 err_resource: 671 put_device(&dev->dev); 672 err_alloc: 673 return ret; 674 } 675 676 /** 677 * sa1111_probe - probe for a single SA1111 chip. 678 * @phys_addr: physical address of device. 679 * 680 * Probe for a SA1111 chip. This must be called 681 * before any other SA1111-specific code. 682 * 683 * Returns: 684 * %-ENODEV device not found. 685 * %-EBUSY physical address already marked in-use. 686 * %-EINVAL no platform data passed 687 * %0 successful. 688 */ 689 static int __sa1111_probe(struct device *me, struct resource *mem, int irq) 690 { 691 struct sa1111_platform_data *pd = me->platform_data; 692 struct sa1111 *sachip; 693 unsigned long id; 694 unsigned int has_devs; 695 int i, ret = -ENODEV; 696 697 if (!pd) 698 return -EINVAL; 699 700 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); 701 if (!sachip) 702 return -ENOMEM; 703 704 sachip->clk = clk_get(me, "SA1111_CLK"); 705 if (IS_ERR(sachip->clk)) { 706 ret = PTR_ERR(sachip->clk); 707 goto err_free; 708 } 709 710 ret = clk_prepare(sachip->clk); 711 if (ret) 712 goto err_clkput; 713 714 spin_lock_init(&sachip->lock); 715 716 sachip->dev = me; 717 dev_set_drvdata(sachip->dev, sachip); 718 719 sachip->pdata = pd; 720 sachip->phys = mem->start; 721 sachip->irq = irq; 722 723 /* 724 * Map the whole region. This also maps the 725 * registers for our children. 726 */ 727 sachip->base = ioremap(mem->start, PAGE_SIZE * 2); 728 if (!sachip->base) { 729 ret = -ENOMEM; 730 goto err_clk_unprep; 731 } 732 733 /* 734 * Probe for the chip. Only touch the SBI registers. 735 */ 736 id = sa1111_readl(sachip->base + SA1111_SKID); 737 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 738 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); 739 ret = -ENODEV; 740 goto err_unmap; 741 } 742 743 pr_info("SA1111 Microprocessor Companion Chip: silicon revision %lx, metal revision %lx\n", 744 (id & SKID_SIREV_MASK) >> 4, id & SKID_MTREV_MASK); 745 746 /* 747 * We found it. Wake the chip up, and initialise. 748 */ 749 sa1111_wake(sachip); 750 751 /* 752 * The interrupt controller must be initialised before any 753 * other device to ensure that the interrupts are available. 754 */ 755 if (sachip->irq != NO_IRQ) { 756 ret = sa1111_setup_irq(sachip, pd->irq_base); 757 if (ret) 758 goto err_unmap; 759 } 760 761 #ifdef CONFIG_ARCH_SA1100 762 { 763 unsigned int val; 764 765 /* 766 * The SDRAM configuration of the SA1110 and the SA1111 must 767 * match. This is very important to ensure that SA1111 accesses 768 * don't corrupt the SDRAM. Note that this ungates the SA1111's 769 * MBGNT signal, so we must have called sa1110_mb_disable() 770 * beforehand. 771 */ 772 sa1111_configure_smc(sachip, 1, 773 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), 774 FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); 775 776 /* 777 * We only need to turn on DCLK whenever we want to use the 778 * DMA. It can otherwise be held firmly in the off position. 779 * (currently, we always enable it.) 780 */ 781 val = sa1111_readl(sachip->base + SA1111_SKPCR); 782 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); 783 784 /* 785 * Enable the SA1110 memory bus request and grant signals. 786 */ 787 sa1110_mb_enable(); 788 } 789 #endif 790 791 g_sa1111 = sachip; 792 793 has_devs = ~0; 794 if (pd) 795 has_devs &= ~pd->disable_devs; 796 797 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) 798 if (sa1111_devices[i].devid & has_devs) 799 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); 800 801 return 0; 802 803 err_unmap: 804 iounmap(sachip->base); 805 err_clk_unprep: 806 clk_unprepare(sachip->clk); 807 err_clkput: 808 clk_put(sachip->clk); 809 err_free: 810 kfree(sachip); 811 return ret; 812 } 813 814 static int sa1111_remove_one(struct device *dev, void *data) 815 { 816 struct sa1111_dev *sadev = SA1111_DEV(dev); 817 device_del(&sadev->dev); 818 release_resource(&sadev->res); 819 put_device(&sadev->dev); 820 return 0; 821 } 822 823 static void __sa1111_remove(struct sa1111 *sachip) 824 { 825 void __iomem *irqbase = sachip->base + SA1111_INTC; 826 827 device_for_each_child(sachip->dev, NULL, sa1111_remove_one); 828 829 /* disable all IRQs */ 830 sa1111_writel(0, irqbase + SA1111_INTEN0); 831 sa1111_writel(0, irqbase + SA1111_INTEN1); 832 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 833 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 834 835 clk_disable(sachip->clk); 836 clk_unprepare(sachip->clk); 837 838 if (sachip->irq != NO_IRQ) { 839 irq_set_chained_handler(sachip->irq, NULL); 840 irq_set_handler_data(sachip->irq, NULL); 841 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR); 842 843 release_mem_region(sachip->phys + SA1111_INTC, 512); 844 } 845 846 iounmap(sachip->base); 847 clk_put(sachip->clk); 848 kfree(sachip); 849 } 850 851 struct sa1111_save_data { 852 unsigned int skcr; 853 unsigned int skpcr; 854 unsigned int skcdr; 855 unsigned char skaud; 856 unsigned char skpwm0; 857 unsigned char skpwm1; 858 859 /* 860 * Interrupt controller 861 */ 862 unsigned int intpol0; 863 unsigned int intpol1; 864 unsigned int inten0; 865 unsigned int inten1; 866 unsigned int wakepol0; 867 unsigned int wakepol1; 868 unsigned int wakeen0; 869 unsigned int wakeen1; 870 }; 871 872 #ifdef CONFIG_PM 873 874 static int sa1111_suspend(struct platform_device *dev, pm_message_t state) 875 { 876 struct sa1111 *sachip = platform_get_drvdata(dev); 877 struct sa1111_save_data *save; 878 unsigned long flags; 879 unsigned int val; 880 void __iomem *base; 881 882 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); 883 if (!save) 884 return -ENOMEM; 885 sachip->saved_state = save; 886 887 spin_lock_irqsave(&sachip->lock, flags); 888 889 /* 890 * Save state. 891 */ 892 base = sachip->base; 893 save->skcr = sa1111_readl(base + SA1111_SKCR); 894 save->skpcr = sa1111_readl(base + SA1111_SKPCR); 895 save->skcdr = sa1111_readl(base + SA1111_SKCDR); 896 save->skaud = sa1111_readl(base + SA1111_SKAUD); 897 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); 898 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); 899 900 sa1111_writel(0, sachip->base + SA1111_SKPWM0); 901 sa1111_writel(0, sachip->base + SA1111_SKPWM1); 902 903 base = sachip->base + SA1111_INTC; 904 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); 905 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); 906 save->inten0 = sa1111_readl(base + SA1111_INTEN0); 907 save->inten1 = sa1111_readl(base + SA1111_INTEN1); 908 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); 909 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); 910 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); 911 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); 912 913 /* 914 * Disable. 915 */ 916 val = sa1111_readl(sachip->base + SA1111_SKCR); 917 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); 918 919 clk_disable(sachip->clk); 920 921 spin_unlock_irqrestore(&sachip->lock, flags); 922 923 #ifdef CONFIG_ARCH_SA1100 924 sa1110_mb_disable(); 925 #endif 926 927 return 0; 928 } 929 930 /* 931 * sa1111_resume - Restore the SA1111 device state. 932 * @dev: device to restore 933 * 934 * Restore the general state of the SA1111; clock control and 935 * interrupt controller. Other parts of the SA1111 must be 936 * restored by their respective drivers, and must be called 937 * via LDM after this function. 938 */ 939 static int sa1111_resume(struct platform_device *dev) 940 { 941 struct sa1111 *sachip = platform_get_drvdata(dev); 942 struct sa1111_save_data *save; 943 unsigned long flags, id; 944 void __iomem *base; 945 946 save = sachip->saved_state; 947 if (!save) 948 return 0; 949 950 /* 951 * Ensure that the SA1111 is still here. 952 * FIXME: shouldn't do this here. 953 */ 954 id = sa1111_readl(sachip->base + SA1111_SKID); 955 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 956 __sa1111_remove(sachip); 957 platform_set_drvdata(dev, NULL); 958 kfree(save); 959 return 0; 960 } 961 962 /* 963 * First of all, wake up the chip. 964 */ 965 sa1111_wake(sachip); 966 967 #ifdef CONFIG_ARCH_SA1100 968 /* Enable the memory bus request/grant signals */ 969 sa1110_mb_enable(); 970 #endif 971 972 /* 973 * Only lock for write ops. Also, sa1111_wake must be called with 974 * released spinlock! 975 */ 976 spin_lock_irqsave(&sachip->lock, flags); 977 978 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); 979 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); 980 981 base = sachip->base; 982 sa1111_writel(save->skcr, base + SA1111_SKCR); 983 sa1111_writel(save->skpcr, base + SA1111_SKPCR); 984 sa1111_writel(save->skcdr, base + SA1111_SKCDR); 985 sa1111_writel(save->skaud, base + SA1111_SKAUD); 986 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); 987 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); 988 989 base = sachip->base + SA1111_INTC; 990 sa1111_writel(save->intpol0, base + SA1111_INTPOL0); 991 sa1111_writel(save->intpol1, base + SA1111_INTPOL1); 992 sa1111_writel(save->inten0, base + SA1111_INTEN0); 993 sa1111_writel(save->inten1, base + SA1111_INTEN1); 994 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); 995 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); 996 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); 997 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); 998 999 spin_unlock_irqrestore(&sachip->lock, flags); 1000 1001 sachip->saved_state = NULL; 1002 kfree(save); 1003 1004 return 0; 1005 } 1006 1007 #else 1008 #define sa1111_suspend NULL 1009 #define sa1111_resume NULL 1010 #endif 1011 1012 static int sa1111_probe(struct platform_device *pdev) 1013 { 1014 struct resource *mem; 1015 int irq; 1016 1017 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1018 if (!mem) 1019 return -EINVAL; 1020 irq = platform_get_irq(pdev, 0); 1021 if (irq < 0) 1022 return -ENXIO; 1023 1024 return __sa1111_probe(&pdev->dev, mem, irq); 1025 } 1026 1027 static int sa1111_remove(struct platform_device *pdev) 1028 { 1029 struct sa1111 *sachip = platform_get_drvdata(pdev); 1030 1031 if (sachip) { 1032 #ifdef CONFIG_PM 1033 kfree(sachip->saved_state); 1034 sachip->saved_state = NULL; 1035 #endif 1036 __sa1111_remove(sachip); 1037 platform_set_drvdata(pdev, NULL); 1038 } 1039 1040 return 0; 1041 } 1042 1043 /* 1044 * Not sure if this should be on the system bus or not yet. 1045 * We really want some way to register a system device at 1046 * the per-machine level, and then have this driver pick 1047 * up the registered devices. 1048 * 1049 * We also need to handle the SDRAM configuration for 1050 * PXA250/SA1110 machine classes. 1051 */ 1052 static struct platform_driver sa1111_device_driver = { 1053 .probe = sa1111_probe, 1054 .remove = sa1111_remove, 1055 .suspend = sa1111_suspend, 1056 .resume = sa1111_resume, 1057 .driver = { 1058 .name = "sa1111", 1059 }, 1060 }; 1061 1062 /* 1063 * Get the parent device driver (us) structure 1064 * from a child function device 1065 */ 1066 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) 1067 { 1068 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); 1069 } 1070 1071 /* 1072 * The bits in the opdiv field are non-linear. 1073 */ 1074 static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; 1075 1076 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) 1077 { 1078 unsigned int skcdr, fbdiv, ipdiv, opdiv; 1079 1080 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); 1081 1082 fbdiv = (skcdr & 0x007f) + 2; 1083 ipdiv = ((skcdr & 0x0f80) >> 7) + 2; 1084 opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; 1085 1086 return 3686400 * fbdiv / (ipdiv * opdiv); 1087 } 1088 1089 /** 1090 * sa1111_pll_clock - return the current PLL clock frequency. 1091 * @sadev: SA1111 function block 1092 * 1093 * BUG: we should look at SKCR. We also blindly believe that 1094 * the chip is being fed with the 3.6864MHz clock. 1095 * 1096 * Returns the PLL clock in Hz. 1097 */ 1098 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) 1099 { 1100 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1101 1102 return __sa1111_pll_clock(sachip); 1103 } 1104 EXPORT_SYMBOL(sa1111_pll_clock); 1105 1106 /** 1107 * sa1111_select_audio_mode - select I2S or AC link mode 1108 * @sadev: SA1111 function block 1109 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S 1110 * 1111 * Frob the SKCR to select AC Link mode or I2S mode for 1112 * the audio block. 1113 */ 1114 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) 1115 { 1116 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1117 unsigned long flags; 1118 unsigned int val; 1119 1120 spin_lock_irqsave(&sachip->lock, flags); 1121 1122 val = sa1111_readl(sachip->base + SA1111_SKCR); 1123 if (mode == SA1111_AUDIO_I2S) { 1124 val &= ~SKCR_SELAC; 1125 } else { 1126 val |= SKCR_SELAC; 1127 } 1128 sa1111_writel(val, sachip->base + SA1111_SKCR); 1129 1130 spin_unlock_irqrestore(&sachip->lock, flags); 1131 } 1132 EXPORT_SYMBOL(sa1111_select_audio_mode); 1133 1134 /** 1135 * sa1111_set_audio_rate - set the audio sample rate 1136 * @sadev: SA1111 SAC function block 1137 * @rate: sample rate to select 1138 */ 1139 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) 1140 { 1141 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1142 unsigned int div; 1143 1144 if (sadev->devid != SA1111_DEVID_SAC) 1145 return -EINVAL; 1146 1147 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; 1148 if (div == 0) 1149 div = 1; 1150 if (div > 128) 1151 div = 128; 1152 1153 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); 1154 1155 return 0; 1156 } 1157 EXPORT_SYMBOL(sa1111_set_audio_rate); 1158 1159 /** 1160 * sa1111_get_audio_rate - get the audio sample rate 1161 * @sadev: SA1111 SAC function block device 1162 */ 1163 int sa1111_get_audio_rate(struct sa1111_dev *sadev) 1164 { 1165 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1166 unsigned long div; 1167 1168 if (sadev->devid != SA1111_DEVID_SAC) 1169 return -EINVAL; 1170 1171 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; 1172 1173 return __sa1111_pll_clock(sachip) / (256 * div); 1174 } 1175 EXPORT_SYMBOL(sa1111_get_audio_rate); 1176 1177 void sa1111_set_io_dir(struct sa1111_dev *sadev, 1178 unsigned int bits, unsigned int dir, 1179 unsigned int sleep_dir) 1180 { 1181 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1182 unsigned long flags; 1183 unsigned int val; 1184 void __iomem *gpio = sachip->base + SA1111_GPIO; 1185 1186 #define MODIFY_BITS(port, mask, dir) \ 1187 if (mask) { \ 1188 val = sa1111_readl(port); \ 1189 val &= ~(mask); \ 1190 val |= (dir) & (mask); \ 1191 sa1111_writel(val, port); \ 1192 } 1193 1194 spin_lock_irqsave(&sachip->lock, flags); 1195 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); 1196 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); 1197 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); 1198 1199 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); 1200 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); 1201 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); 1202 spin_unlock_irqrestore(&sachip->lock, flags); 1203 } 1204 EXPORT_SYMBOL(sa1111_set_io_dir); 1205 1206 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1207 { 1208 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1209 unsigned long flags; 1210 unsigned int val; 1211 void __iomem *gpio = sachip->base + SA1111_GPIO; 1212 1213 spin_lock_irqsave(&sachip->lock, flags); 1214 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); 1215 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); 1216 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); 1217 spin_unlock_irqrestore(&sachip->lock, flags); 1218 } 1219 EXPORT_SYMBOL(sa1111_set_io); 1220 1221 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1222 { 1223 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1224 unsigned long flags; 1225 unsigned int val; 1226 void __iomem *gpio = sachip->base + SA1111_GPIO; 1227 1228 spin_lock_irqsave(&sachip->lock, flags); 1229 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); 1230 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); 1231 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); 1232 spin_unlock_irqrestore(&sachip->lock, flags); 1233 } 1234 EXPORT_SYMBOL(sa1111_set_sleep_io); 1235 1236 /* 1237 * Individual device operations. 1238 */ 1239 1240 /** 1241 * sa1111_enable_device - enable an on-chip SA1111 function block 1242 * @sadev: SA1111 function block device to enable 1243 */ 1244 int sa1111_enable_device(struct sa1111_dev *sadev) 1245 { 1246 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1247 unsigned long flags; 1248 unsigned int val; 1249 int ret = 0; 1250 1251 if (sachip->pdata && sachip->pdata->enable) 1252 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid); 1253 1254 if (ret == 0) { 1255 spin_lock_irqsave(&sachip->lock, flags); 1256 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1257 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1258 spin_unlock_irqrestore(&sachip->lock, flags); 1259 } 1260 return ret; 1261 } 1262 EXPORT_SYMBOL(sa1111_enable_device); 1263 1264 /** 1265 * sa1111_disable_device - disable an on-chip SA1111 function block 1266 * @sadev: SA1111 function block device to disable 1267 */ 1268 void sa1111_disable_device(struct sa1111_dev *sadev) 1269 { 1270 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1271 unsigned long flags; 1272 unsigned int val; 1273 1274 spin_lock_irqsave(&sachip->lock, flags); 1275 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1276 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1277 spin_unlock_irqrestore(&sachip->lock, flags); 1278 1279 if (sachip->pdata && sachip->pdata->disable) 1280 sachip->pdata->disable(sachip->pdata->data, sadev->devid); 1281 } 1282 EXPORT_SYMBOL(sa1111_disable_device); 1283 1284 /* 1285 * SA1111 "Register Access Bus." 1286 * 1287 * We model this as a regular bus type, and hang devices directly 1288 * off this. 1289 */ 1290 static int sa1111_match(struct device *_dev, struct device_driver *_drv) 1291 { 1292 struct sa1111_dev *dev = SA1111_DEV(_dev); 1293 struct sa1111_driver *drv = SA1111_DRV(_drv); 1294 1295 return dev->devid & drv->devid; 1296 } 1297 1298 static int sa1111_bus_suspend(struct device *dev, pm_message_t state) 1299 { 1300 struct sa1111_dev *sadev = SA1111_DEV(dev); 1301 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1302 int ret = 0; 1303 1304 if (drv && drv->suspend) 1305 ret = drv->suspend(sadev, state); 1306 return ret; 1307 } 1308 1309 static int sa1111_bus_resume(struct device *dev) 1310 { 1311 struct sa1111_dev *sadev = SA1111_DEV(dev); 1312 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1313 int ret = 0; 1314 1315 if (drv && drv->resume) 1316 ret = drv->resume(sadev); 1317 return ret; 1318 } 1319 1320 static void sa1111_bus_shutdown(struct device *dev) 1321 { 1322 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1323 1324 if (drv && drv->shutdown) 1325 drv->shutdown(SA1111_DEV(dev)); 1326 } 1327 1328 static int sa1111_bus_probe(struct device *dev) 1329 { 1330 struct sa1111_dev *sadev = SA1111_DEV(dev); 1331 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1332 int ret = -ENODEV; 1333 1334 if (drv->probe) 1335 ret = drv->probe(sadev); 1336 return ret; 1337 } 1338 1339 static int sa1111_bus_remove(struct device *dev) 1340 { 1341 struct sa1111_dev *sadev = SA1111_DEV(dev); 1342 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1343 int ret = 0; 1344 1345 if (drv->remove) 1346 ret = drv->remove(sadev); 1347 return ret; 1348 } 1349 1350 struct bus_type sa1111_bus_type = { 1351 .name = "sa1111-rab", 1352 .match = sa1111_match, 1353 .probe = sa1111_bus_probe, 1354 .remove = sa1111_bus_remove, 1355 .suspend = sa1111_bus_suspend, 1356 .resume = sa1111_bus_resume, 1357 .shutdown = sa1111_bus_shutdown, 1358 }; 1359 EXPORT_SYMBOL(sa1111_bus_type); 1360 1361 int sa1111_driver_register(struct sa1111_driver *driver) 1362 { 1363 driver->drv.bus = &sa1111_bus_type; 1364 return driver_register(&driver->drv); 1365 } 1366 EXPORT_SYMBOL(sa1111_driver_register); 1367 1368 void sa1111_driver_unregister(struct sa1111_driver *driver) 1369 { 1370 driver_unregister(&driver->drv); 1371 } 1372 EXPORT_SYMBOL(sa1111_driver_unregister); 1373 1374 #ifdef CONFIG_DMABOUNCE 1375 /* 1376 * According to the "Intel StrongARM SA-1111 Microprocessor Companion 1377 * Chip Specification Update" (June 2000), erratum #7, there is a 1378 * significant bug in the SA1111 SDRAM shared memory controller. If 1379 * an access to a region of memory above 1MB relative to the bank base, 1380 * it is important that address bit 10 _NOT_ be asserted. Depending 1381 * on the configuration of the RAM, bit 10 may correspond to one 1382 * of several different (processor-relative) address bits. 1383 * 1384 * This routine only identifies whether or not a given DMA address 1385 * is susceptible to the bug. 1386 * 1387 * This should only get called for sa1111_device types due to the 1388 * way we configure our device dma_masks. 1389 */ 1390 static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) 1391 { 1392 /* 1393 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module 1394 * User's Guide" mentions that jumpers R51 and R52 control the 1395 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or 1396 * SDRAM bank 1 on Neponset). The default configuration selects 1397 * Assabet, so any address in bank 1 is necessarily invalid. 1398 */ 1399 return (machine_is_assabet() || machine_is_pfs168()) && 1400 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000); 1401 } 1402 1403 static int sa1111_notifier_call(struct notifier_block *n, unsigned long action, 1404 void *data) 1405 { 1406 struct sa1111_dev *dev = SA1111_DEV(data); 1407 1408 switch (action) { 1409 case BUS_NOTIFY_ADD_DEVICE: 1410 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) { 1411 int ret = dmabounce_register_dev(&dev->dev, 1024, 4096, 1412 sa1111_needs_bounce); 1413 if (ret) 1414 dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret); 1415 } 1416 break; 1417 1418 case BUS_NOTIFY_DEL_DEVICE: 1419 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) 1420 dmabounce_unregister_dev(&dev->dev); 1421 break; 1422 } 1423 return NOTIFY_OK; 1424 } 1425 1426 static struct notifier_block sa1111_bus_notifier = { 1427 .notifier_call = sa1111_notifier_call, 1428 }; 1429 #endif 1430 1431 static int __init sa1111_init(void) 1432 { 1433 int ret = bus_register(&sa1111_bus_type); 1434 #ifdef CONFIG_DMABOUNCE 1435 if (ret == 0) 1436 bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier); 1437 #endif 1438 if (ret == 0) 1439 platform_driver_register(&sa1111_device_driver); 1440 return ret; 1441 } 1442 1443 static void __exit sa1111_exit(void) 1444 { 1445 platform_driver_unregister(&sa1111_device_driver); 1446 #ifdef CONFIG_DMABOUNCE 1447 bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier); 1448 #endif 1449 bus_unregister(&sa1111_bus_type); 1450 } 1451 1452 subsys_initcall(sa1111_init); 1453 module_exit(sa1111_exit); 1454 1455 MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); 1456 MODULE_LICENSE("GPL"); 1457