xref: /openbmc/linux/arch/arm/boot/dts/ti/omap/omap443x.dtsi (revision 6469b2fe)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2724ba675SRob Herring/*
3724ba675SRob Herring * Device Tree Source for OMAP443x SoC
4724ba675SRob Herring *
5724ba675SRob Herring * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
6724ba675SRob Herring */
7724ba675SRob Herring
8724ba675SRob Herring#include "omap4.dtsi"
9724ba675SRob Herring
10724ba675SRob Herring/ {
11724ba675SRob Herring	cpus {
12724ba675SRob Herring		cpu0: cpu@0 {
13724ba675SRob Herring			/* OMAP443x variants OPP50-OPPNT */
14724ba675SRob Herring			operating-points = <
15724ba675SRob Herring				/* kHz    uV */
16724ba675SRob Herring				300000  1025000
17724ba675SRob Herring				600000  1200000
18724ba675SRob Herring				800000  1313000
19724ba675SRob Herring				1008000 1375000
20724ba675SRob Herring			>;
21724ba675SRob Herring			clock-latency = <300000>; /* From legacy driver */
22724ba675SRob Herring
23724ba675SRob Herring			/* cooling options */
24724ba675SRob Herring			#cooling-cells = <2>; /* min followed by max */
25724ba675SRob Herring		};
26724ba675SRob Herring	};
27724ba675SRob Herring
28724ba675SRob Herring	thermal-zones {
29724ba675SRob Herring		#include "omap4-cpu-thermal.dtsi"
30724ba675SRob Herring	};
31724ba675SRob Herring
32724ba675SRob Herring	ocp {
33724ba675SRob Herring		/* 4430 has only gpio_86 tshut and no talert interrupt */
34724ba675SRob Herring		bandgap: bandgap@4a002260 {
35724ba675SRob Herring			reg = <0x4a002260 0x4
36724ba675SRob Herring			       0x4a00232C 0x4>;
37724ba675SRob Herring			compatible = "ti,omap4430-bandgap";
38724ba675SRob Herring			gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
39724ba675SRob Herring
40724ba675SRob Herring			#thermal-sensor-cells = <0>;
41724ba675SRob Herring		};
42724ba675SRob Herring	};
43724ba675SRob Herring
44724ba675SRob Herring	ocp {
45724ba675SRob Herring		abb_mpu: regulator-abb-mpu {
46724ba675SRob Herring			status = "okay";
47724ba675SRob Herring
48724ba675SRob Herring			reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>;
49724ba675SRob Herring			reg-names = "base-address", "int-address";
50724ba675SRob Herring
51724ba675SRob Herring			ti,abb_info = <
52724ba675SRob Herring			/*uV		ABB	efuse	rbb_m	fbb_m	vset_m*/
53724ba675SRob Herring			1025000		0	0	0	0	0
54724ba675SRob Herring			1200000		0	0	0	0	0
55724ba675SRob Herring			1313000		0	0	0	0	0
56724ba675SRob Herring			1375000		1	0	0	0	0
57724ba675SRob Herring			1389000		1	0	0	0	0
58724ba675SRob Herring			>;
59724ba675SRob Herring		};
60724ba675SRob Herring
61724ba675SRob Herring		/* Default unused, just provide register info for record */
62724ba675SRob Herring		abb_iva: regulator-abb-iva {
63724ba675SRob Herring			reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>;
64724ba675SRob Herring			reg-names = "base-address", "int-address";
65724ba675SRob Herring		};
66724ba675SRob Herring
67724ba675SRob Herring	};
68724ba675SRob Herring
69724ba675SRob Herring};
70724ba675SRob Herring
71724ba675SRob Herring&cpu_thermal {
72*6469b2feSTony Lindgren	thermal-sensors = <&bandgap>;
73724ba675SRob Herring	coefficients = <0 20000>;
74724ba675SRob Herring};
75724ba675SRob Herring
76724ba675SRob Herring/include/ "omap443x-clocks.dtsi"
77724ba675SRob Herring
78724ba675SRob Herring/*
79724ba675SRob Herring * Use dpll_per for sgx at 307.2MHz like droid4 stock v3.0.8 Android kernel
80724ba675SRob Herring */
81724ba675SRob Herring&sgx_module {
82724ba675SRob Herring	assigned-clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 24>,
83724ba675SRob Herring			  <&dpll_per_m7x2_ck>;
84724ba675SRob Herring	assigned-clock-rates = <0>, <307200000>;
85724ba675SRob Herring	assigned-clock-parents = <&dpll_per_m7x2_ck>;
86724ba675SRob Herring};
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