1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4*724ba675SRob Herring * Copyright (C) 2021 SanCloud Ltd
5*724ba675SRob Herring */
6*724ba675SRob Herring/dts-v1/;
7*724ba675SRob Herring
8*724ba675SRob Herring#include "am33xx.dtsi"
9*724ba675SRob Herring#include "am335x-bone-common.dtsi"
10*724ba675SRob Herring#include "am335x-boneblack-common.dtsi"
11*724ba675SRob Herring#include "am335x-sancloud-bbe-common.dtsi"
12*724ba675SRob Herring
13*724ba675SRob Herring/ {
14*724ba675SRob Herring	model = "SanCloud BeagleBone Enhanced Lite";
15*724ba675SRob Herring	compatible = "sancloud,am335x-boneenhanced",
16*724ba675SRob Herring		     "ti,am335x-bone-black",
17*724ba675SRob Herring		     "ti,am335x-bone",
18*724ba675SRob Herring		     "ti,am33xx";
19*724ba675SRob Herring};
20*724ba675SRob Herring
21*724ba675SRob Herring&am33xx_pinmux {
22*724ba675SRob Herring	bb_spi0_pins: bb-spi0-pins {
23*724ba675SRob Herring		pinctrl-single,pins = <
24*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
25*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT, MUX_MODE0)
26*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
27*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE0)
28*724ba675SRob Herring		>;
29*724ba675SRob Herring	};
30*724ba675SRob Herring};
31*724ba675SRob Herring
32*724ba675SRob Herring&spi0 {
33*724ba675SRob Herring	#address-cells = <1>;
34*724ba675SRob Herring	#size-cells = <0>;
35*724ba675SRob Herring
36*724ba675SRob Herring	status = "okay";
37*724ba675SRob Herring	pinctrl-names = "default";
38*724ba675SRob Herring	pinctrl-0 = <&bb_spi0_pins>;
39*724ba675SRob Herring
40*724ba675SRob Herring	channel@0 {
41*724ba675SRob Herring		#address-cells = <1>;
42*724ba675SRob Herring		#size-cells = <0>;
43*724ba675SRob Herring
44*724ba675SRob Herring		compatible = "micron,spi-authenta";
45*724ba675SRob Herring
46*724ba675SRob Herring		reg = <0>;
47*724ba675SRob Herring		spi-max-frequency = <16000000>;
48*724ba675SRob Herring		spi-cpha;
49*724ba675SRob Herring	};
50*724ba675SRob Herring};
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