1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2*724ba675SRob Herring/*
3*724ba675SRob Herring * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring/dts-v1/;
9*724ba675SRob Herring
10*724ba675SRob Herring#include "am33xx.dtsi"
11*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
12*724ba675SRob Herring
13*724ba675SRob Herring/ {
14*724ba675SRob Herring	model = "CompuLab CM-T335";
15*724ba675SRob Herring	compatible = "compulab,cm-t335", "ti,am33xx";
16*724ba675SRob Herring
17*724ba675SRob Herring	memory@80000000 {
18*724ba675SRob Herring		device_type = "memory";
19*724ba675SRob Herring		reg = <0x80000000 0x8000000>;	/* 128 MB */
20*724ba675SRob Herring	};
21*724ba675SRob Herring
22*724ba675SRob Herring	leds {
23*724ba675SRob Herring		compatible = "gpio-leds";
24*724ba675SRob Herring		pinctrl-names = "default";
25*724ba675SRob Herring		pinctrl-0 = <&gpio_led_pins>;
26*724ba675SRob Herring		led0 {
27*724ba675SRob Herring			label = "cm_t335:green";
28*724ba675SRob Herring			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;	/* gpio2_0 */
29*724ba675SRob Herring			linux,default-trigger = "heartbeat";
30*724ba675SRob Herring		};
31*724ba675SRob Herring	};
32*724ba675SRob Herring
33*724ba675SRob Herring	/* regulator for mmc */
34*724ba675SRob Herring	vmmc_fixed: fixedregulator0 {
35*724ba675SRob Herring		compatible = "regulator-fixed";
36*724ba675SRob Herring		regulator-name = "vmmc_fixed";
37*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
38*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
39*724ba675SRob Herring	};
40*724ba675SRob Herring
41*724ba675SRob Herring	/* Regulator for WiFi */
42*724ba675SRob Herring	vwlan_fixed: fixedregulator2 {
43*724ba675SRob Herring		compatible = "regulator-fixed";
44*724ba675SRob Herring		regulator-name = "vwlan_fixed";
45*724ba675SRob Herring		gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
46*724ba675SRob Herring		enable-active-high;
47*724ba675SRob Herring	};
48*724ba675SRob Herring
49*724ba675SRob Herring	backlight {
50*724ba675SRob Herring		compatible = "pwm-backlight";
51*724ba675SRob Herring		pwms = <&ecap0 0 50000 0>;
52*724ba675SRob Herring		brightness-levels = <0 51 53 56 62 75 101 152 255>;
53*724ba675SRob Herring		default-brightness-level = <8>;
54*724ba675SRob Herring	};
55*724ba675SRob Herring
56*724ba675SRob Herring	sound {
57*724ba675SRob Herring		compatible = "simple-audio-card";
58*724ba675SRob Herring		simple-audio-card,name = "cm-t335";
59*724ba675SRob Herring
60*724ba675SRob Herring		simple-audio-card,widgets =
61*724ba675SRob Herring			"Microphone", "Mic Jack",
62*724ba675SRob Herring			"Line", "Line In",
63*724ba675SRob Herring			"Headphone", "Headphone Jack";
64*724ba675SRob Herring
65*724ba675SRob Herring		simple-audio-card,routing =
66*724ba675SRob Herring			"Headphone Jack", "LHPOUT",
67*724ba675SRob Herring			"Headphone Jack", "RHPOUT",
68*724ba675SRob Herring			"LLINEIN", "Line In",
69*724ba675SRob Herring			"RLINEIN", "Line In",
70*724ba675SRob Herring			"MICIN", "Mic Jack";
71*724ba675SRob Herring
72*724ba675SRob Herring		simple-audio-card,format = "i2s";
73*724ba675SRob Herring		simple-audio-card,bitclock-master = <&sound_master>;
74*724ba675SRob Herring		simple-audio-card,frame-master = <&sound_master>;
75*724ba675SRob Herring
76*724ba675SRob Herring		simple-audio-card,cpu {
77*724ba675SRob Herring			sound-dai = <&mcasp1>;
78*724ba675SRob Herring		};
79*724ba675SRob Herring
80*724ba675SRob Herring		sound_master: simple-audio-card,codec {
81*724ba675SRob Herring			sound-dai = <&tlv320aic23>;
82*724ba675SRob Herring			system-clock-frequency = <12000000>;
83*724ba675SRob Herring		};
84*724ba675SRob Herring	};
85*724ba675SRob Herring};
86*724ba675SRob Herring
87*724ba675SRob Herring&am33xx_pinmux {
88*724ba675SRob Herring	pinctrl-names = "default";
89*724ba675SRob Herring	pinctrl-0 = <&bluetooth_pins>;
90*724ba675SRob Herring
91*724ba675SRob Herring	i2c0_pins: i2c0-pins {
92*724ba675SRob Herring		pinctrl-single,pins = <
93*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
94*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
95*724ba675SRob Herring		>;
96*724ba675SRob Herring	};
97*724ba675SRob Herring
98*724ba675SRob Herring	i2c1_pins: i2c1-pins {
99*724ba675SRob Herring		pinctrl-single,pins = <
100*724ba675SRob Herring			/* uart0_ctsn.i2c1_sda */
101*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE2)
102*724ba675SRob Herring			/* uart0_rtsn.i2c1_scl */
103*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)
104*724ba675SRob Herring		>;
105*724ba675SRob Herring	};
106*724ba675SRob Herring
107*724ba675SRob Herring	gpio_led_pins: gpio-led-pins {
108*724ba675SRob Herring		pinctrl-single,pins = <
109*724ba675SRob Herring			/* gpmc_csn3.gpio2_0 */
110*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT, MUX_MODE7)
111*724ba675SRob Herring		>;
112*724ba675SRob Herring	};
113*724ba675SRob Herring
114*724ba675SRob Herring	nandflash_pins: nandflash-pins {
115*724ba675SRob Herring		pinctrl-single,pins = <
116*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
117*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
118*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
119*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
120*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
121*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
122*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
123*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
124*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
125*724ba675SRob Herring			/* gpmc_wpn.gpio0_31 */
126*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)
127*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
128*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
129*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
130*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
131*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
132*724ba675SRob Herring		>;
133*724ba675SRob Herring	};
134*724ba675SRob Herring
135*724ba675SRob Herring	uart0_pins: uart0-pins {
136*724ba675SRob Herring		pinctrl-single,pins = <
137*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
138*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
139*724ba675SRob Herring		>;
140*724ba675SRob Herring	};
141*724ba675SRob Herring
142*724ba675SRob Herring	uart1_pins: uart1-pins {
143*724ba675SRob Herring		pinctrl-single,pins = <
144*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
145*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
146*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
147*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
148*724ba675SRob Herring		>;
149*724ba675SRob Herring	};
150*724ba675SRob Herring
151*724ba675SRob Herring	dcan0_pins: dcan0-pins {
152*724ba675SRob Herring		pinctrl-single,pins = <
153*724ba675SRob Herring			/* uart1_ctsn.dcan0_tx */
154*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2)
155*724ba675SRob Herring			/* uart1_rtsn.dcan0_rx */
156*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2)
157*724ba675SRob Herring		>;
158*724ba675SRob Herring	};
159*724ba675SRob Herring
160*724ba675SRob Herring	dcan1_pins: dcan1-pins {
161*724ba675SRob Herring		pinctrl-single,pins = <
162*724ba675SRob Herring			/* uart1_rxd.dcan1_tx */
163*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT, MUX_MODE2)
164*724ba675SRob Herring			/* uart1_txd.dcan1_rx */
165*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE2)
166*724ba675SRob Herring		>;
167*724ba675SRob Herring	};
168*724ba675SRob Herring
169*724ba675SRob Herring	ecap0_pins: ecap0-pins {
170*724ba675SRob Herring		pinctrl-single,pins = <
171*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, 0x0, MUX_MODE0)
172*724ba675SRob Herring		>;
173*724ba675SRob Herring	};
174*724ba675SRob Herring
175*724ba675SRob Herring	cpsw_default: cpsw-default-pins {
176*724ba675SRob Herring		pinctrl-single,pins = <
177*724ba675SRob Herring			/* Slave 1 */
178*724ba675SRob Herring			/* mii1_tx_en.rgmii1_tctl */
179*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
180*724ba675SRob Herring			/* mii1_rxdv.rgmii1_rctl */
181*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)
182*724ba675SRob Herring			/* mii1_txd3.rgmii1_td3 */
183*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
184*724ba675SRob Herring			/* mii1_txd2.rgmii1_td2 */
185*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
186*724ba675SRob Herring			/* mii1_txd1.rgmii1_td1 */
187*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
188*724ba675SRob Herring			/* mii1_txd0.rgmii1_td0 */
189*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
190*724ba675SRob Herring			/* mii1_txclk.rgmii1_tclk */
191*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
192*724ba675SRob Herring			/* mii1_rxclk.rgmii1_rclk */
193*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
194*724ba675SRob Herring			/* mii1_rxd3.rgmii1_rd3 */
195*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
196*724ba675SRob Herring			/* mii1_rxd2.rgmii1_rd2 */
197*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
198*724ba675SRob Herring			/* mii1_rxd1.rgmii1_rd1 */
199*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
200*724ba675SRob Herring			/* mii1_rxd0.rgmii1_rd0 */
201*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
202*724ba675SRob Herring		>;
203*724ba675SRob Herring	};
204*724ba675SRob Herring
205*724ba675SRob Herring	cpsw_sleep: cpsw-sleep-pins {
206*724ba675SRob Herring		pinctrl-single,pins = <
207*724ba675SRob Herring			/* Slave 1 reset value */
208*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
209*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
210*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
211*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
212*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
213*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
214*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
215*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
216*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
217*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
218*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
219*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
220*724ba675SRob Herring		>;
221*724ba675SRob Herring	};
222*724ba675SRob Herring
223*724ba675SRob Herring	davinci_mdio_default: davinci-mdio-default-pins {
224*724ba675SRob Herring		pinctrl-single,pins = <
225*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
226*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
227*724ba675SRob Herring		>;
228*724ba675SRob Herring	};
229*724ba675SRob Herring
230*724ba675SRob Herring	davinci_mdio_sleep: davinci-mdio-sleep-pins {
231*724ba675SRob Herring		pinctrl-single,pins = <
232*724ba675SRob Herring			/* MDIO reset value */
233*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
234*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
235*724ba675SRob Herring		>;
236*724ba675SRob Herring	};
237*724ba675SRob Herring
238*724ba675SRob Herring	mmc1_pins: mmc1-pins {
239*724ba675SRob Herring		pinctrl-single,pins = <
240*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
241*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
242*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
243*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
244*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
245*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
246*724ba675SRob Herring		>;
247*724ba675SRob Herring	};
248*724ba675SRob Herring
249*724ba675SRob Herring	spi0_pins: spi0-pins {
250*724ba675SRob Herring		pinctrl-single,pins = <
251*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
252*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
253*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
254*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE0)
255*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_OUTPUT, MUX_MODE0)
256*724ba675SRob Herring		>;
257*724ba675SRob Herring	};
258*724ba675SRob Herring
259*724ba675SRob Herring	/* wl1271 bluetooth */
260*724ba675SRob Herring	bluetooth_pins: bluetooth-pins {
261*724ba675SRob Herring		pinctrl-single,pins = <
262*724ba675SRob Herring			/* XDMA_EVENT_INTR0.gpio0_19 - bluetooth enable */
263*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLUP, MUX_MODE7)
264*724ba675SRob Herring		>;
265*724ba675SRob Herring	};
266*724ba675SRob Herring
267*724ba675SRob Herring	/* TLV320AIC23B codec */
268*724ba675SRob Herring	mcasp1_pins: mcasp1-pins {
269*724ba675SRob Herring		pinctrl-single,pins = <
270*724ba675SRob Herring			/* MII1_CRS.mcasp1_aclkx */
271*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4)
272*724ba675SRob Herring			/* MII1_RX_ER.mcasp1_fsx */
273*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4)
274*724ba675SRob Herring			/* MII1_COL.mcasp1_axr2 */
275*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE4)
276*724ba675SRob Herring			/* RMII1_REF_CLK.mcasp1_axr3 */
277*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4)
278*724ba675SRob Herring		>;
279*724ba675SRob Herring	};
280*724ba675SRob Herring
281*724ba675SRob Herring	/* wl1271 WiFi */
282*724ba675SRob Herring	wifi_pins: wifi-pins {
283*724ba675SRob Herring		pinctrl-single,pins = <
284*724ba675SRob Herring			/* EMU1.gpio3_8 - WiFi IRQ */
285*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLUP, MUX_MODE7)
286*724ba675SRob Herring			/* XDMA_EVENT_INTR1.gpio0_20 - WiFi enable */
287*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7)
288*724ba675SRob Herring		>;
289*724ba675SRob Herring	};
290*724ba675SRob Herring};
291*724ba675SRob Herring
292*724ba675SRob Herring&uart0 {
293*724ba675SRob Herring	pinctrl-names = "default";
294*724ba675SRob Herring	pinctrl-0 = <&uart0_pins>;
295*724ba675SRob Herring
296*724ba675SRob Herring	status = "okay";
297*724ba675SRob Herring};
298*724ba675SRob Herring
299*724ba675SRob Herring/* WLS1271 bluetooth */
300*724ba675SRob Herring&uart1 {
301*724ba675SRob Herring	pinctrl-names = "default";
302*724ba675SRob Herring	pinctrl-0 = <&uart1_pins>;
303*724ba675SRob Herring
304*724ba675SRob Herringstatus = "okay";
305*724ba675SRob Herring};
306*724ba675SRob Herring
307*724ba675SRob Herring&i2c0 {
308*724ba675SRob Herring	pinctrl-names = "default";
309*724ba675SRob Herring	pinctrl-0 = <&i2c0_pins>;
310*724ba675SRob Herring
311*724ba675SRob Herring	status = "okay";
312*724ba675SRob Herring	clock-frequency = <400000>;
313*724ba675SRob Herring	/* CM-T335 board EEPROM */
314*724ba675SRob Herring	eeprom: 24c02@50 {
315*724ba675SRob Herring		compatible = "atmel,24c02";
316*724ba675SRob Herring		reg = <0x50>;
317*724ba675SRob Herring		pagesize = <16>;
318*724ba675SRob Herring	};
319*724ba675SRob Herring	/* Real Time Clock */
320*724ba675SRob Herring	ext_rtc: em3027@56 {
321*724ba675SRob Herring		compatible = "emmicro,em3027";
322*724ba675SRob Herring		reg = <0x56>;
323*724ba675SRob Herring	};
324*724ba675SRob Herring	/* Audio codec */
325*724ba675SRob Herring	tlv320aic23: codec@1a {
326*724ba675SRob Herring		compatible = "ti,tlv320aic23";
327*724ba675SRob Herring		reg = <0x1a>;
328*724ba675SRob Herring		#sound-dai-cells = <0>;
329*724ba675SRob Herring		status = "okay";
330*724ba675SRob Herring	};
331*724ba675SRob Herring};
332*724ba675SRob Herring
333*724ba675SRob Herring&epwmss0 {
334*724ba675SRob Herring	status = "okay";
335*724ba675SRob Herring
336*724ba675SRob Herring	ecap0: pwm@100 {
337*724ba675SRob Herring		status = "okay";
338*724ba675SRob Herring		pinctrl-names = "default";
339*724ba675SRob Herring		pinctrl-0 = <&ecap0_pins>;
340*724ba675SRob Herring	};
341*724ba675SRob Herring};
342*724ba675SRob Herring
343*724ba675SRob Herring&gpmc {
344*724ba675SRob Herring	status = "okay";
345*724ba675SRob Herring	pinctrl-names = "default";
346*724ba675SRob Herring	pinctrl-0 = <&nandflash_pins>;
347*724ba675SRob Herring	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
348*724ba675SRob Herring	nand@0,0 {
349*724ba675SRob Herring		compatible = "ti,omap2-nand";
350*724ba675SRob Herring		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
351*724ba675SRob Herring		interrupt-parent = <&gpmc>;
352*724ba675SRob Herring		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
353*724ba675SRob Herring			     <1 IRQ_TYPE_NONE>;	/* termcount */
354*724ba675SRob Herring		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
355*724ba675SRob Herring		ti,nand-ecc-opt = "bch8";
356*724ba675SRob Herring		ti,elm-id = <&elm>;
357*724ba675SRob Herring		nand-bus-width = <8>;
358*724ba675SRob Herring		gpmc,device-width = <1>;
359*724ba675SRob Herring		gpmc,sync-clk-ps = <0>;
360*724ba675SRob Herring		gpmc,cs-on-ns = <0>;
361*724ba675SRob Herring		gpmc,cs-rd-off-ns = <44>;
362*724ba675SRob Herring		gpmc,cs-wr-off-ns = <44>;
363*724ba675SRob Herring		gpmc,adv-on-ns = <6>;
364*724ba675SRob Herring		gpmc,adv-rd-off-ns = <34>;
365*724ba675SRob Herring		gpmc,adv-wr-off-ns = <44>;
366*724ba675SRob Herring		gpmc,we-on-ns = <0>;
367*724ba675SRob Herring		gpmc,we-off-ns = <40>;
368*724ba675SRob Herring		gpmc,oe-on-ns = <0>;
369*724ba675SRob Herring		gpmc,oe-off-ns = <54>;
370*724ba675SRob Herring		gpmc,access-ns = <64>;
371*724ba675SRob Herring		gpmc,rd-cycle-ns = <82>;
372*724ba675SRob Herring		gpmc,wr-cycle-ns = <82>;
373*724ba675SRob Herring		gpmc,bus-turnaround-ns = <0>;
374*724ba675SRob Herring		gpmc,cycle2cycle-delay-ns = <0>;
375*724ba675SRob Herring		gpmc,clk-activation-ns = <0>;
376*724ba675SRob Herring		gpmc,wr-access-ns = <40>;
377*724ba675SRob Herring		gpmc,wr-data-mux-bus-ns = <0>;
378*724ba675SRob Herring		/* MTD partition table */
379*724ba675SRob Herring		#address-cells = <1>;
380*724ba675SRob Herring		#size-cells = <1>;
381*724ba675SRob Herring		partition@0 {
382*724ba675SRob Herring			label = "spl";
383*724ba675SRob Herring			reg = <0x00000000 0x00200000>;
384*724ba675SRob Herring		};
385*724ba675SRob Herring		partition@1 {
386*724ba675SRob Herring			label = "uboot";
387*724ba675SRob Herring			reg = <0x00200000 0x00100000>;
388*724ba675SRob Herring		};
389*724ba675SRob Herring		partition@2 {
390*724ba675SRob Herring			label = "uboot environment";
391*724ba675SRob Herring			reg = <0x00300000 0x00100000>;
392*724ba675SRob Herring		};
393*724ba675SRob Herring		partition@3 {
394*724ba675SRob Herring			label = "dtb";
395*724ba675SRob Herring			reg = <0x00400000 0x00100000>;
396*724ba675SRob Herring		};
397*724ba675SRob Herring		partition@4 {
398*724ba675SRob Herring			label = "splash";
399*724ba675SRob Herring			reg = <0x00500000 0x00400000>;
400*724ba675SRob Herring		};
401*724ba675SRob Herring		partition@5 {
402*724ba675SRob Herring			label = "linux";
403*724ba675SRob Herring			reg = <0x00900000 0x00600000>;
404*724ba675SRob Herring		};
405*724ba675SRob Herring		partition@6 {
406*724ba675SRob Herring			label = "rootfs";
407*724ba675SRob Herring			reg = <0x00F00000 0>;
408*724ba675SRob Herring		};
409*724ba675SRob Herring	};
410*724ba675SRob Herring};
411*724ba675SRob Herring
412*724ba675SRob Herring&elm {
413*724ba675SRob Herring	status = "okay";
414*724ba675SRob Herring};
415*724ba675SRob Herring
416*724ba675SRob Herring&mac_sw {
417*724ba675SRob Herring	pinctrl-names = "default", "sleep";
418*724ba675SRob Herring	pinctrl-0 = <&cpsw_default>;
419*724ba675SRob Herring	pinctrl-1 = <&cpsw_sleep>;
420*724ba675SRob Herring	status = "okay";
421*724ba675SRob Herring};
422*724ba675SRob Herring
423*724ba675SRob Herring&davinci_mdio_sw {
424*724ba675SRob Herring	pinctrl-names = "default", "sleep";
425*724ba675SRob Herring	pinctrl-0 = <&davinci_mdio_default>;
426*724ba675SRob Herring	pinctrl-1 = <&davinci_mdio_sleep>;
427*724ba675SRob Herring
428*724ba675SRob Herring	ethphy0: ethernet-phy@0 {
429*724ba675SRob Herring		reg = <0>;
430*724ba675SRob Herring	};
431*724ba675SRob Herring};
432*724ba675SRob Herring
433*724ba675SRob Herring&cpsw_port1 {
434*724ba675SRob Herring	phy-handle = <&ethphy0>;
435*724ba675SRob Herring	phy-mode = "rgmii-txid";
436*724ba675SRob Herring	ti,dual-emac-pvid = <1>;
437*724ba675SRob Herring};
438*724ba675SRob Herring
439*724ba675SRob Herring&cpsw_port2 {
440*724ba675SRob Herring	status = "disabled";
441*724ba675SRob Herring};
442*724ba675SRob Herring
443*724ba675SRob Herring&mmc1 {
444*724ba675SRob Herring	status = "okay";
445*724ba675SRob Herring	vmmc-supply = <&vmmc_fixed>;
446*724ba675SRob Herring	bus-width = <4>;
447*724ba675SRob Herring	pinctrl-names = "default";
448*724ba675SRob Herring	pinctrl-0 = <&mmc1_pins>;
449*724ba675SRob Herring};
450*724ba675SRob Herring
451*724ba675SRob Herring&dcan0 {
452*724ba675SRob Herring	status = "okay";
453*724ba675SRob Herring	pinctrl-names = "default";
454*724ba675SRob Herring	pinctrl-0 = <&dcan0_pins>;
455*724ba675SRob Herring};
456*724ba675SRob Herring
457*724ba675SRob Herring&dcan1 {
458*724ba675SRob Herring	status = "okay";
459*724ba675SRob Herring	pinctrl-names = "default";
460*724ba675SRob Herring	pinctrl-0 = <&dcan1_pins>;
461*724ba675SRob Herring};
462*724ba675SRob Herring
463*724ba675SRob Herring/* Touschscreen and analog digital converter */
464*724ba675SRob Herring&tscadc {
465*724ba675SRob Herring	status = "okay";
466*724ba675SRob Herring	tsc {
467*724ba675SRob Herring		ti,wires = <4>;
468*724ba675SRob Herring		ti,x-plate-resistance = <200>;
469*724ba675SRob Herring		ti,coordinate-readouts = <5>;
470*724ba675SRob Herring		ti,wire-config = <0x01 0x10 0x23 0x32>;
471*724ba675SRob Herring		ti,charge-delay = <0x400>;
472*724ba675SRob Herring	};
473*724ba675SRob Herring
474*724ba675SRob Herring	adc {
475*724ba675SRob Herring		ti,adc-channels = <4 5 6 7>;
476*724ba675SRob Herring	};
477*724ba675SRob Herring};
478*724ba675SRob Herring
479*724ba675SRob Herring/* CPU audio */
480*724ba675SRob Herring&mcasp1 {
481*724ba675SRob Herring		pinctrl-names = "default";
482*724ba675SRob Herring		pinctrl-0 = <&mcasp1_pins>;
483*724ba675SRob Herring
484*724ba675SRob Herring		op-mode = <0>;          /* MCASP_IIS_MODE */
485*724ba675SRob Herring		tdm-slots = <2>;
486*724ba675SRob Herring		/* 16 serializers */
487*724ba675SRob Herring		num-serializer = <16>;
488*724ba675SRob Herring		serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
489*724ba675SRob Herring			0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0
490*724ba675SRob Herring		>;
491*724ba675SRob Herring		tx-num-evt = <1>;
492*724ba675SRob Herring		rx-num-evt = <1>;
493*724ba675SRob Herring
494*724ba675SRob Herring		#sound-dai-cells = <0>;
495*724ba675SRob Herring		status = "okay";
496*724ba675SRob Herring};
497*724ba675SRob Herring
498*724ba675SRob Herring&spi0 {
499*724ba675SRob Herring	status = "okay";
500*724ba675SRob Herring	pinctrl-names = "default";
501*724ba675SRob Herring	pinctrl-0 = <&spi0_pins>;
502*724ba675SRob Herring	ti,pindir-d0-out-d1-in;
503*724ba675SRob Herring	/* WLS1271 WiFi */
504*724ba675SRob Herring	wlcore: wlcore@1 {
505*724ba675SRob Herring		compatible = "ti,wl1271";
506*724ba675SRob Herring		pinctrl-names = "default";
507*724ba675SRob Herring		pinctrl-0 = <&wifi_pins>;
508*724ba675SRob Herring		reg = <1>;
509*724ba675SRob Herring		spi-max-frequency = <48000000>;
510*724ba675SRob Herring		clock-xtal;
511*724ba675SRob Herring		ref-clock-frequency = <38400000>;
512*724ba675SRob Herring		interrupt-parent = <&gpio3>;
513*724ba675SRob Herring		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
514*724ba675SRob Herring		vwlan-supply = <&vwlan_fixed>;
515*724ba675SRob Herring	};
516*724ba675SRob Herring};
517