1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
4*724ba675SRob Herring */
5*724ba675SRob Herring
6*724ba675SRob Herring/dts-v1/;
7*724ba675SRob Herring#include "rk3288-firefly.dtsi"
8*724ba675SRob Herring
9*724ba675SRob Herring/ {
10*724ba675SRob Herring	model = "Firefly-RK3288 Beta";
11*724ba675SRob Herring	compatible = "firefly,firefly-rk3288-beta", "rockchip,rk3288";
12*724ba675SRob Herring};
13*724ba675SRob Herring
14*724ba675SRob Herring&ir {
15*724ba675SRob Herring	gpios = <&gpio7 RK_PA5 GPIO_ACTIVE_LOW>;
16*724ba675SRob Herring};
17*724ba675SRob Herring
18*724ba675SRob Herring&pinctrl {
19*724ba675SRob Herring	act8846 {
20*724ba675SRob Herring		pmic_vsel: pmic-vsel {
21*724ba675SRob Herring			rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
22*724ba675SRob Herring		};
23*724ba675SRob Herring	};
24*724ba675SRob Herring
25*724ba675SRob Herring	ir {
26*724ba675SRob Herring		ir_int: ir-int {
27*724ba675SRob Herring			rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
28*724ba675SRob Herring		};
29*724ba675SRob Herring	};
30*724ba675SRob Herring};
31*724ba675SRob Herring
32*724ba675SRob Herring&pwm0 {
33*724ba675SRob Herring	status = "okay";
34*724ba675SRob Herring};
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