1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a7745 SoC
4 *
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/clock/r8a7745-cpg-mssr.h>
11#include <dt-bindings/power/r8a7745-sysc.h>
12
13/ {
14	compatible = "renesas,r8a7745";
15	#address-cells = <2>;
16	#size-cells = <2>;
17
18	aliases {
19		i2c0 = &i2c0;
20		i2c1 = &i2c1;
21		i2c2 = &i2c2;
22		i2c3 = &i2c3;
23		i2c4 = &i2c4;
24		i2c5 = &i2c5;
25		i2c6 = &iic0;
26		i2c7 = &iic1;
27		spi0 = &qspi;
28		spi1 = &msiof0;
29		spi2 = &msiof1;
30		spi3 = &msiof2;
31		vin0 = &vin0;
32		vin1 = &vin1;
33	};
34
35	/*
36	 * The external audio clocks are configured  as 0 Hz fixed
37	 * frequency clocks by default.  Boards that provide audio
38	 * clocks should override them.
39	 */
40	audio_clka: audio_clka {
41		compatible = "fixed-clock";
42		#clock-cells = <0>;
43		clock-frequency = <0>;
44	};
45	audio_clkb: audio_clkb {
46		compatible = "fixed-clock";
47		#clock-cells = <0>;
48		clock-frequency = <0>;
49	};
50	audio_clkc: audio_clkc {
51		compatible = "fixed-clock";
52		#clock-cells = <0>;
53		clock-frequency = <0>;
54	};
55
56	/* External CAN clock */
57	can_clk: can {
58		compatible = "fixed-clock";
59		#clock-cells = <0>;
60		/* This value must be overridden by the board. */
61		clock-frequency = <0>;
62	};
63
64	cpus {
65		#address-cells = <1>;
66		#size-cells = <0>;
67
68		cpu0: cpu@0 {
69			device_type = "cpu";
70			compatible = "arm,cortex-a7";
71			reg = <0>;
72			clock-frequency = <1000000000>;
73			clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
74			power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
75			enable-method = "renesas,apmu";
76			next-level-cache = <&L2_CA7>;
77		};
78
79		cpu1: cpu@1 {
80			device_type = "cpu";
81			compatible = "arm,cortex-a7";
82			reg = <1>;
83			clock-frequency = <1000000000>;
84			clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
85			power-domains = <&sysc R8A7745_PD_CA7_CPU1>;
86			enable-method = "renesas,apmu";
87			next-level-cache = <&L2_CA7>;
88		};
89
90		L2_CA7: cache-controller-0 {
91			compatible = "cache";
92			cache-unified;
93			cache-level = <2>;
94			power-domains = <&sysc R8A7745_PD_CA7_SCU>;
95		};
96	};
97
98	/* External root clock */
99	extal_clk: extal {
100		compatible = "fixed-clock";
101		#clock-cells = <0>;
102		/* This value must be overridden by the board. */
103		clock-frequency = <0>;
104	};
105
106	pmu {
107		compatible = "arm,cortex-a7-pmu";
108		interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
109				      <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
110		interrupt-affinity = <&cpu0>, <&cpu1>;
111	};
112
113	/* External SCIF clock */
114	scif_clk: scif {
115		compatible = "fixed-clock";
116		#clock-cells = <0>;
117		/* This value must be overridden by the board. */
118		clock-frequency = <0>;
119	};
120
121	soc {
122		compatible = "simple-bus";
123		interrupt-parent = <&gic>;
124
125		#address-cells = <2>;
126		#size-cells = <2>;
127		ranges;
128
129		gpio0: gpio@e6050000 {
130			compatible = "renesas,gpio-r8a7745",
131				     "renesas,rcar-gen2-gpio";
132			reg = <0 0xe6050000 0 0x50>;
133			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
134			#gpio-cells = <2>;
135			gpio-controller;
136			gpio-ranges = <&pfc 0 0 32>;
137			#interrupt-cells = <2>;
138			interrupt-controller;
139			clocks = <&cpg CPG_MOD 912>;
140			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
141			resets = <&cpg 912>;
142		};
143
144		gpio1: gpio@e6051000 {
145			compatible = "renesas,gpio-r8a7745",
146				     "renesas,rcar-gen2-gpio";
147			reg = <0 0xe6051000 0 0x50>;
148			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
149			#gpio-cells = <2>;
150			gpio-controller;
151			gpio-ranges = <&pfc 0 32 26>;
152			#interrupt-cells = <2>;
153			interrupt-controller;
154			clocks = <&cpg CPG_MOD 911>;
155			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
156			resets = <&cpg 911>;
157		};
158
159		gpio2: gpio@e6052000 {
160			compatible = "renesas,gpio-r8a7745",
161				     "renesas,rcar-gen2-gpio";
162			reg = <0 0xe6052000 0 0x50>;
163			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
164			#gpio-cells = <2>;
165			gpio-controller;
166			gpio-ranges = <&pfc 0 64 32>;
167			#interrupt-cells = <2>;
168			interrupt-controller;
169			clocks = <&cpg CPG_MOD 910>;
170			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
171			resets = <&cpg 910>;
172		};
173
174		gpio3: gpio@e6053000 {
175			compatible = "renesas,gpio-r8a7745",
176				     "renesas,rcar-gen2-gpio";
177			reg = <0 0xe6053000 0 0x50>;
178			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
179			#gpio-cells = <2>;
180			gpio-controller;
181			gpio-ranges = <&pfc 0 96 32>;
182			#interrupt-cells = <2>;
183			interrupt-controller;
184			clocks = <&cpg CPG_MOD 909>;
185			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
186			resets = <&cpg 909>;
187		};
188
189		gpio4: gpio@e6054000 {
190			compatible = "renesas,gpio-r8a7745",
191				     "renesas,rcar-gen2-gpio";
192			reg = <0 0xe6054000 0 0x50>;
193			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
194			#gpio-cells = <2>;
195			gpio-controller;
196			gpio-ranges = <&pfc 0 128 32>;
197			#interrupt-cells = <2>;
198			interrupt-controller;
199			clocks = <&cpg CPG_MOD 908>;
200			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
201			resets = <&cpg 908>;
202		};
203
204		gpio5: gpio@e6055000 {
205			compatible = "renesas,gpio-r8a7745",
206				     "renesas,rcar-gen2-gpio";
207			reg = <0 0xe6055000 0 0x50>;
208			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
209			#gpio-cells = <2>;
210			gpio-controller;
211			gpio-ranges = <&pfc 0 160 28>;
212			#interrupt-cells = <2>;
213			interrupt-controller;
214			clocks = <&cpg CPG_MOD 907>;
215			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
216			resets = <&cpg 907>;
217		};
218
219		gpio6: gpio@e6055400 {
220			compatible = "renesas,gpio-r8a7745",
221				     "renesas,rcar-gen2-gpio";
222			reg = <0 0xe6055400 0 0x50>;
223			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
224			#gpio-cells = <2>;
225			gpio-controller;
226			gpio-ranges = <&pfc 0 192 26>;
227			#interrupt-cells = <2>;
228			interrupt-controller;
229			clocks = <&cpg CPG_MOD 905>;
230			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
231			resets = <&cpg 905>;
232		};
233
234		pfc: pinctrl@e6060000 {
235			compatible = "renesas,pfc-r8a7745";
236			reg = <0 0xe6060000 0 0x11c>;
237		};
238
239		tpu: pwm@e60f0000 {
240			compatible = "renesas,tpu-r8a7745", "renesas,tpu";
241			reg = <0 0xe60f0000 0 0x148>;
242			clocks = <&cpg CPG_MOD 304>;
243			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
244			resets = <&cpg 304>;
245			#pwm-cells = <3>;
246			status = "disabled";
247		};
248
249		cpg: clock-controller@e6150000 {
250			compatible = "renesas,r8a7745-cpg-mssr";
251			reg = <0 0xe6150000 0 0x1000>;
252			clocks = <&extal_clk>, <&usb_extal_clk>;
253			clock-names = "extal", "usb_extal";
254			#clock-cells = <2>;
255			#power-domain-cells = <0>;
256			#reset-cells = <1>;
257		};
258
259		apmu@e6151000 {
260			compatible = "renesas,r8a7745-apmu", "renesas,apmu";
261			reg = <0 0xe6151000 0 0x188>;
262			cpus = <&cpu0>, <&cpu1>;
263		};
264
265		rst: reset-controller@e6160000 {
266			compatible = "renesas,r8a7745-rst";
267			reg = <0 0xe6160000 0 0x100>;
268		};
269
270		rwdt: watchdog@e6020000 {
271			compatible = "renesas,r8a7745-wdt",
272				     "renesas,rcar-gen2-wdt";
273			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
274			reg = <0 0xe6020000 0 0x0c>;
275			clocks = <&cpg CPG_MOD 402>;
276			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
277			resets = <&cpg 402>;
278			status = "disabled";
279		};
280
281		sysc: system-controller@e6180000 {
282			compatible = "renesas,r8a7745-sysc";
283			reg = <0 0xe6180000 0 0x200>;
284			#power-domain-cells = <1>;
285		};
286
287		irqc: interrupt-controller@e61c0000 {
288			compatible = "renesas,irqc-r8a7745", "renesas,irqc";
289			#interrupt-cells = <2>;
290			interrupt-controller;
291			reg = <0 0xe61c0000 0 0x200>;
292			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
293				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
294				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
295				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
296				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
297				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
298				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
299				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
300				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
301				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
302			clocks = <&cpg CPG_MOD 407>;
303			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
304			resets = <&cpg 407>;
305		};
306
307		ipmmu_sy0: iommu@e6280000 {
308			compatible = "renesas,ipmmu-r8a7745",
309				     "renesas,ipmmu-vmsa";
310			reg = <0 0xe6280000 0 0x1000>;
311			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
312				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
313			#iommu-cells = <1>;
314			status = "disabled";
315		};
316
317		ipmmu_sy1: iommu@e6290000 {
318			compatible = "renesas,ipmmu-r8a7745",
319				     "renesas,ipmmu-vmsa";
320			reg = <0 0xe6290000 0 0x1000>;
321			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
322			#iommu-cells = <1>;
323			status = "disabled";
324		};
325
326		ipmmu_ds: iommu@e6740000 {
327			compatible = "renesas,ipmmu-r8a7745",
328				     "renesas,ipmmu-vmsa";
329			reg = <0 0xe6740000 0 0x1000>;
330			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
331				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
332			#iommu-cells = <1>;
333			status = "disabled";
334		};
335
336		ipmmu_mp: iommu@ec680000 {
337			compatible = "renesas,ipmmu-r8a7745",
338				     "renesas,ipmmu-vmsa";
339			reg = <0 0xec680000 0 0x1000>;
340			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
341			#iommu-cells = <1>;
342			status = "disabled";
343		};
344
345		ipmmu_mx: iommu@fe951000 {
346			compatible = "renesas,ipmmu-r8a7745",
347				     "renesas,ipmmu-vmsa";
348			reg = <0 0xfe951000 0 0x1000>;
349			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
350				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
351			#iommu-cells = <1>;
352			status = "disabled";
353		};
354
355		ipmmu_gp: iommu@e62a0000 {
356			compatible = "renesas,ipmmu-r8a7745",
357				     "renesas,ipmmu-vmsa";
358			reg = <0 0xe62a0000 0 0x1000>;
359			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
360				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
361			#iommu-cells = <1>;
362			status = "disabled";
363		};
364
365		icram0:	sram@e63a0000 {
366			compatible = "mmio-sram";
367			reg = <0 0xe63a0000 0 0x12000>;
368			#address-cells = <1>;
369			#size-cells = <1>;
370			ranges = <0 0 0xe63a0000 0x12000>;
371		};
372
373		icram1:	sram@e63c0000 {
374			compatible = "mmio-sram";
375			reg = <0 0xe63c0000 0 0x1000>;
376			#address-cells = <1>;
377			#size-cells = <1>;
378			ranges = <0 0 0xe63c0000 0x1000>;
379
380			smp-sram@0 {
381				compatible = "renesas,smp-sram";
382				reg = <0 0x100>;
383			};
384		};
385
386		icram2:	sram@e6300000 {
387			compatible = "mmio-sram";
388			reg = <0 0xe6300000 0 0x40000>;
389			#address-cells = <1>;
390			#size-cells = <1>;
391			ranges = <0 0 0xe6300000 0x40000>;
392		};
393		i2c0: i2c@e6508000 {
394			#address-cells = <1>;
395			#size-cells = <0>;
396			compatible = "renesas,i2c-r8a7745",
397				     "renesas,rcar-gen2-i2c";
398			reg = <0 0xe6508000 0 0x40>;
399			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
400			clocks = <&cpg CPG_MOD 931>;
401			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
402			resets = <&cpg 931>;
403			i2c-scl-internal-delay-ns = <6>;
404			status = "disabled";
405		};
406
407		i2c1: i2c@e6518000 {
408			#address-cells = <1>;
409			#size-cells = <0>;
410			compatible = "renesas,i2c-r8a7745",
411				     "renesas,rcar-gen2-i2c";
412			reg = <0 0xe6518000 0 0x40>;
413			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
414			clocks = <&cpg CPG_MOD 930>;
415			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
416			resets = <&cpg 930>;
417			i2c-scl-internal-delay-ns = <6>;
418			status = "disabled";
419		};
420
421		i2c2: i2c@e6530000 {
422			#address-cells = <1>;
423			#size-cells = <0>;
424			compatible = "renesas,i2c-r8a7745",
425				     "renesas,rcar-gen2-i2c";
426			reg = <0 0xe6530000 0 0x40>;
427			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
428			clocks = <&cpg CPG_MOD 929>;
429			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
430			resets = <&cpg 929>;
431			i2c-scl-internal-delay-ns = <6>;
432			status = "disabled";
433		};
434
435		i2c3: i2c@e6540000 {
436			#address-cells = <1>;
437			#size-cells = <0>;
438			compatible = "renesas,i2c-r8a7745",
439				     "renesas,rcar-gen2-i2c";
440			reg = <0 0xe6540000 0 0x40>;
441			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
442			clocks = <&cpg CPG_MOD 928>;
443			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
444			resets = <&cpg 928>;
445			i2c-scl-internal-delay-ns = <6>;
446			status = "disabled";
447		};
448
449		i2c4: i2c@e6520000 {
450			#address-cells = <1>;
451			#size-cells = <0>;
452			compatible = "renesas,i2c-r8a7745",
453				     "renesas,rcar-gen2-i2c";
454			reg = <0 0xe6520000 0 0x40>;
455			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
456			clocks = <&cpg CPG_MOD 927>;
457			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
458			resets = <&cpg 927>;
459			i2c-scl-internal-delay-ns = <6>;
460			status = "disabled";
461		};
462
463		i2c5: i2c@e6528000 {
464			#address-cells = <1>;
465			#size-cells = <0>;
466			compatible = "renesas,i2c-r8a7745",
467				     "renesas,rcar-gen2-i2c";
468			reg = <0 0xe6528000 0 0x40>;
469			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
470			clocks = <&cpg CPG_MOD 925>;
471			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
472			resets = <&cpg 925>;
473			i2c-scl-internal-delay-ns = <6>;
474			status = "disabled";
475		};
476
477		iic0: i2c@e6500000 {
478			#address-cells = <1>;
479			#size-cells = <0>;
480			compatible = "renesas,iic-r8a7745",
481				     "renesas,rcar-gen2-iic",
482				     "renesas,rmobile-iic";
483			reg = <0 0xe6500000 0 0x425>;
484			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
485			clocks = <&cpg CPG_MOD 318>;
486			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
487			       <&dmac1 0x61>, <&dmac1 0x62>;
488			dma-names = "tx", "rx", "tx", "rx";
489			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
490			resets = <&cpg 318>;
491			status = "disabled";
492		};
493
494		iic1: i2c@e6510000 {
495			#address-cells = <1>;
496			#size-cells = <0>;
497			compatible = "renesas,iic-r8a7745",
498				     "renesas,rcar-gen2-iic",
499				     "renesas,rmobile-iic";
500			reg = <0 0xe6510000 0 0x425>;
501			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
502			clocks = <&cpg CPG_MOD 323>;
503			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
504			       <&dmac1 0x65>, <&dmac1 0x66>;
505			dma-names = "tx", "rx", "tx", "rx";
506			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
507			resets = <&cpg 323>;
508			status = "disabled";
509		};
510
511		hsusb: usb@e6590000 {
512			compatible = "renesas,usbhs-r8a7745",
513				     "renesas,rcar-gen2-usbhs";
514			reg = <0 0xe6590000 0 0x100>;
515			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
516			clocks = <&cpg CPG_MOD 704>;
517			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
518			       <&usb_dmac1 0>, <&usb_dmac1 1>;
519			dma-names = "ch0", "ch1", "ch2", "ch3";
520			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
521			resets = <&cpg 704>;
522			renesas,buswait = <4>;
523			phys = <&usb0 1>;
524			phy-names = "usb";
525			status = "disabled";
526		};
527
528		usbphy: usb-phy-controller@e6590100 {
529			compatible = "renesas,usb-phy-r8a7745",
530				     "renesas,rcar-gen2-usb-phy";
531			reg = <0 0xe6590100 0 0x100>;
532			#address-cells = <1>;
533			#size-cells = <0>;
534			clocks = <&cpg CPG_MOD 704>;
535			clock-names = "usbhs";
536			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
537			resets = <&cpg 704>;
538			status = "disabled";
539
540			usb0: usb-phy@0 {
541				reg = <0>;
542				#phy-cells = <1>;
543			};
544			usb2: usb-phy@2 {
545				reg = <2>;
546				#phy-cells = <1>;
547			};
548		};
549
550		usb_dmac0: dma-controller@e65a0000 {
551			compatible = "renesas,r8a7745-usb-dmac",
552				     "renesas,usb-dmac";
553			reg = <0 0xe65a0000 0 0x100>;
554			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
555				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
556			interrupt-names = "ch0", "ch1";
557			clocks = <&cpg CPG_MOD 330>;
558			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
559			resets = <&cpg 330>;
560			#dma-cells = <1>;
561			dma-channels = <2>;
562		};
563
564		usb_dmac1: dma-controller@e65b0000 {
565			compatible = "renesas,r8a7745-usb-dmac",
566				     "renesas,usb-dmac";
567			reg = <0 0xe65b0000 0 0x100>;
568			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
569				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
570			interrupt-names = "ch0", "ch1";
571			clocks = <&cpg CPG_MOD 331>;
572			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
573			resets = <&cpg 331>;
574			#dma-cells = <1>;
575			dma-channels = <2>;
576		};
577
578		dmac0: dma-controller@e6700000 {
579			compatible = "renesas,dmac-r8a7745",
580				     "renesas,rcar-dmac";
581			reg = <0 0xe6700000 0 0x20000>;
582			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
583				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
584				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
585				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
586				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
587				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
588				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
589				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
590				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
591				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
592				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
593				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
594				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
595				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
596				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
597				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
598			interrupt-names = "error",
599					  "ch0", "ch1", "ch2", "ch3",
600					  "ch4", "ch5", "ch6", "ch7",
601					  "ch8", "ch9", "ch10", "ch11",
602					  "ch12", "ch13", "ch14";
603			clocks = <&cpg CPG_MOD 219>;
604			clock-names = "fck";
605			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
606			resets = <&cpg 219>;
607			#dma-cells = <1>;
608			dma-channels = <15>;
609		};
610
611		dmac1: dma-controller@e6720000 {
612			compatible = "renesas,dmac-r8a7745",
613				     "renesas,rcar-dmac";
614			reg = <0 0xe6720000 0 0x20000>;
615			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
616				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
617				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
618				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
619				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
620				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
621				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
622				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
623				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
624				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
625				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
626				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
627				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
628				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
629				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
630				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
631			interrupt-names = "error",
632					  "ch0", "ch1", "ch2", "ch3",
633					  "ch4", "ch5", "ch6", "ch7",
634					  "ch8", "ch9", "ch10", "ch11",
635					  "ch12", "ch13", "ch14";
636			clocks = <&cpg CPG_MOD 218>;
637			clock-names = "fck";
638			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
639			resets = <&cpg 218>;
640			#dma-cells = <1>;
641			dma-channels = <15>;
642		};
643
644		avb: ethernet@e6800000 {
645			compatible = "renesas,etheravb-r8a7745",
646				     "renesas,etheravb-rcar-gen2";
647			reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
648			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
649			clocks = <&cpg CPG_MOD 812>;
650			clock-names = "fck";
651			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
652			resets = <&cpg 812>;
653			#address-cells = <1>;
654			#size-cells = <0>;
655			status = "disabled";
656		};
657
658		qspi: spi@e6b10000 {
659			compatible = "renesas,qspi-r8a7745", "renesas,qspi";
660			reg = <0 0xe6b10000 0 0x2c>;
661			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
662			clocks = <&cpg CPG_MOD 917>;
663			dmas = <&dmac0 0x17>, <&dmac0 0x18>,
664			       <&dmac1 0x17>, <&dmac1 0x18>;
665			dma-names = "tx", "rx", "tx", "rx";
666			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
667			num-cs = <1>;
668			#address-cells = <1>;
669			#size-cells = <0>;
670			resets = <&cpg 917>;
671			status = "disabled";
672		};
673
674		scifa0: serial@e6c40000 {
675			compatible = "renesas,scifa-r8a7745",
676				     "renesas,rcar-gen2-scifa", "renesas,scifa";
677			reg = <0 0xe6c40000 0 0x40>;
678			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
679			clocks = <&cpg CPG_MOD 204>;
680			clock-names = "fck";
681			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
682			       <&dmac1 0x21>, <&dmac1 0x22>;
683			dma-names = "tx", "rx", "tx", "rx";
684			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
685			resets = <&cpg 204>;
686			status = "disabled";
687		};
688
689		scifa1: serial@e6c50000 {
690			compatible = "renesas,scifa-r8a7745",
691				     "renesas,rcar-gen2-scifa", "renesas,scifa";
692			reg = <0 0xe6c50000 0 0x40>;
693			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
694			clocks = <&cpg CPG_MOD 203>;
695			clock-names = "fck";
696			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
697			       <&dmac1 0x25>, <&dmac1 0x26>;
698			dma-names = "tx", "rx", "tx", "rx";
699			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
700			resets = <&cpg 203>;
701			status = "disabled";
702		};
703
704		scifa2: serial@e6c60000 {
705			compatible = "renesas,scifa-r8a7745",
706				     "renesas,rcar-gen2-scifa", "renesas,scifa";
707			reg = <0 0xe6c60000 0 0x40>;
708			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
709			clocks = <&cpg CPG_MOD 202>;
710			clock-names = "fck";
711			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
712			       <&dmac1 0x27>, <&dmac1 0x28>;
713			dma-names = "tx", "rx", "tx", "rx";
714			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
715			resets = <&cpg 202>;
716			status = "disabled";
717		};
718
719		scifa3: serial@e6c70000 {
720			compatible = "renesas,scifa-r8a7745",
721				     "renesas,rcar-gen2-scifa", "renesas,scifa";
722			reg = <0 0xe6c70000 0 0x40>;
723			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
724			clocks = <&cpg CPG_MOD 1106>;
725			clock-names = "fck";
726			dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
727			       <&dmac1 0x1b>, <&dmac1 0x1c>;
728			dma-names = "tx", "rx", "tx", "rx";
729			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
730			resets = <&cpg 1106>;
731			status = "disabled";
732		};
733
734		scifa4: serial@e6c78000 {
735			compatible = "renesas,scifa-r8a7745",
736				     "renesas,rcar-gen2-scifa", "renesas,scifa";
737			reg = <0 0xe6c78000 0 0x40>;
738			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
739			clocks = <&cpg CPG_MOD 1107>;
740			clock-names = "fck";
741			dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
742			       <&dmac1 0x1f>, <&dmac1 0x20>;
743			dma-names = "tx", "rx", "tx", "rx";
744			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
745			resets = <&cpg 1107>;
746			status = "disabled";
747		};
748
749		scifa5: serial@e6c80000 {
750			compatible = "renesas,scifa-r8a7745",
751				     "renesas,rcar-gen2-scifa", "renesas,scifa";
752			reg = <0 0xe6c80000 0 0x40>;
753			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
754			clocks = <&cpg CPG_MOD 1108>;
755			clock-names = "fck";
756			dmas = <&dmac0 0x23>, <&dmac0 0x24>,
757			       <&dmac1 0x23>, <&dmac1 0x24>;
758			dma-names = "tx", "rx", "tx", "rx";
759			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
760			resets = <&cpg 1108>;
761			status = "disabled";
762		};
763
764		scifb0: serial@e6c20000 {
765			compatible = "renesas,scifb-r8a7745",
766				     "renesas,rcar-gen2-scifb", "renesas,scifb";
767			reg = <0 0xe6c20000 0 0x100>;
768			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
769			clocks = <&cpg CPG_MOD 206>;
770			clock-names = "fck";
771			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
772			       <&dmac1 0x3d>, <&dmac1 0x3e>;
773			dma-names = "tx", "rx", "tx", "rx";
774			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
775			resets = <&cpg 206>;
776			status = "disabled";
777		};
778
779		scifb1: serial@e6c30000 {
780			compatible = "renesas,scifb-r8a7745",
781				     "renesas,rcar-gen2-scifb", "renesas,scifb";
782			reg = <0 0xe6c30000 0 0x100>;
783			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
784			clocks = <&cpg CPG_MOD 207>;
785			clock-names = "fck";
786			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
787			       <&dmac1 0x19>, <&dmac1 0x1a>;
788			dma-names = "tx", "rx", "tx", "rx";
789			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
790			resets = <&cpg 207>;
791			status = "disabled";
792		};
793
794		scifb2: serial@e6ce0000 {
795			compatible = "renesas,scifb-r8a7745",
796				     "renesas,rcar-gen2-scifb", "renesas,scifb";
797			reg = <0 0xe6ce0000 0 0x100>;
798			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
799			clocks = <&cpg CPG_MOD 216>;
800			clock-names = "fck";
801			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
802			       <&dmac1 0x1d>, <&dmac1 0x1e>;
803			dma-names = "tx", "rx", "tx", "rx";
804			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
805			resets = <&cpg 216>;
806			status = "disabled";
807		};
808
809		scif0: serial@e6e60000 {
810			compatible = "renesas,scif-r8a7745",
811				     "renesas,rcar-gen2-scif", "renesas,scif";
812			reg = <0 0xe6e60000 0 0x40>;
813			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
814			clocks = <&cpg CPG_MOD 721>,
815				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
816			clock-names = "fck", "brg_int", "scif_clk";
817			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
818			       <&dmac1 0x29>, <&dmac1 0x2a>;
819			dma-names = "tx", "rx", "tx", "rx";
820			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
821			resets = <&cpg 721>;
822			status = "disabled";
823		};
824
825		scif1: serial@e6e68000 {
826			compatible = "renesas,scif-r8a7745",
827				     "renesas,rcar-gen2-scif", "renesas,scif";
828			reg = <0 0xe6e68000 0 0x40>;
829			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
830			clocks = <&cpg CPG_MOD 720>,
831				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
832			clock-names = "fck", "brg_int", "scif_clk";
833			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
834			       <&dmac1 0x2d>, <&dmac1 0x2e>;
835			dma-names = "tx", "rx", "tx", "rx";
836			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
837			resets = <&cpg 720>;
838			status = "disabled";
839		};
840
841		scif2: serial@e6e58000 {
842			compatible = "renesas,scif-r8a7745",
843				     "renesas,rcar-gen2-scif", "renesas,scif";
844			reg = <0 0xe6e58000 0 0x40>;
845			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
846			clocks = <&cpg CPG_MOD 719>,
847				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
848			clock-names = "fck", "brg_int", "scif_clk";
849			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
850			       <&dmac1 0x2b>, <&dmac1 0x2c>;
851			dma-names = "tx", "rx", "tx", "rx";
852			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
853			resets = <&cpg 719>;
854			status = "disabled";
855		};
856
857		scif3: serial@e6ea8000 {
858			compatible = "renesas,scif-r8a7745",
859				     "renesas,rcar-gen2-scif", "renesas,scif";
860			reg = <0 0xe6ea8000 0 0x40>;
861			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
862			clocks = <&cpg CPG_MOD 718>,
863				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
864			clock-names = "fck", "brg_int", "scif_clk";
865			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
866			       <&dmac1 0x2f>, <&dmac1 0x30>;
867			dma-names = "tx", "rx", "tx", "rx";
868			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
869			resets = <&cpg 718>;
870			status = "disabled";
871		};
872
873		scif4: serial@e6ee0000 {
874			compatible = "renesas,scif-r8a7745",
875				     "renesas,rcar-gen2-scif", "renesas,scif";
876			reg = <0 0xe6ee0000 0 0x40>;
877			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
878			clocks = <&cpg CPG_MOD 715>,
879				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
880			clock-names = "fck", "brg_int", "scif_clk";
881			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
882			       <&dmac1 0xfb>, <&dmac1 0xfc>;
883			dma-names = "tx", "rx", "tx", "rx";
884			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
885			resets = <&cpg 715>;
886			status = "disabled";
887		};
888
889		scif5: serial@e6ee8000 {
890			compatible = "renesas,scif-r8a7745",
891				     "renesas,rcar-gen2-scif", "renesas,scif";
892			reg = <0 0xe6ee8000 0 0x40>;
893			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
894			clocks = <&cpg CPG_MOD 714>,
895				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
896			clock-names = "fck", "brg_int", "scif_clk";
897			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
898			       <&dmac1 0xfd>, <&dmac1 0xfe>;
899			dma-names = "tx", "rx", "tx", "rx";
900			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
901			resets = <&cpg 714>;
902			status = "disabled";
903		};
904
905		hscif0: serial@e62c0000 {
906			compatible = "renesas,hscif-r8a7745",
907				     "renesas,rcar-gen2-hscif", "renesas,hscif";
908			reg = <0 0xe62c0000 0 0x60>;
909			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
910			clocks = <&cpg CPG_MOD 717>,
911				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
912			clock-names = "fck", "brg_int", "scif_clk";
913			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
914			       <&dmac1 0x39>, <&dmac1 0x3a>;
915			dma-names = "tx", "rx", "tx", "rx";
916			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
917			resets = <&cpg 717>;
918			status = "disabled";
919		};
920
921		hscif1: serial@e62c8000 {
922			compatible = "renesas,hscif-r8a7745",
923				     "renesas,rcar-gen2-hscif", "renesas,hscif";
924			reg = <0 0xe62c8000 0 0x60>;
925			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
926			clocks = <&cpg CPG_MOD 716>,
927				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
928			clock-names = "fck", "brg_int", "scif_clk";
929			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
930			       <&dmac1 0x4d>, <&dmac1 0x4e>;
931			dma-names = "tx", "rx", "tx", "rx";
932			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
933			resets = <&cpg 716>;
934			status = "disabled";
935		};
936
937		hscif2: serial@e62d0000 {
938			compatible = "renesas,hscif-r8a7745",
939				     "renesas,rcar-gen2-hscif", "renesas,hscif";
940			reg = <0 0xe62d0000 0 0x60>;
941			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
942			clocks = <&cpg CPG_MOD 713>,
943				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
944			clock-names = "fck", "brg_int", "scif_clk";
945			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
946			       <&dmac1 0x3b>, <&dmac1 0x3c>;
947			dma-names = "tx", "rx", "tx", "rx";
948			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
949			resets = <&cpg 713>;
950			status = "disabled";
951		};
952
953		msiof0: spi@e6e20000 {
954			compatible = "renesas,msiof-r8a7745",
955				     "renesas,rcar-gen2-msiof";
956			reg = <0 0xe6e20000 0 0x0064>;
957			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
958			clocks = <&cpg CPG_MOD 000>;
959			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
960			       <&dmac1 0x51>, <&dmac1 0x52>;
961			dma-names = "tx", "rx", "tx", "rx";
962			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
963			#address-cells = <1>;
964			#size-cells = <0>;
965			resets = <&cpg 000>;
966			status = "disabled";
967		};
968
969		msiof1: spi@e6e10000 {
970			compatible = "renesas,msiof-r8a7745",
971				     "renesas,rcar-gen2-msiof";
972			reg = <0 0xe6e10000 0 0x0064>;
973			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
974			clocks = <&cpg CPG_MOD 208>;
975			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
976			       <&dmac1 0x55>, <&dmac1 0x56>;
977			dma-names = "tx", "rx", "tx", "rx";
978			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
979			#address-cells = <1>;
980			#size-cells = <0>;
981			resets = <&cpg 208>;
982			status = "disabled";
983		};
984
985		msiof2: spi@e6e00000 {
986			compatible = "renesas,msiof-r8a7745",
987				     "renesas,rcar-gen2-msiof";
988			reg = <0 0xe6e00000 0 0x0064>;
989			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
990			clocks = <&cpg CPG_MOD 205>;
991			dmas = <&dmac0 0x41>, <&dmac0 0x42>,
992			       <&dmac1 0x41>, <&dmac1 0x42>;
993			dma-names = "tx", "rx", "tx", "rx";
994			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
995			#address-cells = <1>;
996			#size-cells = <0>;
997			resets = <&cpg 205>;
998			status = "disabled";
999		};
1000
1001		pwm0: pwm@e6e30000 {
1002			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1003			reg = <0 0xe6e30000 0 0x8>;
1004			clocks = <&cpg CPG_MOD 523>;
1005			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1006			resets = <&cpg 523>;
1007			#pwm-cells = <2>;
1008			status = "disabled";
1009		};
1010
1011		pwm1: pwm@e6e31000 {
1012			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1013			reg = <0 0xe6e31000 0 0x8>;
1014			clocks = <&cpg CPG_MOD 523>;
1015			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1016			resets = <&cpg 523>;
1017			#pwm-cells = <2>;
1018			status = "disabled";
1019		};
1020
1021		pwm2: pwm@e6e32000 {
1022			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1023			reg = <0 0xe6e32000 0 0x8>;
1024			clocks = <&cpg CPG_MOD 523>;
1025			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1026			resets = <&cpg 523>;
1027			#pwm-cells = <2>;
1028			status = "disabled";
1029		};
1030
1031		pwm3: pwm@e6e33000 {
1032			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1033			reg = <0 0xe6e33000 0 0x8>;
1034			clocks = <&cpg CPG_MOD 523>;
1035			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1036			resets = <&cpg 523>;
1037			#pwm-cells = <2>;
1038			status = "disabled";
1039		};
1040
1041		pwm4: pwm@e6e34000 {
1042			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1043			reg = <0 0xe6e34000 0 0x8>;
1044			clocks = <&cpg CPG_MOD 523>;
1045			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1046			resets = <&cpg 523>;
1047			#pwm-cells = <2>;
1048			status = "disabled";
1049		};
1050
1051		pwm5: pwm@e6e35000 {
1052			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1053			reg = <0 0xe6e35000 0 0x8>;
1054			clocks = <&cpg CPG_MOD 523>;
1055			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1056			resets = <&cpg 523>;
1057			#pwm-cells = <2>;
1058			status = "disabled";
1059		};
1060
1061		pwm6: pwm@e6e36000 {
1062			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1063			reg = <0 0xe6e36000 0 0x8>;
1064			clocks = <&cpg CPG_MOD 523>;
1065			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1066			resets = <&cpg 523>;
1067			#pwm-cells = <2>;
1068			status = "disabled";
1069		};
1070
1071		can0: can@e6e80000 {
1072			compatible = "renesas,can-r8a7745",
1073				     "renesas,rcar-gen2-can";
1074			reg = <0 0xe6e80000 0 0x1000>;
1075			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1076			clocks = <&cpg CPG_MOD 916>,
1077				 <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1078				 <&can_clk>;
1079			clock-names = "clkp1", "clkp2", "can_clk";
1080			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1081			resets = <&cpg 916>;
1082			status = "disabled";
1083		};
1084
1085		can1: can@e6e88000 {
1086			compatible = "renesas,can-r8a7745",
1087				     "renesas,rcar-gen2-can";
1088			reg = <0 0xe6e88000 0 0x1000>;
1089			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1090			clocks = <&cpg CPG_MOD 915>,
1091				 <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1092				 <&can_clk>;
1093			clock-names = "clkp1", "clkp2", "can_clk";
1094			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1095			resets = <&cpg 915>;
1096			status = "disabled";
1097		};
1098
1099		vin0: video@e6ef0000 {
1100			compatible = "renesas,vin-r8a7745",
1101				     "renesas,rcar-gen2-vin";
1102			reg = <0 0xe6ef0000 0 0x1000>;
1103			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1104			clocks = <&cpg CPG_MOD 811>;
1105			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1106			resets = <&cpg 811>;
1107			status = "disabled";
1108		};
1109
1110		vin1: video@e6ef1000 {
1111			compatible = "renesas,vin-r8a7745",
1112				     "renesas,rcar-gen2-vin";
1113			reg = <0 0xe6ef1000 0 0x1000>;
1114			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1115			clocks = <&cpg CPG_MOD 810>;
1116			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1117			resets = <&cpg 810>;
1118			status = "disabled";
1119		};
1120
1121		rcar_sound: sound@ec500000 {
1122			/*
1123			 * #sound-dai-cells is required if simple-card
1124			 *
1125			 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1126			 * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1127			 */
1128			compatible = "renesas,rcar_sound-r8a7745",
1129				     "renesas,rcar_sound-gen2";
1130			reg = <0 0xec500000 0 0x1000>, /* SCU */
1131			      <0 0xec5a0000 0 0x100>,  /* ADG */
1132			      <0 0xec540000 0 0x1000>, /* SSIU */
1133			      <0 0xec541000 0 0x280>,  /* SSI */
1134			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
1135			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1136
1137			clocks = <&cpg CPG_MOD 1005>,
1138				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1139				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1140				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1141				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1142				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1143				 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1144				 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1145				 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1146				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1147				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1148				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1149				 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1150				 <&cpg CPG_CORE R8A7745_CLK_M2>;
1151			clock-names = "ssi-all",
1152				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1153				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1154				      "ssi.1", "ssi.0",
1155				      "src.6", "src.5", "src.4", "src.3",
1156				      "src.2", "src.1",
1157				      "ctu.0", "ctu.1",
1158				      "mix.0", "mix.1",
1159				      "dvc.0", "dvc.1",
1160				      "clk_a", "clk_b", "clk_c", "clk_i";
1161			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1162			resets = <&cpg 1005>,
1163				 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
1164				 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
1165				 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
1166				 <&cpg 1015>;
1167			reset-names = "ssi-all",
1168				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1169				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1170				      "ssi.1", "ssi.0";
1171
1172			status = "disabled";
1173
1174			rcar_sound,dvc {
1175				dvc0: dvc-0 {
1176					dmas = <&audma0 0xbc>;
1177					dma-names = "tx";
1178				};
1179				dvc1: dvc-1 {
1180					dmas = <&audma0 0xbe>;
1181					dma-names = "tx";
1182				};
1183			};
1184
1185			rcar_sound,mix {
1186				mix0: mix-0 { };
1187				mix1: mix-1 { };
1188			};
1189
1190			rcar_sound,ctu {
1191				ctu00: ctu-0 { };
1192				ctu01: ctu-1 { };
1193				ctu02: ctu-2 { };
1194				ctu03: ctu-3 { };
1195				ctu10: ctu-4 { };
1196				ctu11: ctu-5 { };
1197				ctu12: ctu-6 { };
1198				ctu13: ctu-7 { };
1199			};
1200
1201			rcar_sound,src {
1202				src-0 {
1203					status = "disabled";
1204				};
1205				src1: src-1 {
1206					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1207					dmas = <&audma0 0x87>, <&audma0 0x9c>;
1208					dma-names = "rx", "tx";
1209				};
1210				src2: src-2 {
1211					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1212					dmas = <&audma0 0x89>, <&audma0 0x9e>;
1213					dma-names = "rx", "tx";
1214				};
1215				src3: src-3 {
1216					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1217					dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1218					dma-names = "rx", "tx";
1219				};
1220				src4: src-4 {
1221					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1222					dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1223					dma-names = "rx", "tx";
1224				};
1225				src5: src-5 {
1226					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1227					dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1228					dma-names = "rx", "tx";
1229				};
1230				src6: src-6 {
1231					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1232					dmas = <&audma0 0x91>, <&audma0 0xb4>;
1233					dma-names = "rx", "tx";
1234				};
1235			};
1236
1237			rcar_sound,ssi {
1238				ssi0: ssi-0 {
1239					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1240					dmas = <&audma0 0x01>, <&audma0 0x02>,
1241					       <&audma0 0x15>, <&audma0 0x16>;
1242					dma-names = "rx", "tx", "rxu", "txu";
1243				};
1244				ssi1: ssi-1 {
1245					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1246					dmas = <&audma0 0x03>, <&audma0 0x04>,
1247					       <&audma0 0x49>, <&audma0 0x4a>;
1248					dma-names = "rx", "tx", "rxu", "txu";
1249				};
1250				ssi2: ssi-2 {
1251					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1252					dmas = <&audma0 0x05>, <&audma0 0x06>,
1253					       <&audma0 0x63>, <&audma0 0x64>;
1254					dma-names = "rx", "tx", "rxu", "txu";
1255				};
1256				ssi3: ssi-3 {
1257					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1258					dmas = <&audma0 0x07>, <&audma0 0x08>,
1259					       <&audma0 0x6f>, <&audma0 0x70>;
1260					dma-names = "rx", "tx", "rxu", "txu";
1261				};
1262				ssi4: ssi-4 {
1263					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1264					dmas = <&audma0 0x09>, <&audma0 0x0a>,
1265					       <&audma0 0x71>, <&audma0 0x72>;
1266					dma-names = "rx", "tx", "rxu", "txu";
1267				};
1268				ssi5: ssi-5 {
1269					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1270					dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1271					       <&audma0 0x73>, <&audma0 0x74>;
1272					dma-names = "rx", "tx", "rxu", "txu";
1273				};
1274				ssi6: ssi-6 {
1275					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1276					dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1277					       <&audma0 0x75>, <&audma0 0x76>;
1278					dma-names = "rx", "tx", "rxu", "txu";
1279				};
1280				ssi7: ssi-7 {
1281					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1282					dmas = <&audma0 0x0f>, <&audma0 0x10>,
1283					       <&audma0 0x79>, <&audma0 0x7a>;
1284					dma-names = "rx", "tx", "rxu", "txu";
1285				};
1286				ssi8: ssi-8 {
1287					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1288					dmas = <&audma0 0x11>, <&audma0 0x12>,
1289					       <&audma0 0x7b>, <&audma0 0x7c>;
1290					dma-names = "rx", "tx", "rxu", "txu";
1291				};
1292				ssi9: ssi-9 {
1293					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1294					dmas = <&audma0 0x13>, <&audma0 0x14>,
1295					       <&audma0 0x7d>, <&audma0 0x7e>;
1296					dma-names = "rx", "tx", "rxu", "txu";
1297				};
1298			};
1299		};
1300
1301		audma0: dma-controller@ec700000 {
1302			compatible = "renesas,dmac-r8a7745",
1303				     "renesas,rcar-dmac";
1304			reg = <0 0xec700000 0 0x10000>;
1305			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1306				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1307				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1308				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1309				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1310				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1311				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1312				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1313				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1314				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1315				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1316				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1317				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1318				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1319			interrupt-names = "error",
1320					  "ch0", "ch1", "ch2", "ch3",
1321					  "ch4", "ch5", "ch6", "ch7",
1322					  "ch8", "ch9", "ch10", "ch11",
1323					  "ch12";
1324			clocks = <&cpg CPG_MOD 502>;
1325			clock-names = "fck";
1326			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1327			resets = <&cpg 502>;
1328			#dma-cells = <1>;
1329			dma-channels = <13>;
1330		};
1331
1332		pci0: pci@ee090000 {
1333			compatible = "renesas,pci-r8a7745",
1334				     "renesas,pci-rcar-gen2";
1335			device_type = "pci";
1336			reg = <0 0xee090000 0 0xc00>,
1337			      <0 0xee080000 0 0x1100>;
1338			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1339			clocks = <&cpg CPG_MOD 703>;
1340			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1341			resets = <&cpg 703>;
1342			status = "disabled";
1343
1344			bus-range = <0 0>;
1345			#address-cells = <3>;
1346			#size-cells = <2>;
1347			#interrupt-cells = <1>;
1348			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1349			interrupt-map-mask = <0xf800 0 0 0x7>;
1350			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1351					<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1352					<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1353
1354			usb@1,0 {
1355				reg = <0x800 0 0 0 0>;
1356				phys = <&usb0 0>;
1357				phy-names = "usb";
1358			};
1359
1360			usb@2,0 {
1361				reg = <0x1000 0 0 0 0>;
1362				phys = <&usb0 0>;
1363				phy-names = "usb";
1364			};
1365		};
1366
1367		pci1: pci@ee0d0000 {
1368			compatible = "renesas,pci-r8a7745",
1369				     "renesas,pci-rcar-gen2";
1370			device_type = "pci";
1371			reg = <0 0xee0d0000 0 0xc00>,
1372			      <0 0xee0c0000 0 0x1100>;
1373			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1374			clocks = <&cpg CPG_MOD 703>;
1375			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1376			resets = <&cpg 703>;
1377			status = "disabled";
1378
1379			bus-range = <1 1>;
1380			#address-cells = <3>;
1381			#size-cells = <2>;
1382			#interrupt-cells = <1>;
1383			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1384			interrupt-map-mask = <0xf800 0 0 0x7>;
1385			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1386					<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1387					<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1388
1389			usb@1,0 {
1390				reg = <0x10800 0 0 0 0>;
1391				phys = <&usb2 0>;
1392				phy-names = "usb";
1393			};
1394
1395			usb@2,0 {
1396				reg = <0x11000 0 0 0 0>;
1397				phys = <&usb2 0>;
1398				phy-names = "usb";
1399			};
1400		};
1401
1402		sdhi0: mmc@ee100000 {
1403			compatible = "renesas,sdhi-r8a7745",
1404				     "renesas,rcar-gen2-sdhi";
1405			reg = <0 0xee100000 0 0x328>;
1406			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1407			clocks = <&cpg CPG_MOD 314>;
1408			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1409			       <&dmac1 0xcd>, <&dmac1 0xce>;
1410			dma-names = "tx", "rx", "tx", "rx";
1411			max-frequency = <195000000>;
1412			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1413			resets = <&cpg 314>;
1414			status = "disabled";
1415		};
1416
1417		sdhi1: mmc@ee140000 {
1418			compatible = "renesas,sdhi-r8a7745",
1419				     "renesas,rcar-gen2-sdhi";
1420			reg = <0 0xee140000 0 0x100>;
1421			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1422			clocks = <&cpg CPG_MOD 312>;
1423			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1424			       <&dmac1 0xc1>, <&dmac1 0xc2>;
1425			dma-names = "tx", "rx", "tx", "rx";
1426			max-frequency = <97500000>;
1427			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1428			resets = <&cpg 312>;
1429			status = "disabled";
1430		};
1431
1432		sdhi2: mmc@ee160000 {
1433			compatible = "renesas,sdhi-r8a7745",
1434				     "renesas,rcar-gen2-sdhi";
1435			reg = <0 0xee160000 0 0x100>;
1436			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1437			clocks = <&cpg CPG_MOD 311>;
1438			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1439			       <&dmac1 0xd3>, <&dmac1 0xd4>;
1440			dma-names = "tx", "rx", "tx", "rx";
1441			max-frequency = <97500000>;
1442			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1443			resets = <&cpg 311>;
1444			status = "disabled";
1445		};
1446
1447		mmcif0: mmc@ee200000 {
1448			compatible = "renesas,mmcif-r8a7745",
1449				     "renesas,sh-mmcif";
1450			reg = <0 0xee200000 0 0x80>;
1451			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1452			clocks = <&cpg CPG_MOD 315>;
1453			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1454			       <&dmac1 0xd1>, <&dmac1 0xd2>;
1455			dma-names = "tx", "rx", "tx", "rx";
1456			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1457			resets = <&cpg 315>;
1458			reg-io-width = <4>;
1459			max-frequency = <97500000>;
1460			status = "disabled";
1461		};
1462
1463		ether: ethernet@ee700000 {
1464			compatible = "renesas,ether-r8a7745",
1465				     "renesas,rcar-gen2-ether";
1466			reg = <0 0xee700000 0 0x400>;
1467			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1468			clocks = <&cpg CPG_MOD 813>;
1469			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1470			resets = <&cpg 813>;
1471			phy-mode = "rmii";
1472			#address-cells = <1>;
1473			#size-cells = <0>;
1474			status = "disabled";
1475		};
1476
1477		gic: interrupt-controller@f1001000 {
1478			compatible = "arm,gic-400";
1479			#interrupt-cells = <3>;
1480			#address-cells = <0>;
1481			interrupt-controller;
1482			reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1483			      <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1484			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1485			clocks = <&cpg CPG_MOD 408>;
1486			clock-names = "clk";
1487			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1488			resets = <&cpg 408>;
1489		};
1490
1491		vsp@fe928000 {
1492			compatible = "renesas,vsp1";
1493			reg = <0 0xfe928000 0 0x8000>;
1494			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1495			clocks = <&cpg CPG_MOD 131>;
1496			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1497			resets = <&cpg 131>;
1498		};
1499
1500		vsp@fe930000 {
1501			compatible = "renesas,vsp1";
1502			reg = <0 0xfe930000 0 0x8000>;
1503			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1504			clocks = <&cpg CPG_MOD 128>;
1505			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1506			resets = <&cpg 128>;
1507		};
1508
1509		du: display@feb00000 {
1510			compatible = "renesas,du-r8a7745";
1511			reg = <0 0xfeb00000 0 0x40000>;
1512			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1513				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1514			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1515			clock-names = "du.0", "du.1";
1516			resets = <&cpg 724>;
1517			reset-names = "du.0";
1518			status = "disabled";
1519
1520			ports {
1521				#address-cells = <1>;
1522				#size-cells = <0>;
1523
1524				port@0 {
1525					reg = <0>;
1526					du_out_rgb0: endpoint {
1527					};
1528				};
1529				port@1 {
1530					reg = <1>;
1531					du_out_rgb1: endpoint {
1532					};
1533				};
1534			};
1535		};
1536
1537		prr: chipid@ff000044 {
1538			compatible = "renesas,prr";
1539			reg = <0 0xff000044 0 4>;
1540		};
1541
1542		cmt0: timer@ffca0000 {
1543			compatible = "renesas,r8a7745-cmt0",
1544				     "renesas,rcar-gen2-cmt0";
1545			reg = <0 0xffca0000 0 0x1004>;
1546			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1547				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1548			clocks = <&cpg CPG_MOD 124>;
1549			clock-names = "fck";
1550			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1551			resets = <&cpg 124>;
1552			status = "disabled";
1553		};
1554
1555		cmt1: timer@e6130000 {
1556			compatible = "renesas,r8a7745-cmt1",
1557				     "renesas,rcar-gen2-cmt1";
1558			reg = <0 0xe6130000 0 0x1004>;
1559			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1560				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1561				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1562				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1563				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1564				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1565				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1566				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1567			clocks = <&cpg CPG_MOD 329>;
1568			clock-names = "fck";
1569			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1570			resets = <&cpg 329>;
1571			status = "disabled";
1572		};
1573	};
1574
1575	timer {
1576		compatible = "arm,armv7-timer";
1577		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1578				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1579				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1580				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1581	};
1582
1583	/* External USB clock - can be overridden by the board */
1584	usb_extal_clk: usb_extal {
1585		compatible = "fixed-clock";
1586		#clock-cells = <0>;
1587		clock-frequency = <48000000>;
1588	};
1589};
1590