1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*724ba675SRob Herring// 3*724ba675SRob Herring// Copyright 2013 Freescale Semiconductor, Inc. 4*724ba675SRob Herring 5*724ba675SRob Herring#include "vf500.dtsi" 6*724ba675SRob Herring 7*724ba675SRob Herring&a5_cpu { 8*724ba675SRob Herring next-level-cache = <&L2>; 9*724ba675SRob Herring}; 10*724ba675SRob Herring 11*724ba675SRob Herring&aips0 { 12*724ba675SRob Herring L2: cache-controller@40006000 { 13*724ba675SRob Herring compatible = "arm,pl310-cache"; 14*724ba675SRob Herring reg = <0x40006000 0x1000>; 15*724ba675SRob Herring cache-unified; 16*724ba675SRob Herring cache-level = <2>; 17*724ba675SRob Herring arm,data-latency = <3 3 3>; 18*724ba675SRob Herring arm,tag-latency = <2 2 2>; 19*724ba675SRob Herring }; 20*724ba675SRob Herring}; 21