1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 OR X11 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) 2016 Amarula Solutions B.V. 4*724ba675SRob Herring * Copyright (C) 2016 Engicam S.r.l. 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring/dts-v1/; 8*724ba675SRob Herring 9*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 10*724ba675SRob Herring#include <dt-bindings/input/input.h> 11*724ba675SRob Herring#include "imx6ul.dtsi" 12*724ba675SRob Herring 13*724ba675SRob Herring/ { 14*724ba675SRob Herring model = "Engicam GEAM6UL Starter Kit"; 15*724ba675SRob Herring compatible = "engicam,imx6ul-geam", "fsl,imx6ul"; 16*724ba675SRob Herring 17*724ba675SRob Herring memory@80000000 { 18*724ba675SRob Herring device_type = "memory"; 19*724ba675SRob Herring reg = <0x80000000 0x08000000>; 20*724ba675SRob Herring }; 21*724ba675SRob Herring 22*724ba675SRob Herring backlight { 23*724ba675SRob Herring compatible = "pwm-backlight"; 24*724ba675SRob Herring pwms = <&pwm8 0 100000>; 25*724ba675SRob Herring brightness-levels = < 0 1 2 3 4 5 6 7 8 9 26*724ba675SRob Herring 10 11 12 13 14 15 16 17 18 19 27*724ba675SRob Herring 20 21 22 23 24 25 26 27 28 29 28*724ba675SRob Herring 30 31 32 33 34 35 36 37 38 39 29*724ba675SRob Herring 40 41 42 43 44 45 46 47 48 49 30*724ba675SRob Herring 50 51 52 53 54 55 56 57 58 59 31*724ba675SRob Herring 60 61 62 63 64 65 66 67 68 69 32*724ba675SRob Herring 70 71 72 73 74 75 76 77 78 79 33*724ba675SRob Herring 80 81 82 83 84 85 86 87 88 89 34*724ba675SRob Herring 90 91 92 93 94 95 96 97 98 99 35*724ba675SRob Herring 100>; 36*724ba675SRob Herring default-brightness-level = <100>; 37*724ba675SRob Herring }; 38*724ba675SRob Herring 39*724ba675SRob Herring chosen { 40*724ba675SRob Herring stdout-path = &uart1; 41*724ba675SRob Herring }; 42*724ba675SRob Herring 43*724ba675SRob Herring reg_1p8v: regulator-1p8v { 44*724ba675SRob Herring compatible = "regulator-fixed"; 45*724ba675SRob Herring regulator-name = "1P8V"; 46*724ba675SRob Herring regulator-min-microvolt = <1800000>; 47*724ba675SRob Herring regulator-max-microvolt = <1800000>; 48*724ba675SRob Herring regulator-always-on; 49*724ba675SRob Herring regulator-boot-on; 50*724ba675SRob Herring }; 51*724ba675SRob Herring 52*724ba675SRob Herring reg_3p3v: regulator-3p3v { 53*724ba675SRob Herring compatible = "regulator-fixed"; 54*724ba675SRob Herring regulator-name = "3P3V"; 55*724ba675SRob Herring regulator-min-microvolt = <3300000>; 56*724ba675SRob Herring regulator-max-microvolt = <3300000>; 57*724ba675SRob Herring regulator-always-on; 58*724ba675SRob Herring regulator-boot-on; 59*724ba675SRob Herring }; 60*724ba675SRob Herring 61*724ba675SRob Herring sound { 62*724ba675SRob Herring compatible = "simple-audio-card"; 63*724ba675SRob Herring simple-audio-card,name = "imx6ul-geam-sgtl5000"; 64*724ba675SRob Herring simple-audio-card,format = "i2s"; 65*724ba675SRob Herring simple-audio-card,bitclock-master = <&dailink_master>; 66*724ba675SRob Herring simple-audio-card,frame-master = <&dailink_master>; 67*724ba675SRob Herring simple-audio-card,widgets = 68*724ba675SRob Herring "Microphone", "Mic Jack", 69*724ba675SRob Herring "Line", "Line In", 70*724ba675SRob Herring "Line", "Line Out", 71*724ba675SRob Herring "Headphone", "Headphone Jack"; 72*724ba675SRob Herring simple-audio-card,routing = 73*724ba675SRob Herring "MIC_IN", "Mic Jack", 74*724ba675SRob Herring "Mic Jack", "Mic Bias", 75*724ba675SRob Herring "Headphone Jack", "HP_OUT"; 76*724ba675SRob Herring 77*724ba675SRob Herring simple-audio-card,cpu { 78*724ba675SRob Herring sound-dai = <&sai2>; 79*724ba675SRob Herring }; 80*724ba675SRob Herring 81*724ba675SRob Herring dailink_master: simple-audio-card,codec { 82*724ba675SRob Herring sound-dai = <&sgtl5000>; 83*724ba675SRob Herring clocks = <&clks IMX6UL_CLK_SAI2>; 84*724ba675SRob Herring }; 85*724ba675SRob Herring }; 86*724ba675SRob Herring}; 87*724ba675SRob Herring 88*724ba675SRob Herring&can1 { 89*724ba675SRob Herring pinctrl-names = "default"; 90*724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan1>; 91*724ba675SRob Herring xceiver-supply = <®_3p3v>; 92*724ba675SRob Herring status = "okay"; 93*724ba675SRob Herring}; 94*724ba675SRob Herring 95*724ba675SRob Herring&can2 { 96*724ba675SRob Herring pinctrl-names = "default"; 97*724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan2>; 98*724ba675SRob Herring xceiver-supply = <®_3p3v>; 99*724ba675SRob Herring status = "okay"; 100*724ba675SRob Herring}; 101*724ba675SRob Herring 102*724ba675SRob Herring&fec1 { 103*724ba675SRob Herring pinctrl-names = "default"; 104*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet1>; 105*724ba675SRob Herring phy-mode = "rmii"; 106*724ba675SRob Herring phy-handle = <ðphy0>; 107*724ba675SRob Herring status = "okay"; 108*724ba675SRob Herring}; 109*724ba675SRob Herring 110*724ba675SRob Herring&fec2 { 111*724ba675SRob Herring pinctrl-names = "default"; 112*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet2>; 113*724ba675SRob Herring phy-mode = "rmii"; 114*724ba675SRob Herring phy-handle = <ðphy1>; 115*724ba675SRob Herring status = "okay"; 116*724ba675SRob Herring 117*724ba675SRob Herring mdio { 118*724ba675SRob Herring #address-cells = <1>; 119*724ba675SRob Herring #size-cells = <0>; 120*724ba675SRob Herring 121*724ba675SRob Herring ethphy0: ethernet-phy@0 { 122*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 123*724ba675SRob Herring reg = <0>; 124*724ba675SRob Herring }; 125*724ba675SRob Herring 126*724ba675SRob Herring ethphy1: ethernet-phy@1 { 127*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 128*724ba675SRob Herring reg = <1>; 129*724ba675SRob Herring }; 130*724ba675SRob Herring }; 131*724ba675SRob Herring}; 132*724ba675SRob Herring 133*724ba675SRob Herring&gpmi { 134*724ba675SRob Herring pinctrl-names = "default"; 135*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpmi_nand>; 136*724ba675SRob Herring nand-on-flash-bbt; 137*724ba675SRob Herring status = "okay"; 138*724ba675SRob Herring}; 139*724ba675SRob Herring 140*724ba675SRob Herring&i2c1 { 141*724ba675SRob Herring clock-frequency = <100000>; 142*724ba675SRob Herring pinctrl-names = "default"; 143*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 144*724ba675SRob Herring status = "okay"; 145*724ba675SRob Herring 146*724ba675SRob Herring sgtl5000: codec@a { 147*724ba675SRob Herring compatible = "fsl,sgtl5000"; 148*724ba675SRob Herring reg = <0x0a>; 149*724ba675SRob Herring #sound-dai-cells = <0>; 150*724ba675SRob Herring clocks = <&clks IMX6UL_CLK_OSC>; 151*724ba675SRob Herring VDDA-supply = <®_3p3v>; 152*724ba675SRob Herring VDDIO-supply = <®_3p3v>; 153*724ba675SRob Herring VDDD-supply = <®_1p8v>; 154*724ba675SRob Herring }; 155*724ba675SRob Herring}; 156*724ba675SRob Herring 157*724ba675SRob Herring&i2c2 { 158*724ba675SRob Herring clock-frequency = <100000>; 159*724ba675SRob Herring pinctrl-names = "default"; 160*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 161*724ba675SRob Herring status = "okay"; 162*724ba675SRob Herring}; 163*724ba675SRob Herring 164*724ba675SRob Herring&lcdif { 165*724ba675SRob Herring pinctrl-names = "default"; 166*724ba675SRob Herring pinctrl-0 = <&pinctrl_lcdif_dat 167*724ba675SRob Herring &pinctrl_lcdif_ctrl>; 168*724ba675SRob Herring display = <&display0>; 169*724ba675SRob Herring status = "okay"; 170*724ba675SRob Herring 171*724ba675SRob Herring display0: display0 { 172*724ba675SRob Herring bits-per-pixel = <16>; 173*724ba675SRob Herring bus-width = <18>; 174*724ba675SRob Herring 175*724ba675SRob Herring display-timings { 176*724ba675SRob Herring native-mode = <&timing0>; 177*724ba675SRob Herring timing0: timing0 { 178*724ba675SRob Herring clock-frequency = <28000000>; 179*724ba675SRob Herring hactive = <800>; 180*724ba675SRob Herring vactive = <480>; 181*724ba675SRob Herring hfront-porch = <30>; 182*724ba675SRob Herring hback-porch = <30>; 183*724ba675SRob Herring hsync-len = <64>; 184*724ba675SRob Herring vback-porch = <5>; 185*724ba675SRob Herring vfront-porch = <5>; 186*724ba675SRob Herring vsync-len = <20>; 187*724ba675SRob Herring hsync-active = <0>; 188*724ba675SRob Herring vsync-active = <0>; 189*724ba675SRob Herring de-active = <1>; 190*724ba675SRob Herring pixelclk-active = <0>; 191*724ba675SRob Herring }; 192*724ba675SRob Herring }; 193*724ba675SRob Herring }; 194*724ba675SRob Herring}; 195*724ba675SRob Herring 196*724ba675SRob Herring&pwm8 { 197*724ba675SRob Herring #pwm-cells = <2>; 198*724ba675SRob Herring pinctrl-names = "default"; 199*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm8>; 200*724ba675SRob Herring status = "okay"; 201*724ba675SRob Herring}; 202*724ba675SRob Herring 203*724ba675SRob Herring&tsc { 204*724ba675SRob Herring pinctrl-names = "default"; 205*724ba675SRob Herring pinctrl-0 = <&pinctrl_tsc>; 206*724ba675SRob Herring xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; 207*724ba675SRob Herring}; 208*724ba675SRob Herring 209*724ba675SRob Herring&sai2 { 210*724ba675SRob Herring pinctrl-names = "default"; 211*724ba675SRob Herring pinctrl-0 = <&pinctrl_sai2>; 212*724ba675SRob Herring status = "okay"; 213*724ba675SRob Herring}; 214*724ba675SRob Herring 215*724ba675SRob Herring&tsc { 216*724ba675SRob Herring measure-delay-time = <0x1ffff>; 217*724ba675SRob Herring pre-charge-time = <0x1fff>; 218*724ba675SRob Herring status = "okay"; 219*724ba675SRob Herring}; 220*724ba675SRob Herring 221*724ba675SRob Herring&uart1 { 222*724ba675SRob Herring pinctrl-names = "default"; 223*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 224*724ba675SRob Herring status = "okay"; 225*724ba675SRob Herring}; 226*724ba675SRob Herring 227*724ba675SRob Herring&uart2 { 228*724ba675SRob Herring pinctrl-names = "default"; 229*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 230*724ba675SRob Herring status = "okay"; 231*724ba675SRob Herring}; 232*724ba675SRob Herring 233*724ba675SRob Herring&usbotg1 { 234*724ba675SRob Herring dr_mode = "peripheral"; 235*724ba675SRob Herring status = "okay"; 236*724ba675SRob Herring}; 237*724ba675SRob Herring 238*724ba675SRob Herring&usbotg2 { 239*724ba675SRob Herring dr_mode = "host"; 240*724ba675SRob Herring status = "okay"; 241*724ba675SRob Herring}; 242*724ba675SRob Herring 243*724ba675SRob Herring&usdhc1 { 244*724ba675SRob Herring pinctrl-names = "default", "state_100mhz", "state_200mhz"; 245*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc1>; 246*724ba675SRob Herring pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 247*724ba675SRob Herring pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 248*724ba675SRob Herring bus-width = <4>; 249*724ba675SRob Herring cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; 250*724ba675SRob Herring no-1-8-v; 251*724ba675SRob Herring status = "okay"; 252*724ba675SRob Herring}; 253*724ba675SRob Herring 254*724ba675SRob Herring&iomuxc { 255*724ba675SRob Herring pinctrl_enet1: enet1grp { 256*724ba675SRob Herring fsl,pins = < 257*724ba675SRob Herring MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 258*724ba675SRob Herring MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 259*724ba675SRob Herring MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 260*724ba675SRob Herring MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 261*724ba675SRob Herring MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 262*724ba675SRob Herring MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 263*724ba675SRob Herring MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 264*724ba675SRob Herring >; 265*724ba675SRob Herring }; 266*724ba675SRob Herring 267*724ba675SRob Herring pinctrl_enet2: enet2grp { 268*724ba675SRob Herring fsl,pins = < 269*724ba675SRob Herring MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 270*724ba675SRob Herring MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 271*724ba675SRob Herring MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 272*724ba675SRob Herring MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */ 273*724ba675SRob Herring MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 274*724ba675SRob Herring MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 275*724ba675SRob Herring MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 276*724ba675SRob Herring MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 277*724ba675SRob Herring MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 278*724ba675SRob Herring MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031 279*724ba675SRob Herring >; 280*724ba675SRob Herring }; 281*724ba675SRob Herring 282*724ba675SRob Herring pinctrl_flexcan1: flexcan1grp { 283*724ba675SRob Herring fsl,pins = < 284*724ba675SRob Herring MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 285*724ba675SRob Herring MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 286*724ba675SRob Herring >; 287*724ba675SRob Herring }; 288*724ba675SRob Herring 289*724ba675SRob Herring pinctrl_flexcan2: flexcan2grp { 290*724ba675SRob Herring fsl,pins = < 291*724ba675SRob Herring MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 292*724ba675SRob Herring MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 293*724ba675SRob Herring >; 294*724ba675SRob Herring }; 295*724ba675SRob Herring 296*724ba675SRob Herring pinctrl_gpmi_nand: gpminandgrp { 297*724ba675SRob Herring fsl,pins = < 298*724ba675SRob Herring MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 299*724ba675SRob Herring MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 300*724ba675SRob Herring MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 301*724ba675SRob Herring MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 302*724ba675SRob Herring MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1 303*724ba675SRob Herring MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 304*724ba675SRob Herring MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 305*724ba675SRob Herring MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 306*724ba675SRob Herring MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 307*724ba675SRob Herring MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 308*724ba675SRob Herring MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 309*724ba675SRob Herring MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 310*724ba675SRob Herring MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 311*724ba675SRob Herring MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 312*724ba675SRob Herring MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 313*724ba675SRob Herring >; 314*724ba675SRob Herring }; 315*724ba675SRob Herring 316*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 317*724ba675SRob Herring fsl,pins = < 318*724ba675SRob Herring MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 319*724ba675SRob Herring MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 320*724ba675SRob Herring >; 321*724ba675SRob Herring }; 322*724ba675SRob Herring 323*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 324*724ba675SRob Herring fsl,pins = < 325*724ba675SRob Herring MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 326*724ba675SRob Herring MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 327*724ba675SRob Herring >; 328*724ba675SRob Herring }; 329*724ba675SRob Herring 330*724ba675SRob Herring pinctrl_lcdif_ctrl: lcdifctrlgrp { 331*724ba675SRob Herring fsl,pins = < 332*724ba675SRob Herring MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 333*724ba675SRob Herring MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 334*724ba675SRob Herring MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 335*724ba675SRob Herring MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 336*724ba675SRob Herring >; 337*724ba675SRob Herring }; 338*724ba675SRob Herring 339*724ba675SRob Herring pinctrl_lcdif_dat: lcdifdatgrp { 340*724ba675SRob Herring fsl,pins = < 341*724ba675SRob Herring MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 342*724ba675SRob Herring MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 343*724ba675SRob Herring MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 344*724ba675SRob Herring MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 345*724ba675SRob Herring MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 346*724ba675SRob Herring MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 347*724ba675SRob Herring MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 348*724ba675SRob Herring MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 349*724ba675SRob Herring MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 350*724ba675SRob Herring MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 351*724ba675SRob Herring MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 352*724ba675SRob Herring MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 353*724ba675SRob Herring MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 354*724ba675SRob Herring MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 355*724ba675SRob Herring MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 356*724ba675SRob Herring MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 357*724ba675SRob Herring MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 358*724ba675SRob Herring MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 359*724ba675SRob Herring >; 360*724ba675SRob Herring }; 361*724ba675SRob Herring 362*724ba675SRob Herring pinctrl_pwm8: pwm8grp { 363*724ba675SRob Herring fsl,pins = < 364*724ba675SRob Herring MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0 365*724ba675SRob Herring >; 366*724ba675SRob Herring }; 367*724ba675SRob Herring 368*724ba675SRob Herring pinctrl_tsc: tscgrp { 369*724ba675SRob Herring fsl,pin = < 370*724ba675SRob Herring MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 371*724ba675SRob Herring MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 372*724ba675SRob Herring MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 373*724ba675SRob Herring MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 374*724ba675SRob Herring >; 375*724ba675SRob Herring }; 376*724ba675SRob Herring 377*724ba675SRob Herring pinctrl_sai2: sai2grp { 378*724ba675SRob Herring fsl,pins = < 379*724ba675SRob Herring MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0 380*724ba675SRob Herring MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031 381*724ba675SRob Herring MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 382*724ba675SRob Herring MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 383*724ba675SRob Herring MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 384*724ba675SRob Herring >; 385*724ba675SRob Herring }; 386*724ba675SRob Herring 387*724ba675SRob Herring pinctrl_uart1: uart1grp { 388*724ba675SRob Herring fsl,pins = < 389*724ba675SRob Herring MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 390*724ba675SRob Herring MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 391*724ba675SRob Herring >; 392*724ba675SRob Herring }; 393*724ba675SRob Herring 394*724ba675SRob Herring pinctrl_uart2: uart2grp { 395*724ba675SRob Herring fsl,pins = < 396*724ba675SRob Herring MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 397*724ba675SRob Herring MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 398*724ba675SRob Herring MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 399*724ba675SRob Herring MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 400*724ba675SRob Herring >; 401*724ba675SRob Herring }; 402*724ba675SRob Herring 403*724ba675SRob Herring pinctrl_usdhc1: usdhc1grp { 404*724ba675SRob Herring fsl,pins = < 405*724ba675SRob Herring MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 406*724ba675SRob Herring MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 407*724ba675SRob Herring MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 408*724ba675SRob Herring MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 409*724ba675SRob Herring MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 410*724ba675SRob Herring MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 411*724ba675SRob Herring >; 412*724ba675SRob Herring }; 413*724ba675SRob Herring 414*724ba675SRob Herring pinctrl_usdhc1_100mhz: usdhc1grp100mhz { 415*724ba675SRob Herring fsl,pins = < 416*724ba675SRob Herring MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 417*724ba675SRob Herring MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 418*724ba675SRob Herring MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 419*724ba675SRob Herring MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 420*724ba675SRob Herring MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 421*724ba675SRob Herring MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 422*724ba675SRob Herring >; 423*724ba675SRob Herring }; 424*724ba675SRob Herring 425*724ba675SRob Herring pinctrl_usdhc1_200mhz: usdhc1grp200mhz { 426*724ba675SRob Herring fsl,pins = < 427*724ba675SRob Herring MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 428*724ba675SRob Herring MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 429*724ba675SRob Herring MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 430*724ba675SRob Herring MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 431*724ba675SRob Herring MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 432*724ba675SRob Herring MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 433*724ba675SRob Herring >; 434*724ba675SRob Herring }; 435*724ba675SRob Herring 436*724ba675SRob Herring pinctrl_usdhc2: usdhc2grp { 437*724ba675SRob Herring fsl,pins = < 438*724ba675SRob Herring MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070 439*724ba675SRob Herring MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070 440*724ba675SRob Herring MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070 441*724ba675SRob Herring MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070 442*724ba675SRob Herring MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070 443*724ba675SRob Herring MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070 444*724ba675SRob Herring >; 445*724ba675SRob Herring }; 446*724ba675SRob Herring}; 447