1// SPDX-License-Identifier: (GPL-2.0) 2/* 3 * Device tree for the Tolino Vision 5 ebook reader 4 * 5 * Name on mainboard is: 37NB-E70K0M+6A3 6 * Serials start with: E70K02 (a number also seen in 7 * vendor kernel sources) 8 * 9 * This mainboard seems to be equipped with different SoCs. 10 * In the Tolino Vision 5 ebook reader it is a i.MX6SL 11 * 12 * Copyright 2021 Andreas Kemnade 13 * based on works 14 * Copyright 2016 Freescale Semiconductor, Inc. 15 */ 16 17/dts-v1/; 18 19#include <dt-bindings/input/input.h> 20#include <dt-bindings/gpio/gpio.h> 21#include "imx6sl.dtsi" 22#include "e70k02.dtsi" 23 24/ { 25 model = "Tolino Vision 5"; 26 compatible = "kobo,tolino-vision5", "fsl,imx6sl"; 27}; 28 29&gpio_keys { 30 pinctrl-names = "default"; 31 pinctrl-0 = <&pinctrl_gpio_keys>; 32}; 33 34&i2c1 { 35 pinctrl-names = "default","sleep"; 36 pinctrl-0 = <&pinctrl_i2c1>; 37 pinctrl-1 = <&pinctrl_i2c1_sleep>; 38}; 39 40&i2c2 { 41 pinctrl-names = "default","sleep"; 42 pinctrl-0 = <&pinctrl_i2c2>; 43 pinctrl-1 = <&pinctrl_i2c2_sleep>; 44}; 45 46&i2c3 { 47 pinctrl-names = "default"; 48 pinctrl-0 = <&pinctrl_i2c3>; 49}; 50 51&iomuxc { 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_hog>; 54 55 pinctrl_cyttsp5_gpio: cyttsp5-gpiogrp { 56 fsl,pins = < 57 MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x17059 /* TP_INT */ 58 MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x10059 /* TP_RST */ 59 >; 60 }; 61 62 pinctrl_gpio_keys: gpio-keysgrp { 63 fsl,pins = < 64 MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x17059 /* PWR_SW */ 65 MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x17059 /* HALL_EN */ 66 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x17059 /* PAGE_UP */ 67 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x17059 /* PAGE_DOWN */ 68 >; 69 }; 70 71 pinctrl_hog: hoggrp { 72 fsl,pins = < 73 MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x79 74 MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x79 75 MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x79 76 MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x79 77 MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x79 78 MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x79 79 MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x79 80 MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79 81 MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79 82 MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79 83 MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79 84 MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79 85 MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79 86 MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79 87 MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79 88 MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79 89 MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79 90 MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79 91 MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79 92 MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79 93 MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79 94 MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x79 95 MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x79 96 MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79 97 MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79 98 MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79 99 MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x79 100 MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x79 101 MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x79 102 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x79 103 MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x79 104 >; 105 }; 106 107 pinctrl_i2c1: i2c1grp { 108 fsl,pins = < 109 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1 110 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1 111 >; 112 }; 113 114 pinctrl_i2c1_sleep: i2c1grp-sleep { 115 fsl,pins = < 116 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1 117 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1 118 >; 119 }; 120 121 pinctrl_i2c2: i2c2grp { 122 fsl,pins = < 123 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1 124 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1 125 >; 126 }; 127 128 pinctrl_i2c2_sleep: i2c2grp-sleep { 129 fsl,pins = < 130 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1 131 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1 132 >; 133 }; 134 135 pinctrl_i2c3: i2c3grp { 136 fsl,pins = < 137 MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1 138 MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1 139 >; 140 }; 141 142 pinctrl_led: ledgrp { 143 fsl,pins = < 144 MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x10059 145 >; 146 }; 147 148 pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp { 149 fsl,pins = < 150 MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x10059 /* HWEN */ 151 >; 152 }; 153 154 pinctrl_ricoh_gpio: ricoh-gpiogrp { 155 fsl,pins = < 156 MX6SL_PAD_FEC_MDIO__GPIO4_IO20 0x1b8b1 /* ricoh619 chg */ 157 MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b8b1 /* ricoh619 irq */ 158 MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */ 159 >; 160 }; 161 162 pinctrl_uart1: uart1grp { 163 fsl,pins = < 164 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 165 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 166 >; 167 }; 168 169 pinctrl_usbotg1: usbotg1grp { 170 fsl,pins = < 171 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 172 >; 173 }; 174 175 pinctrl_usdhc1: usdhc1grp { 176 fsl,pins = < 177 MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059 178 MX6SL_PAD_SD1_CLK__SD1_CLK 0x17059 179 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059 180 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059 181 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059 182 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059 183 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059 184 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059 185 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059 186 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 187 >; 188 }; 189 190 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 191 fsl,pins = < 192 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9 193 MX6SL_PAD_SD1_CLK__SD1_CLK 0x170b9 194 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9 195 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9 196 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9 197 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9 198 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9 199 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9 200 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9 201 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9 202 >; 203 }; 204 205 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 206 fsl,pins = < 207 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9 208 MX6SL_PAD_SD1_CLK__SD1_CLK 0x170f9 209 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 210 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 211 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 212 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 213 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9 214 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9 215 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9 216 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9 217 >; 218 }; 219 220 pinctrl_usdhc1_sleep: usdhc1-sleepgrp { 221 fsl,pins = < 222 MX6SL_PAD_SD1_CMD__SD1_CMD 0x10059 223 MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059 224 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x10059 225 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x10059 226 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x10059 227 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x10059 228 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x10059 229 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x10059 230 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x10059 231 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x10059 232 >; 233 }; 234 235 pinctrl_usdhc3: usdhc3grp { 236 fsl,pins = < 237 MX6SL_PAD_SD3_CMD__SD3_CMD 0x11059 238 MX6SL_PAD_SD3_CLK__SD3_CLK 0x11059 239 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x11059 240 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x11059 241 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x11059 242 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x11059 243 >; 244 }; 245 246 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 247 fsl,pins = < 248 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 249 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170b9 250 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 251 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 252 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 253 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 254 >; 255 }; 256 257 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 258 fsl,pins = < 259 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 260 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170f9 261 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 262 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 263 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 264 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 265 >; 266 }; 267 268 pinctrl_usdhc3_sleep: usdhc3-sleepgrp { 269 fsl,pins = < 270 MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x100c1 271 MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x100c1 272 MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x100c1 273 MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x100c1 274 MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x100c1 275 MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x100c1 276 >; 277 }; 278 279 pinctrl_wifi_power: wifi-powergrp { 280 fsl,pins = < 281 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */ 282 >; 283 }; 284 285 pinctrl_wifi_reset: wifi-resetgrp { 286 fsl,pins = < 287 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x10059 /* WIFI_RST */ 288 >; 289 }; 290}; 291 292&leds { 293 pinctrl-names = "default"; 294 pinctrl-0 = <&pinctrl_led>; 295}; 296 297&lm3630a { 298 pinctrl-names = "default"; 299 pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>; 300}; 301 302®_wifi { 303 pinctrl-names = "default"; 304 pinctrl-0 = <&pinctrl_wifi_power>; 305}; 306 307®_vdd1p1 { 308 vin-supply = <&dcdc2_reg>; 309}; 310 311®_vdd2p5 { 312 vin-supply = <&dcdc2_reg>; 313}; 314 315®_arm { 316 vin-supply = <&dcdc3_reg>; 317}; 318 319®_soc { 320 vin-supply = <&dcdc1_reg>; 321}; 322 323®_pu { 324 vin-supply = <&dcdc1_reg>; 325}; 326 327&ricoh619 { 328 pinctrl-names = "default"; 329 pinctrl-0 = <&pinctrl_ricoh_gpio>; 330}; 331 332&uart1 { 333 pinctrl-names = "default"; 334 pinctrl-0 = <&pinctrl_uart1>; 335}; 336 337&usdhc1 { 338 pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep"; 339 pinctrl-0 = <&pinctrl_usdhc1>; 340 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 341 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 342 pinctrl-3 = <&pinctrl_usdhc1_sleep>; 343}; 344 345&usdhc3 { 346 pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep"; 347 pinctrl-0 = <&pinctrl_usdhc3>; 348 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 349 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 350 pinctrl-3 = <&pinctrl_usdhc3_sleep>; 351}; 352 353&wifi_pwrseq { 354 pinctrl-names = "default"; 355 pinctrl-0 = <&pinctrl_wifi_reset>; 356}; 357