1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright 2013 Gateworks Corporation 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 7724ba675SRob Herring#include <dt-bindings/input/linux-event-codes.h> 8724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 9724ba675SRob Herring 10724ba675SRob Herring/ { 11724ba675SRob Herring /* these are used by bootloader for disabling nodes */ 12724ba675SRob Herring aliases { 13724ba675SRob Herring led0 = &led0; 14724ba675SRob Herring led1 = &led1; 15724ba675SRob Herring led2 = &led2; 16724ba675SRob Herring nand = &gpmi; 17724ba675SRob Herring ssi0 = &ssi1; 18724ba675SRob Herring usb0 = &usbh1; 19724ba675SRob Herring usb1 = &usbotg; 20724ba675SRob Herring }; 21724ba675SRob Herring 22724ba675SRob Herring chosen { 23724ba675SRob Herring bootargs = "console=ttymxc1,115200"; 24724ba675SRob Herring }; 25724ba675SRob Herring 26724ba675SRob Herring backlight { 27724ba675SRob Herring compatible = "pwm-backlight"; 28724ba675SRob Herring pwms = <&pwm4 0 5000000>; 29724ba675SRob Herring brightness-levels = <0 4 8 16 32 64 128 255>; 30724ba675SRob Herring default-brightness-level = <7>; 31724ba675SRob Herring }; 32724ba675SRob Herring 33724ba675SRob Herring gpio-keys { 34724ba675SRob Herring compatible = "gpio-keys"; 35724ba675SRob Herring 36724ba675SRob Herring user-pb { 37724ba675SRob Herring label = "user_pb"; 38724ba675SRob Herring gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; 39724ba675SRob Herring linux,code = <BTN_0>; 40724ba675SRob Herring }; 41724ba675SRob Herring 42724ba675SRob Herring user-pb1x { 43724ba675SRob Herring label = "user_pb1x"; 44724ba675SRob Herring linux,code = <BTN_1>; 45724ba675SRob Herring interrupt-parent = <&gsc>; 46724ba675SRob Herring interrupts = <0>; 47724ba675SRob Herring }; 48724ba675SRob Herring 49724ba675SRob Herring key-erased { 50724ba675SRob Herring label = "key-erased"; 51724ba675SRob Herring linux,code = <BTN_2>; 52724ba675SRob Herring interrupt-parent = <&gsc>; 53724ba675SRob Herring interrupts = <1>; 54724ba675SRob Herring }; 55724ba675SRob Herring 56724ba675SRob Herring eeprom-wp { 57724ba675SRob Herring label = "eeprom_wp"; 58724ba675SRob Herring linux,code = <BTN_3>; 59724ba675SRob Herring interrupt-parent = <&gsc>; 60724ba675SRob Herring interrupts = <2>; 61724ba675SRob Herring }; 62724ba675SRob Herring 63724ba675SRob Herring tamper { 64724ba675SRob Herring label = "tamper"; 65724ba675SRob Herring linux,code = <BTN_4>; 66724ba675SRob Herring interrupt-parent = <&gsc>; 67724ba675SRob Herring interrupts = <5>; 68724ba675SRob Herring }; 69724ba675SRob Herring 70724ba675SRob Herring switch-hold { 71724ba675SRob Herring label = "switch_hold"; 72724ba675SRob Herring linux,code = <BTN_5>; 73724ba675SRob Herring interrupt-parent = <&gsc>; 74724ba675SRob Herring interrupts = <7>; 75724ba675SRob Herring }; 76724ba675SRob Herring }; 77724ba675SRob Herring 78724ba675SRob Herring leds { 79724ba675SRob Herring compatible = "gpio-leds"; 80724ba675SRob Herring pinctrl-names = "default"; 81724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_leds>; 82724ba675SRob Herring 83724ba675SRob Herring led0: led-user1 { 84724ba675SRob Herring label = "user1"; 85724ba675SRob Herring gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 86724ba675SRob Herring default-state = "on"; 87724ba675SRob Herring linux,default-trigger = "heartbeat"; 88724ba675SRob Herring }; 89724ba675SRob Herring 90724ba675SRob Herring led1: led-user2 { 91724ba675SRob Herring label = "user2"; 92724ba675SRob Herring gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 93724ba675SRob Herring default-state = "off"; 94724ba675SRob Herring }; 95724ba675SRob Herring 96724ba675SRob Herring led2: led-user3 { 97724ba675SRob Herring label = "user3"; 98724ba675SRob Herring gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ 99724ba675SRob Herring default-state = "off"; 100724ba675SRob Herring }; 101724ba675SRob Herring }; 102724ba675SRob Herring 103724ba675SRob Herring memory@10000000 { 104724ba675SRob Herring device_type = "memory"; 105724ba675SRob Herring reg = <0x10000000 0x20000000>; 106724ba675SRob Herring }; 107724ba675SRob Herring 108724ba675SRob Herring pps { 109724ba675SRob Herring compatible = "pps-gpio"; 110724ba675SRob Herring pinctrl-names = "default"; 111724ba675SRob Herring pinctrl-0 = <&pinctrl_pps>; 112724ba675SRob Herring gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 113724ba675SRob Herring status = "okay"; 114724ba675SRob Herring }; 115724ba675SRob Herring 116724ba675SRob Herring reg_1p0v: regulator-1p0v { 117724ba675SRob Herring compatible = "regulator-fixed"; 118724ba675SRob Herring regulator-name = "1P0V"; 119724ba675SRob Herring regulator-min-microvolt = <1000000>; 120724ba675SRob Herring regulator-max-microvolt = <1000000>; 121724ba675SRob Herring regulator-always-on; 122724ba675SRob Herring }; 123724ba675SRob Herring 124724ba675SRob Herring reg_3p3v: regulator-3p3v { 125724ba675SRob Herring compatible = "regulator-fixed"; 126724ba675SRob Herring regulator-name = "3P3V"; 127724ba675SRob Herring regulator-min-microvolt = <3300000>; 128724ba675SRob Herring regulator-max-microvolt = <3300000>; 129724ba675SRob Herring regulator-always-on; 130724ba675SRob Herring }; 131724ba675SRob Herring 132724ba675SRob Herring reg_5p0v: regulator-5p0v { 133724ba675SRob Herring compatible = "regulator-fixed"; 134724ba675SRob Herring regulator-name = "5P0V"; 135724ba675SRob Herring regulator-min-microvolt = <5000000>; 136724ba675SRob Herring regulator-max-microvolt = <5000000>; 137724ba675SRob Herring regulator-always-on; 138724ba675SRob Herring }; 139724ba675SRob Herring 140724ba675SRob Herring reg_can1_stby: regulator-can1-stby { 141724ba675SRob Herring compatible = "regulator-fixed"; 142724ba675SRob Herring pinctrl-names = "default"; 143724ba675SRob Herring pinctrl-0 = <&pinctrl_reg_can1>; 144724ba675SRob Herring regulator-name = "can1_stby"; 145724ba675SRob Herring gpio = <&gpio1 9 GPIO_ACTIVE_LOW>; 146724ba675SRob Herring regulator-min-microvolt = <3300000>; 147724ba675SRob Herring regulator-max-microvolt = <3300000>; 148724ba675SRob Herring }; 149724ba675SRob Herring 150724ba675SRob Herring reg_usb_otg_vbus: regulator-usb-otg-vbus { 151724ba675SRob Herring compatible = "regulator-fixed"; 152724ba675SRob Herring regulator-name = "usb_otg_vbus"; 153724ba675SRob Herring regulator-min-microvolt = <5000000>; 154724ba675SRob Herring regulator-max-microvolt = <5000000>; 155724ba675SRob Herring gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 156724ba675SRob Herring enable-active-high; 157724ba675SRob Herring }; 158724ba675SRob Herring 159724ba675SRob Herring sound { 160724ba675SRob Herring compatible = "fsl,imx6q-ventana-sgtl5000", 161724ba675SRob Herring "fsl,imx-audio-sgtl5000"; 162724ba675SRob Herring model = "sgtl5000-audio"; 163724ba675SRob Herring ssi-controller = <&ssi1>; 164724ba675SRob Herring audio-codec = <&codec>; 165724ba675SRob Herring audio-routing = 166724ba675SRob Herring "MIC_IN", "Mic Jack", 167724ba675SRob Herring "Mic Jack", "Mic Bias", 168724ba675SRob Herring "Headphone Jack", "HP_OUT"; 169724ba675SRob Herring mux-int-port = <1>; 170724ba675SRob Herring mux-ext-port = <4>; 171724ba675SRob Herring }; 172724ba675SRob Herring}; 173724ba675SRob Herring 174724ba675SRob Herring&audmux { 175724ba675SRob Herring pinctrl-names = "default"; 176724ba675SRob Herring pinctrl-0 = <&pinctrl_audmux>; 177724ba675SRob Herring status = "okay"; 178724ba675SRob Herring}; 179724ba675SRob Herring 180724ba675SRob Herring&can1 { 181724ba675SRob Herring pinctrl-names = "default"; 182724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan1>; 183724ba675SRob Herring xceiver-supply = <®_can1_stby>; 184724ba675SRob Herring status = "okay"; 185724ba675SRob Herring}; 186724ba675SRob Herring 187724ba675SRob Herring&clks { 188724ba675SRob Herring assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 189724ba675SRob Herring <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 190724ba675SRob Herring assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 191724ba675SRob Herring <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 192724ba675SRob Herring}; 193724ba675SRob Herring 194724ba675SRob Herring&ecspi3 { 195724ba675SRob Herring cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 196724ba675SRob Herring pinctrl-names = "default"; 197724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi3>; 198724ba675SRob Herring status = "okay"; 199724ba675SRob Herring}; 200724ba675SRob Herring 201724ba675SRob Herring&fec { 202724ba675SRob Herring pinctrl-names = "default"; 203724ba675SRob Herring pinctrl-0 = <&pinctrl_enet>; 204724ba675SRob Herring phy-mode = "rgmii-id"; 205724ba675SRob Herring phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; 206724ba675SRob Herring status = "okay"; 207724ba675SRob Herring}; 208724ba675SRob Herring 209724ba675SRob Herring&gpmi { 210724ba675SRob Herring pinctrl-names = "default"; 211724ba675SRob Herring pinctrl-0 = <&pinctrl_gpmi_nand>; 212724ba675SRob Herring status = "okay"; 213724ba675SRob Herring}; 214724ba675SRob Herring 215724ba675SRob Herring&hdmi { 216724ba675SRob Herring ddc-i2c-bus = <&i2c3>; 217724ba675SRob Herring status = "okay"; 218724ba675SRob Herring}; 219724ba675SRob Herring 220724ba675SRob Herring&i2c1 { 221724ba675SRob Herring clock-frequency = <100000>; 222724ba675SRob Herring pinctrl-names = "default"; 223724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 224724ba675SRob Herring status = "okay"; 225724ba675SRob Herring 226724ba675SRob Herring gsc: gsc@20 { 227724ba675SRob Herring compatible = "gw,gsc"; 228724ba675SRob Herring reg = <0x20>; 229724ba675SRob Herring interrupt-parent = <&gpio1>; 230724ba675SRob Herring interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 231724ba675SRob Herring interrupt-controller; 232724ba675SRob Herring #interrupt-cells = <1>; 233724ba675SRob Herring #size-cells = <0>; 234724ba675SRob Herring 235724ba675SRob Herring adc { 236724ba675SRob Herring compatible = "gw,gsc-adc"; 237724ba675SRob Herring #address-cells = <1>; 238724ba675SRob Herring #size-cells = <0>; 239724ba675SRob Herring 240724ba675SRob Herring channel@0 { 241724ba675SRob Herring gw,mode = <0>; 242724ba675SRob Herring reg = <0x00>; 243724ba675SRob Herring label = "temp"; 244724ba675SRob Herring }; 245724ba675SRob Herring 246724ba675SRob Herring channel@2 { 247724ba675SRob Herring gw,mode = <1>; 248724ba675SRob Herring reg = <0x02>; 249724ba675SRob Herring label = "vdd_vin"; 250724ba675SRob Herring }; 251724ba675SRob Herring 252724ba675SRob Herring channel@5 { 253724ba675SRob Herring gw,mode = <1>; 254724ba675SRob Herring reg = <0x05>; 255724ba675SRob Herring label = "vdd_3p3"; 256724ba675SRob Herring }; 257724ba675SRob Herring 258724ba675SRob Herring channel@8 { 259724ba675SRob Herring gw,mode = <1>; 260724ba675SRob Herring reg = <0x08>; 261724ba675SRob Herring label = "vdd_bat"; 262724ba675SRob Herring }; 263724ba675SRob Herring 264724ba675SRob Herring channel@b { 265724ba675SRob Herring gw,mode = <1>; 266724ba675SRob Herring reg = <0x0b>; 267724ba675SRob Herring label = "vdd_5p0"; 268724ba675SRob Herring }; 269724ba675SRob Herring 270724ba675SRob Herring channel@e { 271724ba675SRob Herring gw,mode = <1>; 272724ba675SRob Herring reg = <0xe>; 273724ba675SRob Herring label = "vdd_arm"; 274724ba675SRob Herring }; 275724ba675SRob Herring 276724ba675SRob Herring channel@11 { 277724ba675SRob Herring gw,mode = <1>; 278724ba675SRob Herring reg = <0x11>; 279724ba675SRob Herring label = "vdd_soc"; 280724ba675SRob Herring }; 281724ba675SRob Herring 282724ba675SRob Herring channel@14 { 283724ba675SRob Herring gw,mode = <1>; 284724ba675SRob Herring reg = <0x14>; 285724ba675SRob Herring label = "vdd_3p0"; 286724ba675SRob Herring }; 287724ba675SRob Herring 288724ba675SRob Herring channel@17 { 289724ba675SRob Herring gw,mode = <1>; 290724ba675SRob Herring reg = <0x17>; 291724ba675SRob Herring label = "vdd_1p5"; 292724ba675SRob Herring }; 293724ba675SRob Herring 294724ba675SRob Herring channel@1d { 295724ba675SRob Herring gw,mode = <1>; 296724ba675SRob Herring reg = <0x1d>; 297724ba675SRob Herring label = "vdd_1p8"; 298724ba675SRob Herring }; 299724ba675SRob Herring 300724ba675SRob Herring channel@20 { 301724ba675SRob Herring gw,mode = <1>; 302724ba675SRob Herring reg = <0x20>; 303724ba675SRob Herring label = "vdd_1p0"; 304724ba675SRob Herring }; 305724ba675SRob Herring 306724ba675SRob Herring channel@23 { 307724ba675SRob Herring gw,mode = <1>; 308724ba675SRob Herring reg = <0x23>; 309724ba675SRob Herring label = "vdd_2p5"; 310724ba675SRob Herring }; 311724ba675SRob Herring 312724ba675SRob Herring channel@29 { 313724ba675SRob Herring gw,mode = <1>; 314724ba675SRob Herring reg = <0x29>; 315724ba675SRob Herring label = "vdd_an1"; 316724ba675SRob Herring }; 317724ba675SRob Herring }; 318724ba675SRob Herring }; 319724ba675SRob Herring 320724ba675SRob Herring gsc_gpio: gpio@23 { 321724ba675SRob Herring compatible = "nxp,pca9555"; 322724ba675SRob Herring reg = <0x23>; 323724ba675SRob Herring gpio-controller; 324724ba675SRob Herring #gpio-cells = <2>; 325724ba675SRob Herring interrupt-parent = <&gsc>; 326724ba675SRob Herring interrupts = <4>; 327724ba675SRob Herring }; 328724ba675SRob Herring 329724ba675SRob Herring eeprom1: eeprom@50 { 330724ba675SRob Herring compatible = "atmel,24c02"; 331724ba675SRob Herring reg = <0x50>; 332724ba675SRob Herring pagesize = <16>; 333724ba675SRob Herring }; 334724ba675SRob Herring 335724ba675SRob Herring eeprom2: eeprom@51 { 336724ba675SRob Herring compatible = "atmel,24c02"; 337724ba675SRob Herring reg = <0x51>; 338724ba675SRob Herring pagesize = <16>; 339724ba675SRob Herring }; 340724ba675SRob Herring 341724ba675SRob Herring eeprom3: eeprom@52 { 342724ba675SRob Herring compatible = "atmel,24c02"; 343724ba675SRob Herring reg = <0x52>; 344724ba675SRob Herring pagesize = <16>; 345724ba675SRob Herring }; 346724ba675SRob Herring 347724ba675SRob Herring eeprom4: eeprom@53 { 348724ba675SRob Herring compatible = "atmel,24c02"; 349724ba675SRob Herring reg = <0x53>; 350724ba675SRob Herring pagesize = <16>; 351724ba675SRob Herring }; 352724ba675SRob Herring 353724ba675SRob Herring rtc: ds1672@68 { 354724ba675SRob Herring compatible = "dallas,ds1672"; 355724ba675SRob Herring reg = <0x68>; 356724ba675SRob Herring }; 357724ba675SRob Herring}; 358724ba675SRob Herring 359724ba675SRob Herring&i2c2 { 360724ba675SRob Herring clock-frequency = <100000>; 361724ba675SRob Herring pinctrl-names = "default"; 362724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 363724ba675SRob Herring status = "okay"; 364724ba675SRob Herring 365724ba675SRob Herring ltc3676: pmic@3c { 366724ba675SRob Herring compatible = "lltc,ltc3676"; 367724ba675SRob Herring reg = <0x3c>; 368724ba675SRob Herring pinctrl-names = "default"; 369724ba675SRob Herring pinctrl-0 = <&pinctrl_pmic>; 370724ba675SRob Herring interrupt-parent = <&gpio1>; 371724ba675SRob Herring interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 372724ba675SRob Herring 373724ba675SRob Herring regulators { 374724ba675SRob Herring /* VDD_SOC (1+R1/R2 = 1.635) */ 375724ba675SRob Herring reg_vdd_soc: sw1 { 376724ba675SRob Herring regulator-name = "vddsoc"; 377724ba675SRob Herring regulator-min-microvolt = <674400>; 378724ba675SRob Herring regulator-max-microvolt = <1308000>; 379724ba675SRob Herring lltc,fb-voltage-divider = <127000 200000>; 380724ba675SRob Herring regulator-ramp-delay = <7000>; 381724ba675SRob Herring regulator-boot-on; 382724ba675SRob Herring regulator-always-on; 383724ba675SRob Herring }; 384724ba675SRob Herring 385724ba675SRob Herring /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */ 386724ba675SRob Herring reg_1p8v: sw2 { 387724ba675SRob Herring regulator-name = "vdd1p8"; 388724ba675SRob Herring regulator-min-microvolt = <1033310>; 389724ba675SRob Herring regulator-max-microvolt = <2004000>; 390724ba675SRob Herring lltc,fb-voltage-divider = <301000 200000>; 391724ba675SRob Herring regulator-ramp-delay = <7000>; 392724ba675SRob Herring regulator-boot-on; 393724ba675SRob Herring regulator-always-on; 394724ba675SRob Herring }; 395724ba675SRob Herring 396724ba675SRob Herring /* VDD_ARM (1+R1/R2 = 1.635) */ 397724ba675SRob Herring reg_vdd_arm: sw3 { 398724ba675SRob Herring regulator-name = "vddarm"; 399724ba675SRob Herring regulator-min-microvolt = <674400>; 400724ba675SRob Herring regulator-max-microvolt = <1308000>; 401724ba675SRob Herring lltc,fb-voltage-divider = <127000 200000>; 402724ba675SRob Herring regulator-ramp-delay = <7000>; 403724ba675SRob Herring regulator-boot-on; 404724ba675SRob Herring regulator-always-on; 405724ba675SRob Herring }; 406724ba675SRob Herring 407724ba675SRob Herring /* VDD_DDR (1+R1/R2 = 2.105) */ 408724ba675SRob Herring reg_vdd_ddr: sw4 { 409724ba675SRob Herring regulator-name = "vddddr"; 410724ba675SRob Herring regulator-min-microvolt = <868310>; 411724ba675SRob Herring regulator-max-microvolt = <1684000>; 412724ba675SRob Herring lltc,fb-voltage-divider = <221000 200000>; 413724ba675SRob Herring regulator-ramp-delay = <7000>; 414724ba675SRob Herring regulator-boot-on; 415724ba675SRob Herring regulator-always-on; 416724ba675SRob Herring }; 417724ba675SRob Herring 418724ba675SRob Herring /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */ 419724ba675SRob Herring reg_2p5v: ldo2 { 420724ba675SRob Herring regulator-name = "vdd2p5"; 421724ba675SRob Herring regulator-min-microvolt = <2490375>; 422724ba675SRob Herring regulator-max-microvolt = <2490375>; 423724ba675SRob Herring lltc,fb-voltage-divider = <487000 200000>; 424724ba675SRob Herring regulator-boot-on; 425724ba675SRob Herring regulator-always-on; 426724ba675SRob Herring }; 427724ba675SRob Herring 428724ba675SRob Herring /* VDD_AUD_1P8: Audio codec */ 429724ba675SRob Herring reg_aud_1p8v: ldo3 { 430724ba675SRob Herring regulator-name = "vdd1p8a"; 431724ba675SRob Herring regulator-min-microvolt = <1800000>; 432724ba675SRob Herring regulator-max-microvolt = <1800000>; 433724ba675SRob Herring regulator-boot-on; 434724ba675SRob Herring }; 435724ba675SRob Herring 436724ba675SRob Herring /* VDD_HIGH (1+R1/R2 = 4.17) */ 437724ba675SRob Herring reg_3p0v: ldo4 { 438724ba675SRob Herring regulator-name = "vdd3p0"; 439724ba675SRob Herring regulator-min-microvolt = <3023250>; 440724ba675SRob Herring regulator-max-microvolt = <3023250>; 441724ba675SRob Herring lltc,fb-voltage-divider = <634000 200000>; 442724ba675SRob Herring regulator-boot-on; 443724ba675SRob Herring regulator-always-on; 444724ba675SRob Herring }; 445724ba675SRob Herring }; 446724ba675SRob Herring }; 447724ba675SRob Herring}; 448724ba675SRob Herring 449724ba675SRob Herring&i2c3 { 450724ba675SRob Herring clock-frequency = <100000>; 451724ba675SRob Herring pinctrl-names = "default"; 452724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c3>; 453724ba675SRob Herring status = "okay"; 454724ba675SRob Herring 455724ba675SRob Herring codec: sgtl5000@a { 456724ba675SRob Herring compatible = "fsl,sgtl5000"; 457724ba675SRob Herring reg = <0x0a>; 458*d54bcc3aSFabio Estevam #sound-dai-cells = <0>; 459724ba675SRob Herring clocks = <&clks IMX6QDL_CLK_CKO>; 460724ba675SRob Herring VDDA-supply = <®_1p8v>; 461724ba675SRob Herring VDDIO-supply = <®_3p3v>; 462724ba675SRob Herring }; 463724ba675SRob Herring 464724ba675SRob Herring touchscreen: egalax_ts@4 { 465724ba675SRob Herring compatible = "eeti,egalax_ts"; 466724ba675SRob Herring reg = <0x04>; 467724ba675SRob Herring interrupt-parent = <&gpio7>; 468724ba675SRob Herring interrupts = <12 2>; 469724ba675SRob Herring wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; 470724ba675SRob Herring }; 471724ba675SRob Herring 472724ba675SRob Herring accel@1e { 473724ba675SRob Herring compatible = "nxp,fxos8700"; 474724ba675SRob Herring reg = <0x1e>; 475724ba675SRob Herring }; 476724ba675SRob Herring}; 477724ba675SRob Herring 478724ba675SRob Herring&ldb { 479724ba675SRob Herring status = "okay"; 480724ba675SRob Herring 481724ba675SRob Herring lvds-channel@0 { 482724ba675SRob Herring fsl,data-mapping = "spwg"; 483724ba675SRob Herring fsl,data-width = <18>; 484724ba675SRob Herring status = "okay"; 485724ba675SRob Herring 486724ba675SRob Herring display-timings { 487724ba675SRob Herring native-mode = <&timing0>; 488724ba675SRob Herring timing0: hsd100pxn1 { 489724ba675SRob Herring clock-frequency = <65000000>; 490724ba675SRob Herring hactive = <1024>; 491724ba675SRob Herring vactive = <768>; 492724ba675SRob Herring hback-porch = <220>; 493724ba675SRob Herring hfront-porch = <40>; 494724ba675SRob Herring vback-porch = <21>; 495724ba675SRob Herring vfront-porch = <7>; 496724ba675SRob Herring hsync-len = <60>; 497724ba675SRob Herring vsync-len = <10>; 498724ba675SRob Herring }; 499724ba675SRob Herring }; 500724ba675SRob Herring }; 501724ba675SRob Herring}; 502724ba675SRob Herring 503724ba675SRob Herring&pcie { 504724ba675SRob Herring pinctrl-names = "default"; 505724ba675SRob Herring pinctrl-0 = <&pinctrl_pcie>; 506724ba675SRob Herring reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; 507724ba675SRob Herring status = "okay"; 508724ba675SRob Herring}; 509724ba675SRob Herring 510724ba675SRob Herring&pwm2 { 511724ba675SRob Herring pinctrl-names = "default"; 512724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 513724ba675SRob Herring status = "disabled"; 514724ba675SRob Herring}; 515724ba675SRob Herring 516724ba675SRob Herring&pwm3 { 517724ba675SRob Herring pinctrl-names = "default"; 518724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 519724ba675SRob Herring status = "disabled"; 520724ba675SRob Herring}; 521724ba675SRob Herring 522724ba675SRob Herring&pwm4 { 523724ba675SRob Herring #pwm-cells = <2>; 524724ba675SRob Herring pinctrl-names = "default"; 525724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm4>; 526724ba675SRob Herring status = "okay"; 527724ba675SRob Herring}; 528724ba675SRob Herring 529724ba675SRob Herring&ssi1 { 530724ba675SRob Herring status = "okay"; 531724ba675SRob Herring}; 532724ba675SRob Herring 533724ba675SRob Herring&uart1 { 534724ba675SRob Herring pinctrl-names = "default"; 535724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 536724ba675SRob Herring rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; 537724ba675SRob Herring status = "okay"; 538724ba675SRob Herring}; 539724ba675SRob Herring 540724ba675SRob Herring&uart2 { 541724ba675SRob Herring pinctrl-names = "default"; 542724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 543724ba675SRob Herring status = "okay"; 544724ba675SRob Herring}; 545724ba675SRob Herring 546724ba675SRob Herring&uart5 { 547724ba675SRob Herring pinctrl-names = "default"; 548724ba675SRob Herring pinctrl-0 = <&pinctrl_uart5>; 549724ba675SRob Herring status = "okay"; 550724ba675SRob Herring}; 551724ba675SRob Herring 552724ba675SRob Herring&usbotg { 553724ba675SRob Herring vbus-supply = <®_usb_otg_vbus>; 554724ba675SRob Herring pinctrl-names = "default"; 555724ba675SRob Herring pinctrl-0 = <&pinctrl_usbotg>; 556724ba675SRob Herring disable-over-current; 557724ba675SRob Herring status = "okay"; 558724ba675SRob Herring}; 559724ba675SRob Herring 560724ba675SRob Herring&usbh1 { 561724ba675SRob Herring status = "okay"; 562724ba675SRob Herring}; 563724ba675SRob Herring 564724ba675SRob Herring&usdhc3 { 565724ba675SRob Herring pinctrl-names = "default", "state_100mhz", "state_200mhz"; 566724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc3>; 567724ba675SRob Herring pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 568724ba675SRob Herring pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 569724ba675SRob Herring cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 570724ba675SRob Herring vmmc-supply = <®_3p3v>; 571724ba675SRob Herring no-1-8-v; /* firmware will remove if board revision supports */ 572724ba675SRob Herring status = "okay"; 573724ba675SRob Herring}; 574724ba675SRob Herring 575724ba675SRob Herring&wdog1 { 576724ba675SRob Herring pinctrl-names = "default"; 577724ba675SRob Herring pinctrl-0 = <&pinctrl_wdog>; 578724ba675SRob Herring fsl,ext-reset-output; 579724ba675SRob Herring}; 580724ba675SRob Herring 581724ba675SRob Herring&iomuxc { 582724ba675SRob Herring pinctrl_audmux: audmuxgrp { 583724ba675SRob Herring fsl,pins = < 584724ba675SRob Herring MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 585724ba675SRob Herring MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 586724ba675SRob Herring MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 587724ba675SRob Herring MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 588724ba675SRob Herring MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */ 589724ba675SRob Herring >; 590724ba675SRob Herring }; 591724ba675SRob Herring 592724ba675SRob Herring pinctrl_ecspi3: escpi3grp { 593724ba675SRob Herring fsl,pins = < 594724ba675SRob Herring MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 595724ba675SRob Herring MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 596724ba675SRob Herring MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 597724ba675SRob Herring MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 598724ba675SRob Herring >; 599724ba675SRob Herring }; 600724ba675SRob Herring 601724ba675SRob Herring pinctrl_enet: enetgrp { 602724ba675SRob Herring fsl,pins = < 603724ba675SRob Herring MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 604724ba675SRob Herring MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 605724ba675SRob Herring MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 606724ba675SRob Herring MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 607724ba675SRob Herring MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 608724ba675SRob Herring MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 609724ba675SRob Herring MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 610724ba675SRob Herring MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 611724ba675SRob Herring MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 612724ba675SRob Herring MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 613724ba675SRob Herring MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 614724ba675SRob Herring MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 615724ba675SRob Herring MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 616724ba675SRob Herring MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 617724ba675SRob Herring MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 618724ba675SRob Herring MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 619724ba675SRob Herring MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */ 620724ba675SRob Herring >; 621724ba675SRob Herring }; 622724ba675SRob Herring 623724ba675SRob Herring pinctrl_flexcan1: flexcan1grp { 624724ba675SRob Herring fsl,pins = < 625724ba675SRob Herring MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 626724ba675SRob Herring MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 627724ba675SRob Herring >; 628724ba675SRob Herring }; 629724ba675SRob Herring 630724ba675SRob Herring pinctrl_gpio_leds: gpioledsgrp { 631724ba675SRob Herring fsl,pins = < 632724ba675SRob Herring MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 633724ba675SRob Herring MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 634724ba675SRob Herring MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 635724ba675SRob Herring >; 636724ba675SRob Herring }; 637724ba675SRob Herring 638724ba675SRob Herring pinctrl_gpmi_nand: gpminandgrp { 639724ba675SRob Herring fsl,pins = < 640724ba675SRob Herring MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 641724ba675SRob Herring MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 642724ba675SRob Herring MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 643724ba675SRob Herring MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 644724ba675SRob Herring MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 645724ba675SRob Herring MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 646724ba675SRob Herring MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 647724ba675SRob Herring MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 648724ba675SRob Herring MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 649724ba675SRob Herring MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 650724ba675SRob Herring MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 651724ba675SRob Herring MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 652724ba675SRob Herring MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 653724ba675SRob Herring MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 654724ba675SRob Herring MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 655724ba675SRob Herring >; 656724ba675SRob Herring }; 657724ba675SRob Herring 658724ba675SRob Herring pinctrl_i2c1: i2c1grp { 659724ba675SRob Herring fsl,pins = < 660724ba675SRob Herring MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 661724ba675SRob Herring MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 662724ba675SRob Herring MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 663724ba675SRob Herring >; 664724ba675SRob Herring }; 665724ba675SRob Herring 666724ba675SRob Herring pinctrl_i2c2: i2c2grp { 667724ba675SRob Herring fsl,pins = < 668724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 669724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 670724ba675SRob Herring >; 671724ba675SRob Herring }; 672724ba675SRob Herring 673724ba675SRob Herring pinctrl_i2c3: i2c3grp { 674724ba675SRob Herring fsl,pins = < 675724ba675SRob Herring MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 676724ba675SRob Herring MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 677724ba675SRob Herring >; 678724ba675SRob Herring }; 679724ba675SRob Herring 680724ba675SRob Herring pinctrl_pcie: pciegrp { 681724ba675SRob Herring fsl,pins = < 682724ba675SRob Herring MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE_RST# */ 683724ba675SRob Herring >; 684724ba675SRob Herring }; 685724ba675SRob Herring 686724ba675SRob Herring pinctrl_pmic: pmicgrp { 687724ba675SRob Herring fsl,pins = < 688724ba675SRob Herring MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ 689724ba675SRob Herring >; 690724ba675SRob Herring }; 691724ba675SRob Herring 692724ba675SRob Herring pinctrl_pps: ppsgrp { 693724ba675SRob Herring fsl,pins = < 694724ba675SRob Herring MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 695724ba675SRob Herring >; 696724ba675SRob Herring }; 697724ba675SRob Herring 698724ba675SRob Herring pinctrl_pwm2: pwm2grp { 699724ba675SRob Herring fsl,pins = < 700724ba675SRob Herring MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 701724ba675SRob Herring >; 702724ba675SRob Herring }; 703724ba675SRob Herring 704724ba675SRob Herring pinctrl_pwm3: pwm3grp { 705724ba675SRob Herring fsl,pins = < 706724ba675SRob Herring MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 707724ba675SRob Herring >; 708724ba675SRob Herring }; 709724ba675SRob Herring 710724ba675SRob Herring pinctrl_pwm4: pwm4grp { 711724ba675SRob Herring fsl,pins = < 712724ba675SRob Herring MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 713724ba675SRob Herring >; 714724ba675SRob Herring }; 715724ba675SRob Herring 716724ba675SRob Herring pinctrl_reg_can1: regcan1grp { 717724ba675SRob Herring fsl,pins = < 718724ba675SRob Herring MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */ 719724ba675SRob Herring >; 720724ba675SRob Herring }; 721724ba675SRob Herring 722724ba675SRob Herring pinctrl_uart1: uart1grp { 723724ba675SRob Herring fsl,pins = < 724724ba675SRob Herring MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 725724ba675SRob Herring MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 726724ba675SRob Herring MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */ 727724ba675SRob Herring >; 728724ba675SRob Herring }; 729724ba675SRob Herring 730724ba675SRob Herring pinctrl_uart2: uart2grp { 731724ba675SRob Herring fsl,pins = < 732724ba675SRob Herring MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 733724ba675SRob Herring MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 734724ba675SRob Herring >; 735724ba675SRob Herring }; 736724ba675SRob Herring 737724ba675SRob Herring pinctrl_uart5: uart5grp { 738724ba675SRob Herring fsl,pins = < 739724ba675SRob Herring MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 740724ba675SRob Herring MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 741724ba675SRob Herring >; 742724ba675SRob Herring }; 743724ba675SRob Herring 744724ba675SRob Herring pinctrl_usbotg: usbotggrp { 745724ba675SRob Herring fsl,pins = < 746724ba675SRob Herring MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 747724ba675SRob Herring MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */ 748724ba675SRob Herring MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059 749724ba675SRob Herring >; 750724ba675SRob Herring }; 751724ba675SRob Herring 752724ba675SRob Herring pinctrl_usdhc3: usdhc3grp { 753724ba675SRob Herring fsl,pins = < 754724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 755724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 756724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 757724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 758724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 759724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 760724ba675SRob Herring MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ 761724ba675SRob Herring MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 762724ba675SRob Herring >; 763724ba675SRob Herring }; 764724ba675SRob Herring 765724ba675SRob Herring pinctrl_usdhc3_100mhz: usdhc3grp100mhz { 766724ba675SRob Herring fsl,pins = < 767724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 768724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9 769724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 770724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 771724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 772724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 773724ba675SRob Herring MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ 774724ba675SRob Herring MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 775724ba675SRob Herring >; 776724ba675SRob Herring }; 777724ba675SRob Herring 778724ba675SRob Herring pinctrl_usdhc3_200mhz: usdhc3grp200mhz { 779724ba675SRob Herring fsl,pins = < 780724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 781724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 782724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 783724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 784724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 785724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 786724ba675SRob Herring MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ 787724ba675SRob Herring MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 788724ba675SRob Herring >; 789724ba675SRob Herring }; 790724ba675SRob Herring 791724ba675SRob Herring pinctrl_wdog: wdoggrp { 792724ba675SRob Herring fsl,pins = < 793724ba675SRob Herring MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 794724ba675SRob Herring >; 795724ba675SRob Herring }; 796724ba675SRob Herring}; 797