1// SPDX-License-Identifier: GPL-2.0+
2//
3// Copyright 2023 Linaro Ltd.
4
5/dts-v1/;
6
7#include "imx53.dtsi"
8
9/ {
10	model = "StarterKit SK-iMX53 Board";
11	compatible = "starterkit,sk-imx53", "fsl,imx53";
12
13	aliases {
14		/*
15		 * iMX RTC is not battery powered on this board.
16		 * Use the i2c RTC as rtc0.
17		 */
18		rtc0 = &rtc;
19		rtc1 = &srtc;
20	};
21
22	chosen {
23		stdout-path = &uart1;
24	};
25
26	memory@70000000 {
27		device_type = "memory";
28		/* v2 had only 256 MB, v3 has 512 MB */
29		reg = <0x70000000 0x20000000>;
30	};
31
32	reg_usb1_vbus: regulator-usb-vbus {
33		compatible = "regulator-fixed";
34		regulator-name = "usb_vbus";
35		regulator-min-microvolt = <5000000>;
36		regulator-max-microvolt = <5000000>;
37		gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
38		enable-active-high;
39	};
40
41	reg_usb_otg_vbus: regulator-otg-vbus {
42		compatible = "regulator-fixed";
43		regulator-name = "usb_vbus";
44		regulator-min-microvolt = <5000000>;
45		regulator-max-microvolt = <5000000>;
46		gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>;
47		enable-active-high;
48	};
49};
50
51&audmux {
52	pinctrl-names = "default";
53	pinctrl-0 = <&pinctrl_audmux>;
54	status = "okay";
55};
56
57&can1 {
58	pinctrl-names = "default";
59	pinctrl-0 = <&pinctrl_can1>;
60	status = "okay";
61};
62
63&ecspi1 {
64	pinctrl-names = "default";
65	pinctrl-0 = <&pinctrl_ecspi1>;
66	cs-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
67	status = "okay";
68};
69
70&ecspi2 {
71	pinctrl-names = "default";
72	pinctrl-0 = <&pinctrl_ecspi2>;
73	cs-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
74	status = "okay";
75};
76
77&esdhc1 {
78	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
79	fsl,wp-controller;
80	pinctrl-names = "default";
81	pinctrl-0 = <&pinctrl_esdhc1>;
82	status = "okay";
83};
84
85&fec {
86	pinctrl-names = "default";
87	pinctrl-0 = <&pinctrl_fec>;
88	phy-mode = "rmii";
89	phy-handle = <&phy0>;
90	mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
91	status = "okay";
92
93	mdio {
94		#address-cells = <1>;
95		#size-cells = <0>;
96
97		phy0: ethernet-phy@0 {
98			reg = <0>;
99			reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
100		};
101	};
102};
103
104&i2c1 {
105	pinctrl-names = "default";
106	pinctrl-0 = <&pinctrl_i2c1>;
107	status = "okay";
108};
109
110&i2c2 {
111	pinctrl-names = "default", "gpio";
112	pinctrl-0 = <&pinctrl_i2c2>;
113	pinctrl-1 = <&pinctrl_i2c2_gpio>;
114	sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
115	scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
116	status = "okay";
117
118	tlv320aic23: codec@1a {
119		compatible = "ti,tlv320aic23";
120		reg = <0x1a>;
121		pinctrl-names = "default";
122		pinctrl-0 = <&pinctrl_codec>;
123		#sound-dai-cells = <0>;
124	};
125
126	rtc: rtc@68 {
127		compatible = "dallas,ds1338";
128		reg = <0x68>;
129	};
130};
131
132&iomuxc {
133	pinctrl_audmux: audmuxgrp {
134		fsl,pins = <
135			MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC	0x1e4
136			MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD	0x1e4
137			MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS	0x1e4
138			MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD	0x1e4
139		>;
140	};
141
142	pinctrl_can1: can1grp {
143		fsl,pins = <
144			MX53_PAD_PATA_INTRQ__CAN1_TXCAN		0x1e4
145			MX53_PAD_PATA_DIOR__CAN1_RXCAN		0x1e4
146		>;
147	};
148
149	pinctrl_codec: codecgrp {
150		fsl,pins = <
151			MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	0x1c4
152		>;
153	};
154
155	pinctrl_ecspi1: ecspi1grp {
156		fsl,pins = <
157			MX53_PAD_EIM_D16__ECSPI1_SCLK		0x1e4
158			MX53_PAD_EIM_D17__ECSPI1_MISO		0x1e4
159			MX53_PAD_EIM_D18__ECSPI1_MOSI		0x1e4
160		>;
161	};
162
163	pinctrl_ecspi2: ecspi2grp {
164		fsl,pins = <
165			MX53_PAD_CSI0_DAT9__ECSPI2_MOSI		0x1e4
166			MX53_PAD_CSI0_DAT10__ECSPI2_MISO	0x1e4
167			MX53_PAD_EIM_CS0__ECSPI2_SCLK		0x1e4
168		>;
169	};
170
171	pinctrl_esdhc1: esdhc1grp {
172		fsl,pins = <
173			MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5
174			MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5
175			MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5
176			MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5
177			MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5
178			MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5
179			MX53_PAD_EIM_DA14__GPIO3_14		0x1f0
180		>;
181	};
182
183	pinctrl_fec: fecgrp {
184		fsl,pins = <
185			MX53_PAD_FEC_MDC__FEC_MDC		0x1e4
186			MX53_PAD_FEC_MDIO__FEC_MDIO		0x1e4
187			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x1e4
188			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x1e4
189			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x1e4
190			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x1e4
191			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x1e4
192			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x1c4
193			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x1e4
194			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x1e4
195			MX53_PAD_GPIO_1__GPIO1_1		0x1c4
196		>;
197	};
198
199	pinctrl_i2c1: i2c1grp {
200		fsl,pins = <
201			MX53_PAD_EIM_D21__I2C1_SCL		0x400001e4
202			MX53_PAD_EIM_D28__I2C1_SDA		0x400001e4
203		>;
204	};
205
206	pinctrl_i2c2: i2c2grp {
207		fsl,pins = <
208			MX53_PAD_KEY_ROW3__I2C2_SDA             0x400001e4
209			MX53_PAD_EIM_EB2__I2C2_SCL		0x400001e4
210		>;
211	};
212
213	pinctrl_i2c2_gpio: i2c2gpiogrp {
214		fsl,pins = <
215			MX53_PAD_KEY_ROW3__GPIO4_13		0x1e4
216			MX53_PAD_EIM_EB2__GPIO2_30		0x1e4
217		>;
218	};
219
220	pinctrl_nand: nandgrp {
221		fsl,pins = <
222			MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	0x4
223			MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	0x4
224			MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	0x4
225			MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	0x4
226			MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	0xe0
227			MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	0xe0
228			MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	0x4
229			MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1	0x4
230			MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2	0x4
231			MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3	0x4
232			MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0	0xa4
233			MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1	0xa4
234			MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2	0xa4
235			MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3	0xa4
236			MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4	0xa4
237			MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5	0xa4
238			MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6	0xa4
239			MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7	0xa4
240		>;
241	};
242
243	pinctrl_pwm1: pwm1grp {
244		fsl,pins = <
245			MX53_PAD_GPIO_9__PWM1_PWMO		0x5
246		>;
247	};
248
249	pinctrl_uart1: uart1grp {
250		fsl,pins = <
251			MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
252			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
253		>;
254	};
255
256	pinctrl_uart3: uart3grp {
257		fsl,pins = <
258			MX53_PAD_EIM_D24__UART3_TXD_MUX		0x1e4
259			MX53_PAD_EIM_D25__UART3_RXD_MUX		0x1e4
260		>;
261	};
262
263	pinctrl_uart4: uart4grp {
264		fsl,pins = <
265			MX53_PAD_KEY_COL0__UART4_TXD_MUX	0x1e4
266			MX53_PAD_KEY_ROW0__UART4_RXD_MUX	0x1e4
267		>;
268	};
269};
270
271&nfc {
272	pinctrl-names = "default";
273	pinctrl-0 = <&pinctrl_nand>;
274	nand-bus-width = <8>;
275	status = "okay";
276
277	partitions {
278		compatible = "fixed-partitions";
279		#address-cells = <1>;
280		#size-cells = <1>;
281
282		partition@0 {
283			label = "boot";
284			reg = <0x00000000 0x00100000>;
285			read-only;
286		};
287
288		partition@100000 {
289			label = "u-boot";
290			reg = <0x00100000 0x00100000>;
291			read-only;
292		};
293
294		partition@200000 {
295			label = "u-boot-env";
296			reg = <0x00200000 0x00100000>;
297			read-only;
298		};
299
300		partition@1000000 {
301			label = "kernel-safe";
302			reg = <0x01000000 0x00a00000>;
303			read-only;
304		};
305
306		partition@1a00000 {
307			label = "kernel";
308			reg = <0x01a00000 0x005e0000>;
309		};
310
311		partition@2000000 {
312			label = "ubifs";
313			reg = <0x02000000 0x0e000000>;
314		};
315	};
316};
317
318&pwm1 {
319	pinctrl-names = "default";
320	pinctrl-0 = <&pinctrl_pwm1>;
321	status = "okay";
322};
323
324&sata {
325	status = "okay";
326};
327
328&uart1 {
329	pinctrl-names = "default";
330	pinctrl-0 = <&pinctrl_uart1>;
331	status = "okay";
332};
333
334&uart3 {
335	pinctrl-names = "default";
336	pinctrl-0 = <&pinctrl_uart3>;
337	status = "okay";
338};
339
340&uart4 {
341	pinctrl-names = "default";
342	pinctrl-0 = <&pinctrl_uart4>;
343	status = "okay";
344};
345
346&usbh1 {
347	vbus-supply = <&reg_usb1_vbus>;
348	phy_type = "utmi";
349	disable-over-current;
350	status = "okay";
351};
352
353&usbotg {
354	dr_mode = "peripheral";
355	disable-over-current;
356	status = "okay";
357};
358