1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring/dts-v1/; 7*724ba675SRob Herring 8*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 9*724ba675SRob Herring#include <dt-bindings/input/input.h> 10*724ba675SRob Herring#include "imx35-eukrea-cpuimx35.dtsi" 11*724ba675SRob Herring 12*724ba675SRob Herring/ { 13*724ba675SRob Herring model = "Eukrea CPUIMX35"; 14*724ba675SRob Herring compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35"; 15*724ba675SRob Herring 16*724ba675SRob Herring gpio-keys { 17*724ba675SRob Herring compatible = "gpio-keys"; 18*724ba675SRob Herring pinctrl-names = "default"; 19*724ba675SRob Herring pinctrl-0 = <&pinctrl_bp1>; 20*724ba675SRob Herring 21*724ba675SRob Herring button { 22*724ba675SRob Herring label = "BP1"; 23*724ba675SRob Herring gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 24*724ba675SRob Herring linux,code = <BTN_MISC>; 25*724ba675SRob Herring wakeup-source; 26*724ba675SRob Herring linux,input-type = <1>; 27*724ba675SRob Herring }; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring leds { 31*724ba675SRob Herring compatible = "gpio-leds"; 32*724ba675SRob Herring pinctrl-names = "default"; 33*724ba675SRob Herring pinctrl-0 = <&pinctrl_led1>; 34*724ba675SRob Herring 35*724ba675SRob Herring led1 { 36*724ba675SRob Herring label = "led1"; 37*724ba675SRob Herring gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; 38*724ba675SRob Herring linux,default-trigger = "heartbeat"; 39*724ba675SRob Herring }; 40*724ba675SRob Herring }; 41*724ba675SRob Herring 42*724ba675SRob Herring sound { 43*724ba675SRob Herring compatible = "eukrea,asoc-tlv320"; 44*724ba675SRob Herring eukrea,model = "imx35-eukrea-tlv320aic23"; 45*724ba675SRob Herring ssi-controller = <&ssi1>; 46*724ba675SRob Herring fsl,mux-int-port = <1>; 47*724ba675SRob Herring fsl,mux-ext-port = <4>; 48*724ba675SRob Herring }; 49*724ba675SRob Herring}; 50*724ba675SRob Herring 51*724ba675SRob Herring&audmux { 52*724ba675SRob Herring pinctrl-names = "default"; 53*724ba675SRob Herring pinctrl-0 = <&pinctrl_audmux>; 54*724ba675SRob Herring status = "okay"; 55*724ba675SRob Herring}; 56*724ba675SRob Herring 57*724ba675SRob Herring&esdhc1 { 58*724ba675SRob Herring pinctrl-names = "default"; 59*724ba675SRob Herring pinctrl-0 = <&pinctrl_esdhc1>; 60*724ba675SRob Herring cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 61*724ba675SRob Herring status = "okay"; 62*724ba675SRob Herring}; 63*724ba675SRob Herring 64*724ba675SRob Herring&i2c1 { 65*724ba675SRob Herring tlv320aic23: codec@1a { 66*724ba675SRob Herring compatible = "ti,tlv320aic23"; 67*724ba675SRob Herring reg = <0x1a>; 68*724ba675SRob Herring }; 69*724ba675SRob Herring}; 70*724ba675SRob Herring 71*724ba675SRob Herring&iomuxc { 72*724ba675SRob Herring imx35-eukrea { 73*724ba675SRob Herring pinctrl_audmux: audmuxgrp { 74*724ba675SRob Herring fsl,pins = < 75*724ba675SRob Herring MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000 76*724ba675SRob Herring MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000 77*724ba675SRob Herring MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000 78*724ba675SRob Herring MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000 79*724ba675SRob Herring >; 80*724ba675SRob Herring }; 81*724ba675SRob Herring 82*724ba675SRob Herring pinctrl_bp1: bp1grp { 83*724ba675SRob Herring fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>; 84*724ba675SRob Herring }; 85*724ba675SRob Herring 86*724ba675SRob Herring pinctrl_esdhc1: esdhc1grp { 87*724ba675SRob Herring fsl,pins = < 88*724ba675SRob Herring MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 89*724ba675SRob Herring MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 90*724ba675SRob Herring MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 91*724ba675SRob Herring MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 92*724ba675SRob Herring MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 93*724ba675SRob Herring MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 94*724ba675SRob Herring MX35_PAD_LD18__GPIO3_24 0x80000000 /* CD */ 95*724ba675SRob Herring >; 96*724ba675SRob Herring }; 97*724ba675SRob Herring 98*724ba675SRob Herring pinctrl_led1: led1grp { 99*724ba675SRob Herring fsl,pins = <MX35_PAD_LD23__GPIO3_29 0x80000000>; 100*724ba675SRob Herring }; 101*724ba675SRob Herring 102*724ba675SRob Herring pinctrl_reg_lcd_3v3: reg-lcd-3v3 { 103*724ba675SRob Herring fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>; 104*724ba675SRob Herring }; 105*724ba675SRob Herring 106*724ba675SRob Herring pinctrl_uart1: uart1grp { 107*724ba675SRob Herring fsl,pins = < 108*724ba675SRob Herring MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 109*724ba675SRob Herring MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 110*724ba675SRob Herring MX35_PAD_CTS1__UART1_CTS 0x1c5 111*724ba675SRob Herring MX35_PAD_RTS1__UART1_RTS 0x1c5 112*724ba675SRob Herring >; 113*724ba675SRob Herring }; 114*724ba675SRob Herring 115*724ba675SRob Herring pinctrl_uart2: uart2grp { 116*724ba675SRob Herring fsl,pins = < 117*724ba675SRob Herring MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5 118*724ba675SRob Herring MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5 119*724ba675SRob Herring MX35_PAD_RTS2__UART2_RTS 0x1c5 120*724ba675SRob Herring MX35_PAD_CTS2__UART2_CTS 0x1c5 121*724ba675SRob Herring >; 122*724ba675SRob Herring }; 123*724ba675SRob Herring }; 124*724ba675SRob Herring}; 125*724ba675SRob Herring 126*724ba675SRob Herring&ssi1 { 127*724ba675SRob Herring codec-handle = <&tlv320aic23>; 128*724ba675SRob Herring status = "okay"; 129*724ba675SRob Herring}; 130*724ba675SRob Herring 131*724ba675SRob Herring&uart1 { 132*724ba675SRob Herring pinctrl-names = "default"; 133*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 134*724ba675SRob Herring uart-has-rtscts; 135*724ba675SRob Herring status = "okay"; 136*724ba675SRob Herring}; 137*724ba675SRob Herring 138*724ba675SRob Herring&uart2 { 139*724ba675SRob Herring pinctrl-names = "default"; 140*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 141*724ba675SRob Herring uart-has-rtscts; 142*724ba675SRob Herring status = "okay"; 143*724ba675SRob Herring}; 144*724ba675SRob Herring 145*724ba675SRob Herring&usbhost1 { 146*724ba675SRob Herring phy_type = "serial"; 147*724ba675SRob Herring dr_mode = "host"; 148*724ba675SRob Herring status = "okay"; 149*724ba675SRob Herring}; 150*724ba675SRob Herring 151*724ba675SRob Herring&usbotg { 152*724ba675SRob Herring phy_type = "utmi"; 153*724ba675SRob Herring dr_mode = "otg"; 154*724ba675SRob Herring external-vbus-divider; 155*724ba675SRob Herring status = "okay"; 156*724ba675SRob Herring}; 157