1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
4 */
5
6#include "imx25-eukrea-mbimxsd25-baseboard.dts"
7
8/ {
9	model = "Eukrea MBIMXSD25 with the CMO-QVGA Display";
10	compatible = "eukrea,mbimxsd25-baseboard-cmo-qvga", "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";
11
12	cmo_qvga: display {
13		model = "CMO-QVGA";
14		bits-per-pixel = <16>;
15		fsl,pcr = <0xcad08b80>;
16		bus-width = <18>;
17		display-timings {
18			native-mode = <&qvga_timings>;
19			qvga_timings: 320x240 {
20				clock-frequency = <6500000>;
21				hactive = <320>;
22				vactive = <240>;
23				hback-porch = <30>;
24				hfront-porch = <38>;
25				vback-porch = <20>;
26				vfront-porch = <3>;
27				hsync-len = <15>;
28				vsync-len = <4>;
29			};
30		};
31	};
32
33	reg_lcd_3v3: regulator-0 {
34		compatible = "regulator-fixed";
35		pinctrl-names = "default";
36		pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
37		regulator-name = "lcd-3v3";
38		regulator-min-microvolt = <3300000>;
39		regulator-max-microvolt = <3300000>;
40		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
41		enable-active-high;
42	};
43};
44
45&iomuxc {
46	imx25-eukrea-mbimxsd25-baseboard-cmo-qvga {
47		pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
48			fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
49		};
50	};
51};
52
53&lcdc {
54	display = <&cmo_qvga>;
55	fsl,lpccr = <0x00a903ff>;
56	lcd-supply = <&reg_lcd_3v3>;
57	status = "okay";
58};
59