1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
4 *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
5 *                   AT91SAM9X25, AT91SAM9X35 SoC
6 *
7 *  Copyright (C) 2012 Atmel,
8 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 */
10
11#include <dt-bindings/dma/at91.h>
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/clock/at91.h>
16#include <dt-bindings/mfd/at91-usart.h>
17
18/ {
19	#address-cells = <1>;
20	#size-cells = <1>;
21	model = "Atmel AT91SAM9x5 family SoC";
22	compatible = "atmel,at91sam9x5";
23	interrupt-parent = <&aic>;
24
25	aliases {
26		serial0 = &dbgu;
27		serial1 = &usart0;
28		serial2 = &usart1;
29		serial3 = &usart2;
30		gpio0 = &pioA;
31		gpio1 = &pioB;
32		gpio2 = &pioC;
33		gpio3 = &pioD;
34		tcb0 = &tcb0;
35		tcb1 = &tcb1;
36		i2c0 = &i2c0;
37		i2c1 = &i2c1;
38		i2c2 = &i2c2;
39		ssc0 = &ssc0;
40		pwm0 = &pwm0;
41	};
42	cpus {
43		#address-cells = <1>;
44		#size-cells = <0>;
45
46		cpu@0 {
47			compatible = "arm,arm926ej-s";
48			device_type = "cpu";
49			reg = <0>;
50		};
51	};
52
53	memory@20000000 {
54		device_type = "memory";
55		reg = <0x20000000 0x10000000>;
56	};
57
58	clocks {
59		slow_xtal: slow_xtal {
60			compatible = "fixed-clock";
61			#clock-cells = <0>;
62			clock-frequency = <0>;
63		};
64
65		main_xtal: main_xtal {
66			compatible = "fixed-clock";
67			#clock-cells = <0>;
68			clock-frequency = <0>;
69		};
70
71		adc_op_clk: adc_op_clk{
72			compatible = "fixed-clock";
73			#clock-cells = <0>;
74			clock-frequency = <1000000>;
75		};
76	};
77
78	sram: sram@300000 {
79		compatible = "mmio-sram";
80		reg = <0x00300000 0x8000>;
81		#address-cells = <1>;
82		#size-cells = <1>;
83		ranges = <0 0x00300000 0x8000>;
84	};
85
86	ahb {
87		compatible = "simple-bus";
88		#address-cells = <1>;
89		#size-cells = <1>;
90		ranges;
91
92		apb {
93			compatible = "simple-bus";
94			#address-cells = <1>;
95			#size-cells = <1>;
96			ranges;
97
98			aic: interrupt-controller@fffff000 {
99				#interrupt-cells = <3>;
100				compatible = "atmel,at91rm9200-aic";
101				interrupt-controller;
102				reg = <0xfffff000 0x200>;
103				atmel,external-irqs = <31>;
104			};
105
106			matrix: matrix@ffffde00 {
107				compatible = "atmel,at91sam9x5-matrix", "syscon";
108				reg = <0xffffde00 0x100>;
109			};
110
111			pmecc: ecc-engine@ffffe000 {
112				compatible = "atmel,at91sam9g45-pmecc";
113				reg = <0xffffe000 0x600>,
114				      <0xffffe600 0x200>;
115			};
116
117			ramc0: ramc@ffffe800 {
118				compatible = "atmel,at91sam9g45-ddramc";
119				reg = <0xffffe800 0x200>;
120				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
121				clock-names = "ddrck";
122			};
123
124			smc: smc@ffffea00 {
125				compatible = "atmel,at91sam9260-smc", "syscon";
126				reg = <0xffffea00 0x200>;
127			};
128
129			pmc: clock-controller@fffffc00 {
130				compatible = "atmel,at91sam9x5-pmc", "syscon";
131				reg = <0xfffffc00 0x200>;
132				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
133				#clock-cells = <2>;
134				clocks = <&clk32k>, <&main_xtal>;
135				clock-names = "slow_clk", "main_xtal";
136			};
137
138			reset_controller: reset-controller@fffffe00 {
139				compatible = "atmel,at91sam9g45-rstc";
140				reg = <0xfffffe00 0x10>;
141				clocks = <&clk32k>;
142			};
143
144			shutdown_controller: poweroff@fffffe10 {
145				compatible = "atmel,at91sam9x5-shdwc";
146				reg = <0xfffffe10 0x10>;
147				clocks = <&clk32k>;
148			};
149
150			pit: timer@fffffe30 {
151				compatible = "atmel,at91sam9260-pit";
152				reg = <0xfffffe30 0xf>;
153				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
154				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
155			};
156
157			clk32k: clock-controller@fffffe50 {
158				compatible = "atmel,at91sam9x5-sckc";
159				reg = <0xfffffe50 0x4>;
160				clocks = <&slow_xtal>;
161				#clock-cells = <0>;
162			};
163
164			tcb0: timer@f8008000 {
165				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
166				#address-cells = <1>;
167				#size-cells = <0>;
168				reg = <0xf8008000 0x100>;
169				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
170				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
171				clock-names = "t0_clk", "slow_clk";
172			};
173
174			tcb1: timer@f800c000 {
175				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
176				#address-cells = <1>;
177				#size-cells = <0>;
178				reg = <0xf800c000 0x100>;
179				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
180				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
181				clock-names = "t0_clk", "slow_clk";
182			};
183
184			dma0: dma-controller@ffffec00 {
185				compatible = "atmel,at91sam9g45-dma";
186				reg = <0xffffec00 0x200>;
187				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
188				#dma-cells = <2>;
189				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
190				clock-names = "dma_clk";
191			};
192
193			dma1: dma-controller@ffffee00 {
194				compatible = "atmel,at91sam9g45-dma";
195				reg = <0xffffee00 0x200>;
196				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
197				#dma-cells = <2>;
198				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
199				clock-names = "dma_clk";
200			};
201
202			pinctrl: pinctrl@fffff400 {
203				#address-cells = <1>;
204				#size-cells = <1>;
205				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
206				ranges = <0xfffff400 0xfffff400 0x800>;
207
208				/* shared pinctrl settings */
209				dbgu {
210					pinctrl_dbgu: dbgu-0 {
211						atmel,pins =
212							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
213							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
214					};
215				};
216
217				ebi {
218					pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
219						atmel,pins =
220							<AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
221							 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
222							 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
223							 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
224							 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
225							 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
226							 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
227							 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
228					};
229
230					pinctrl_ebi_data_8_15: ebi-data-msb-0 {
231						atmel,pins =
232							<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
233							 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
234							 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
235							 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
236							 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
237							 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
238							 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
239							 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
240					};
241
242					pinctrl_ebi_addr_nand: ebi-addr-0 {
243						atmel,pins =
244							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
245							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
246					};
247				};
248
249				usart0 {
250					pinctrl_usart0: usart0-0 {
251						atmel,pins =
252							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
253							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
254					};
255
256					pinctrl_usart0_rts: usart0_rts-0 {
257						atmel,pins =
258							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA2 periph A */
259					};
260
261					pinctrl_usart0_cts: usart0_cts-0 {
262						atmel,pins =
263							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA3 periph A */
264					};
265
266					pinctrl_usart0_sck: usart0_sck-0 {
267						atmel,pins =
268							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA4 periph A */
269					};
270				};
271
272				usart1 {
273					pinctrl_usart1: usart1-0 {
274						atmel,pins =
275							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
276							 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
277					};
278
279					pinctrl_usart1_rts: usart1_rts-0 {
280						atmel,pins =
281							<AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC27 periph C */
282					};
283
284					pinctrl_usart1_cts: usart1_cts-0 {
285						atmel,pins =
286							<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC28 periph C */
287					};
288
289					pinctrl_usart1_sck: usart1_sck-0 {
290						atmel,pins =
291							<AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC29 periph C */
292					};
293				};
294
295				usart2 {
296					pinctrl_usart2: usart2-0 {
297						atmel,pins =
298							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
299							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
300					};
301
302					pinctrl_usart2_rts: usart2_rts-0 {
303						atmel,pins =
304							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB0 periph B */
305					};
306
307					pinctrl_usart2_cts: usart2_cts-0 {
308						atmel,pins =
309							<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB1 periph B */
310					};
311
312					pinctrl_usart2_sck: usart2_sck-0 {
313						atmel,pins =
314							<AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
315					};
316				};
317
318				uart0 {
319					pinctrl_uart0: uart0-0 {
320						atmel,pins =
321							<AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC8 periph C */
322							 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;	/* PC9 periph C with pullup */
323					};
324				};
325
326				uart1 {
327					pinctrl_uart1: uart1-0 {
328						atmel,pins =
329							<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC16 periph C */
330							 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;	/* PC17 periph C with pullup */
331					};
332				};
333
334				nand {
335					pinctrl_nand_oe_we: nand-oe-we-0 {
336						atmel,pins =
337							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
338							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
339					};
340
341					pinctrl_nand_rb: nand-rb-0 {
342						atmel,pins =
343							<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
344					};
345
346					pinctrl_nand_cs: nand-cs-0 {
347						atmel,pins =
348							<AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
349					};
350				};
351
352				mmc0 {
353					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
354						atmel,pins =
355							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
356							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
357							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA15 periph A with pullup */
358					};
359
360					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
361						atmel,pins =
362							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
363							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
364							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
365					};
366				};
367
368				mmc1 {
369					pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
370						atmel,pins =
371							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA13 periph B */
372							 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA12 periph B with pullup */
373							 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA11 periph B with pullup */
374					};
375
376					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
377						atmel,pins =
378							<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA2 periph B with pullup */
379							 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA3 periph B with pullup */
380							 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA4 periph B with pullup */
381					};
382				};
383
384				ssc0 {
385					pinctrl_ssc0_tx: ssc0_tx-0 {
386						atmel,pins =
387							<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA24 periph B */
388							 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA25 periph B */
389							 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA26 periph B */
390					};
391
392					pinctrl_ssc0_rx: ssc0_rx-0 {
393						atmel,pins =
394							<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
395							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
396							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA29 periph B */
397					};
398				};
399
400				spi0 {
401					pinctrl_spi0: spi0-0 {
402						atmel,pins =
403							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A SPI0_MISO pin */
404							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A SPI0_MOSI pin */
405							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA13 periph A SPI0_SPCK pin */
406					};
407				};
408
409				spi1 {
410					pinctrl_spi1: spi1-0 {
411						atmel,pins =
412							<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA21 periph B SPI1_MISO pin */
413							 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA22 periph B SPI1_MOSI pin */
414							 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA23 periph B SPI1_SPCK pin */
415					};
416				};
417
418				i2c0 {
419					pinctrl_i2c0: i2c0-0 {
420						atmel,pins =
421							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA30 periph A I2C0 data */
422							 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA31 periph A I2C0 clock */
423					};
424				};
425
426				i2c1 {
427					pinctrl_i2c1: i2c1-0 {
428						atmel,pins =
429							<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC0 periph C I2C1 data */
430							 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC1 periph C I2C1 clock */
431					};
432				};
433
434				i2c2 {
435					pinctrl_i2c2: i2c2-0 {
436						atmel,pins =
437							<AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B I2C2 data */
438							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B I2C2 clock */
439					};
440				};
441
442				i2c_gpio0 {
443					pinctrl_i2c_gpio0: i2c_gpio0-0 {
444						atmel,pins =
445							<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PA30 gpio multidrive I2C0 data */
446							 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PA31 gpio multidrive I2C0 clock */
447					};
448				};
449
450				i2c_gpio1 {
451					pinctrl_i2c_gpio1: i2c_gpio1-0 {
452						atmel,pins =
453							<AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PC0 gpio multidrive I2C1 data */
454							 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PC1 gpio multidrive I2C1 clock */
455					};
456				};
457
458				i2c_gpio2 {
459					pinctrl_i2c_gpio2: i2c_gpio2-0 {
460						atmel,pins =
461							<AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PB4 gpio multidrive I2C2 data */
462							 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PB5 gpio multidrive I2C2 clock */
463					};
464				};
465
466				pwm0 {
467					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
468						atmel,pins =
469							<AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
470					};
471					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
472						atmel,pins =
473							<AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
474					};
475					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
476						atmel,pins =
477							<AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
478					};
479
480					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
481						atmel,pins =
482							<AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
483					};
484					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
485						atmel,pins =
486							<AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
487					};
488					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
489						atmel,pins =
490							<AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
491					};
492
493					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
494						atmel,pins =
495							<AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496					};
497					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
498						atmel,pins =
499							<AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
500					};
501
502					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
503						atmel,pins =
504							<AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
505					};
506					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
507						atmel,pins =
508							<AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
509					};
510				};
511
512				tcb0 {
513					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
514						atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
515					};
516
517					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
518						atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
519					};
520
521					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
522						atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
523					};
524
525					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
526						atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
527					};
528
529					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
530						atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
531					};
532
533					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
534						atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
535					};
536
537					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
538						atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
539					};
540
541					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
542						atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
543					};
544
545					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
546						atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
547					};
548				};
549
550				tcb1 {
551					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
552						atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
553					};
554
555					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
556						atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
557					};
558
559					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
560						atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
561					};
562
563					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
564						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
565					};
566
567					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
568						atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
569					};
570
571					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
572						atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
573					};
574
575					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
576						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
577					};
578
579					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
580						atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
581					};
582
583					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
584						atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
585					};
586				};
587
588				pioA: gpio@fffff400 {
589					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
590					reg = <0xfffff400 0x200>;
591					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
592					#gpio-cells = <2>;
593					gpio-controller;
594					interrupt-controller;
595					#interrupt-cells = <2>;
596					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
597				};
598
599				pioB: gpio@fffff600 {
600					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
601					reg = <0xfffff600 0x200>;
602					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
603					#gpio-cells = <2>;
604					gpio-controller;
605					#gpio-lines = <19>;
606					interrupt-controller;
607					#interrupt-cells = <2>;
608					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
609				};
610
611				pioC: gpio@fffff800 {
612					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
613					reg = <0xfffff800 0x200>;
614					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
615					#gpio-cells = <2>;
616					gpio-controller;
617					interrupt-controller;
618					#interrupt-cells = <2>;
619					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
620				};
621
622				pioD: gpio@fffffa00 {
623					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
624					reg = <0xfffffa00 0x200>;
625					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
626					#gpio-cells = <2>;
627					gpio-controller;
628					#gpio-lines = <22>;
629					interrupt-controller;
630					#interrupt-cells = <2>;
631					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
632				};
633			};
634
635			ssc0: ssc@f0010000 {
636				compatible = "atmel,at91sam9g45-ssc";
637				reg = <0xf0010000 0x4000>;
638				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
639				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
640				       <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
641				dma-names = "tx", "rx";
642				pinctrl-names = "default";
643				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
644				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
645				clock-names = "pclk";
646				status = "disabled";
647			};
648
649			mmc0: mmc@f0008000 {
650				compatible = "atmel,hsmci";
651				reg = <0xf0008000 0x600>;
652				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
653				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
654				dma-names = "rxtx";
655				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
656				clock-names = "mci_clk";
657				#address-cells = <1>;
658				#size-cells = <0>;
659				status = "disabled";
660			};
661
662			mmc1: mmc@f000c000 {
663				compatible = "atmel,hsmci";
664				reg = <0xf000c000 0x600>;
665				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
666				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
667				dma-names = "rxtx";
668				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
669				clock-names = "mci_clk";
670				#address-cells = <1>;
671				#size-cells = <0>;
672				status = "disabled";
673			};
674
675			dbgu: serial@fffff200 {
676				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
677				reg = <0xfffff200 0x200>;
678				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
679				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
680				pinctrl-names = "default";
681				pinctrl-0 = <&pinctrl_dbgu>;
682				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
683				       <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
684				dma-names = "tx", "rx";
685				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
686				clock-names = "usart";
687				status = "disabled";
688			};
689
690			usart0: serial@f801c000 {
691				compatible = "atmel,at91sam9260-usart";
692				reg = <0xf801c000 0x200>;
693				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
694				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
695				pinctrl-names = "default";
696				pinctrl-0 = <&pinctrl_usart0>;
697				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
698				       <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
699				dma-names = "tx", "rx";
700				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
701				clock-names = "usart";
702				status = "disabled";
703			};
704
705			usart1: serial@f8020000 {
706				compatible = "atmel,at91sam9260-usart";
707				reg = <0xf8020000 0x200>;
708				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
709				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
710				pinctrl-names = "default";
711				pinctrl-0 = <&pinctrl_usart1>;
712				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
713				       <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
714				dma-names = "tx", "rx";
715				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
716				clock-names = "usart";
717				status = "disabled";
718			};
719
720			usart2: serial@f8024000 {
721				compatible = "atmel,at91sam9260-usart";
722				reg = <0xf8024000 0x200>;
723				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
724				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
725				pinctrl-names = "default";
726				pinctrl-0 = <&pinctrl_usart2>;
727				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
728				       <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
729				dma-names = "tx", "rx";
730				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
731				clock-names = "usart";
732				status = "disabled";
733			};
734
735			i2c0: i2c@f8010000 {
736				compatible = "atmel,at91sam9x5-i2c";
737				reg = <0xf8010000 0x100>;
738				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
739				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
740				       <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
741				dma-names = "tx", "rx";
742				#address-cells = <1>;
743				#size-cells = <0>;
744				pinctrl-names = "default";
745				pinctrl-0 = <&pinctrl_i2c0>;
746				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
747				status = "disabled";
748			};
749
750			i2c1: i2c@f8014000 {
751				compatible = "atmel,at91sam9x5-i2c";
752				reg = <0xf8014000 0x100>;
753				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
754				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
755				       <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
756				dma-names = "tx", "rx";
757				#address-cells = <1>;
758				#size-cells = <0>;
759				pinctrl-names = "default";
760				pinctrl-0 = <&pinctrl_i2c1>;
761				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
762				status = "disabled";
763			};
764
765			i2c2: i2c@f8018000 {
766				compatible = "atmel,at91sam9x5-i2c";
767				reg = <0xf8018000 0x100>;
768				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
769				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
770				       <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
771				dma-names = "tx", "rx";
772				#address-cells = <1>;
773				#size-cells = <0>;
774				pinctrl-names = "default";
775				pinctrl-0 = <&pinctrl_i2c2>;
776				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
777				status = "disabled";
778			};
779
780			uart0: serial@f8040000 {
781				compatible = "atmel,at91sam9260-usart";
782				reg = <0xf8040000 0x200>;
783				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
784				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
785				pinctrl-names = "default";
786				pinctrl-0 = <&pinctrl_uart0>;
787				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
788				clock-names = "usart";
789				status = "disabled";
790			};
791
792			uart1: serial@f8044000 {
793				compatible = "atmel,at91sam9260-usart";
794				reg = <0xf8044000 0x200>;
795				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
796				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
797				pinctrl-names = "default";
798				pinctrl-0 = <&pinctrl_uart1>;
799				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
800				clock-names = "usart";
801				status = "disabled";
802			};
803
804			adc0: adc@f804c000 {
805				compatible = "atmel,at91sam9x5-adc";
806				reg = <0xf804c000 0x100>;
807				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
808				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
809					 <&adc_op_clk>;
810				clock-names = "adc_clk", "adc_op_clk";
811				atmel,adc-use-external-triggers;
812				atmel,adc-channels-used = <0xffff>;
813				atmel,adc-vref = <3300>;
814				atmel,adc-startup-time = <40>;
815				atmel,adc-sample-hold-time = <11>;
816			};
817
818			spi0: spi@f0000000 {
819				#address-cells = <1>;
820				#size-cells = <0>;
821				compatible = "atmel,at91rm9200-spi";
822				reg = <0xf0000000 0x100>;
823				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
824				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
825				       <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
826				dma-names = "tx", "rx";
827				pinctrl-names = "default";
828				pinctrl-0 = <&pinctrl_spi0>;
829				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
830				clock-names = "spi_clk";
831				status = "disabled";
832			};
833
834			spi1: spi@f0004000 {
835				#address-cells = <1>;
836				#size-cells = <0>;
837				compatible = "atmel,at91rm9200-spi";
838				reg = <0xf0004000 0x100>;
839				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
840				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
841				       <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
842				dma-names = "tx", "rx";
843				pinctrl-names = "default";
844				pinctrl-0 = <&pinctrl_spi1>;
845				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
846				clock-names = "spi_clk";
847				status = "disabled";
848			};
849
850			usb2: gadget@f803c000 {
851				compatible = "atmel,at91sam9g45-udc";
852				reg = <0x00500000 0x80000
853				       0xf803c000 0x400>;
854				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
855				clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
856				clock-names = "hclk", "pclk";
857				status = "disabled";
858			};
859
860			watchdog: watchdog@fffffe40 {
861				compatible = "atmel,at91sam9260-wdt";
862				reg = <0xfffffe40 0x10>;
863				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
864				clocks = <&clk32k>;
865				atmel,watchdog-type = "hardware";
866				atmel,reset-type = "all";
867				atmel,dbg-halt;
868				status = "disabled";
869			};
870
871			rtc: rtc@fffffeb0 {
872				compatible = "atmel,at91sam9x5-rtc";
873				reg = <0xfffffeb0 0x40>;
874				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
875				clocks = <&clk32k>;
876				status = "disabled";
877			};
878
879			pwm0: pwm@f8034000 {
880				compatible = "atmel,at91sam9rl-pwm";
881				reg = <0xf8034000 0x300>;
882				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
883				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
884				#pwm-cells = <3>;
885				status = "disabled";
886			};
887		};
888
889		usb0: ohci@600000 {
890			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
891			reg = <0x00600000 0x100000>;
892			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
893			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
894			clock-names = "ohci_clk", "hclk", "uhpck";
895			status = "disabled";
896		};
897
898		usb1: ehci@700000 {
899			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
900			reg = <0x00700000 0x100000>;
901			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
902			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
903			clock-names = "usb_clk", "ehci_clk";
904			status = "disabled";
905		};
906
907		ebi: ebi@10000000 {
908			compatible = "atmel,at91sam9x5-ebi";
909			#address-cells = <2>;
910			#size-cells = <1>;
911			atmel,smc = <&smc>;
912			atmel,matrix = <&matrix>;
913			reg = <0x10000000 0x60000000>;
914			ranges = <0x0 0x0 0x10000000 0x10000000
915				  0x1 0x0 0x20000000 0x10000000
916				  0x2 0x0 0x30000000 0x10000000
917				  0x3 0x0 0x40000000 0x10000000
918				  0x4 0x0 0x50000000 0x10000000
919				  0x5 0x0 0x60000000 0x10000000>;
920			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
921			status = "disabled";
922
923			nand_controller: nand-controller {
924				compatible = "atmel,at91sam9g45-nand-controller";
925				ecc-engine = <&pmecc>;
926				#address-cells = <2>;
927				#size-cells = <1>;
928				ranges;
929				status = "disabled";
930			};
931		};
932	};
933
934	i2c-gpio-0 {
935		compatible = "i2c-gpio";
936		gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
937			 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
938			>;
939		i2c-gpio,sda-open-drain;
940		i2c-gpio,scl-open-drain;
941		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
942		#address-cells = <1>;
943		#size-cells = <0>;
944		pinctrl-names = "default";
945		pinctrl-0 = <&pinctrl_i2c_gpio0>;
946		status = "disabled";
947	};
948
949	i2c-gpio-1 {
950		compatible = "i2c-gpio";
951		gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
952			 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
953			>;
954		i2c-gpio,sda-open-drain;
955		i2c-gpio,scl-open-drain;
956		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
957		#address-cells = <1>;
958		#size-cells = <0>;
959		pinctrl-names = "default";
960		pinctrl-0 = <&pinctrl_i2c_gpio1>;
961		status = "disabled";
962	};
963
964	i2c-gpio-2 {
965		compatible = "i2c-gpio";
966		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
967			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
968			>;
969		i2c-gpio,sda-open-drain;
970		i2c-gpio,scl-open-drain;
971		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
972		#address-cells = <1>;
973		#size-cells = <0>;
974		pinctrl-names = "default";
975		pinctrl-0 = <&pinctrl_i2c_gpio2>;
976		status = "disabled";
977	};
978};
979