1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC 4 * 5 * Copyright (C) 2014 Microchip 6 * Alexandre Belloni <alexandre.belloni@free-electrons.com> 7 */ 8 9#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/clock/at91.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/pwm/pwm.h> 14#include <dt-bindings/mfd/at91-usart.h> 15 16/ { 17 #address-cells = <1>; 18 #size-cells = <1>; 19 model = "Atmel AT91SAM9RL family SoC"; 20 compatible = "atmel,at91sam9rl", "atmel,at91sam9"; 21 interrupt-parent = <&aic>; 22 23 aliases { 24 serial0 = &dbgu; 25 serial1 = &usart0; 26 serial2 = &usart1; 27 serial3 = &usart2; 28 serial4 = &usart3; 29 gpio0 = &pioA; 30 gpio1 = &pioB; 31 gpio2 = &pioC; 32 gpio3 = &pioD; 33 tcb0 = &tcb0; 34 i2c0 = &i2c0; 35 i2c1 = &i2c1; 36 ssc0 = &ssc0; 37 ssc1 = &ssc1; 38 pwm0 = &pwm0; 39 }; 40 41 cpus { 42 #address-cells = <1>; 43 #size-cells = <0>; 44 45 cpu@0 { 46 compatible = "arm,arm926ej-s"; 47 device_type = "cpu"; 48 reg = <0>; 49 }; 50 }; 51 52 memory@20000000 { 53 device_type = "memory"; 54 reg = <0x20000000 0x04000000>; 55 }; 56 57 clocks { 58 slow_xtal: slow_xtal { 59 compatible = "fixed-clock"; 60 #clock-cells = <0>; 61 clock-frequency = <0>; 62 }; 63 64 main_xtal: main_xtal { 65 compatible = "fixed-clock"; 66 #clock-cells = <0>; 67 clock-frequency = <0>; 68 }; 69 70 adc_op_clk: adc_op_clk{ 71 compatible = "fixed-clock"; 72 #clock-cells = <0>; 73 clock-frequency = <1000000>; 74 }; 75 }; 76 77 sram: sram@300000 { 78 compatible = "mmio-sram"; 79 reg = <0x00300000 0x10000>; 80 #address-cells = <1>; 81 #size-cells = <1>; 82 ranges = <0 0x00300000 0x10000>; 83 }; 84 85 ahb { 86 compatible = "simple-bus"; 87 #address-cells = <1>; 88 #size-cells = <1>; 89 ranges; 90 91 fb0: fb@500000 { 92 compatible = "atmel,at91sam9rl-lcdc"; 93 reg = <0x00500000 0x1000>; 94 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; 95 pinctrl-names = "default"; 96 pinctrl-0 = <&pinctrl_fb>; 97 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; 98 clock-names = "hclk", "lcdc_clk"; 99 status = "disabled"; 100 }; 101 102 ebi: ebi@10000000 { 103 compatible = "atmel,at91sam9rl-ebi"; 104 #address-cells = <2>; 105 #size-cells = <1>; 106 atmel,smc = <&smc>; 107 atmel,matrix = <&matrix>; 108 reg = <0x10000000 0x80000000>; 109 ranges = <0x0 0x0 0x10000000 0x10000000 110 0x1 0x0 0x20000000 0x10000000 111 0x2 0x0 0x30000000 0x10000000 112 0x3 0x0 0x40000000 0x10000000 113 0x4 0x0 0x50000000 0x10000000 114 0x5 0x0 0x60000000 0x10000000>; 115 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 116 status = "disabled"; 117 118 nand_controller: nand-controller { 119 compatible = "atmel,at91sam9g45-nand-controller"; 120 #address-cells = <2>; 121 #size-cells = <1>; 122 ranges; 123 status = "disabled"; 124 }; 125 }; 126 127 apb { 128 compatible = "simple-bus"; 129 #address-cells = <1>; 130 #size-cells = <1>; 131 ranges; 132 133 tcb0: timer@fffa0000 { 134 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 135 #address-cells = <1>; 136 #size-cells = <0>; 137 reg = <0xfffa0000 0x100>; 138 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, 139 <17 IRQ_TYPE_LEVEL_HIGH 0>, 140 <18 IRQ_TYPE_LEVEL_HIGH 0>; 141 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 142 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 143 }; 144 145 mmc0: mmc@fffa4000 { 146 compatible = "atmel,hsmci"; 147 reg = <0xfffa4000 0x600>; 148 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 149 #address-cells = <1>; 150 #size-cells = <0>; 151 pinctrl-names = "default"; 152 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 153 clock-names = "mci_clk"; 154 status = "disabled"; 155 }; 156 157 i2c0: i2c@fffa8000 { 158 compatible = "atmel,at91sam9260-i2c"; 159 reg = <0xfffa8000 0x100>; 160 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; 161 #address-cells = <1>; 162 #size-cells = <0>; 163 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 164 status = "disabled"; 165 }; 166 167 i2c1: i2c@fffac000 { 168 compatible = "atmel,at91sam9260-i2c"; 169 reg = <0xfffac000 0x100>; 170 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 171 #address-cells = <1>; 172 #size-cells = <0>; 173 status = "disabled"; 174 }; 175 176 usart0: serial@fffb0000 { 177 compatible = "atmel,at91sam9260-usart"; 178 reg = <0xfffb0000 0x200>; 179 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 180 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 181 atmel,use-dma-rx; 182 atmel,use-dma-tx; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&pinctrl_usart0>; 185 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 186 clock-names = "usart"; 187 status = "disabled"; 188 }; 189 190 usart1: serial@fffb4000 { 191 compatible = "atmel,at91sam9260-usart"; 192 reg = <0xfffb4000 0x200>; 193 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 194 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 195 atmel,use-dma-rx; 196 atmel,use-dma-tx; 197 pinctrl-names = "default"; 198 pinctrl-0 = <&pinctrl_usart1>; 199 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 200 clock-names = "usart"; 201 status = "disabled"; 202 }; 203 204 usart2: serial@fffb8000 { 205 compatible = "atmel,at91sam9260-usart"; 206 reg = <0xfffb8000 0x200>; 207 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 208 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 209 atmel,use-dma-rx; 210 atmel,use-dma-tx; 211 pinctrl-names = "default"; 212 pinctrl-0 = <&pinctrl_usart2>; 213 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 214 clock-names = "usart"; 215 status = "disabled"; 216 }; 217 218 usart3: serial@fffbc000 { 219 compatible = "atmel,at91sam9260-usart"; 220 reg = <0xfffbc000 0x200>; 221 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 222 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 223 atmel,use-dma-rx; 224 atmel,use-dma-tx; 225 pinctrl-names = "default"; 226 pinctrl-0 = <&pinctrl_usart3>; 227 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 228 clock-names = "usart"; 229 status = "disabled"; 230 }; 231 232 ssc0: ssc@fffc0000 { 233 compatible = "atmel,at91sam9rl-ssc"; 234 reg = <0xfffc0000 0x4000>; 235 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 238 status = "disabled"; 239 }; 240 241 ssc1: ssc@fffc4000 { 242 compatible = "atmel,at91sam9rl-ssc"; 243 reg = <0xfffc4000 0x4000>; 244 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 245 pinctrl-names = "default"; 246 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 247 status = "disabled"; 248 }; 249 250 pwm0: pwm@fffc8000 { 251 compatible = "atmel,at91sam9rl-pwm"; 252 reg = <0xfffc8000 0x300>; 253 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; 254 #pwm-cells = <3>; 255 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 256 clock-names = "pwm_clk"; 257 status = "disabled"; 258 }; 259 260 spi0: spi@fffcc000 { 261 #address-cells = <1>; 262 #size-cells = <0>; 263 compatible = "atmel,at91rm9200-spi"; 264 reg = <0xfffcc000 0x200>; 265 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 266 pinctrl-names = "default"; 267 pinctrl-0 = <&pinctrl_spi0>; 268 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 269 clock-names = "spi_clk"; 270 status = "disabled"; 271 }; 272 273 adc0: adc@fffd0000 { 274 compatible = "atmel,at91sam9rl-adc"; 275 reg = <0xfffd0000 0x100>; 276 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 277 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; 278 clock-names = "adc_clk", "adc_op_clk"; 279 atmel,adc-use-external-triggers; 280 atmel,adc-channels-used = <0x3f>; 281 atmel,adc-vref = <3300>; 282 atmel,adc-startup-time = <40>; 283 }; 284 285 usb0: gadget@fffd4000 { 286 compatible = "atmel,at91sam9rl-udc"; 287 reg = <0x00600000 0x100000>, 288 <0xfffd4000 0x4000>; 289 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 290 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 291 clock-names = "pclk", "hclk"; 292 status = "disabled"; 293 }; 294 295 dma0: dma-controller@ffffe600 { 296 compatible = "atmel,at91sam9rl-dma"; 297 reg = <0xffffe600 0x200>; 298 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 299 #dma-cells = <2>; 300 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 301 clock-names = "dma_clk"; 302 }; 303 304 ramc0: ramc@ffffea00 { 305 compatible = "atmel,at91sam9260-sdramc"; 306 reg = <0xffffea00 0x200>; 307 }; 308 309 smc: smc@ffffec00 { 310 compatible = "atmel,at91sam9260-smc", "syscon"; 311 reg = <0xffffec00 0x200>; 312 }; 313 314 matrix: matrix@ffffee00 { 315 compatible = "atmel,at91sam9rl-matrix", "syscon"; 316 reg = <0xffffee00 0x200>; 317 }; 318 319 aic: interrupt-controller@fffff000 { 320 #interrupt-cells = <3>; 321 compatible = "atmel,at91rm9200-aic"; 322 interrupt-controller; 323 reg = <0xfffff000 0x200>; 324 atmel,external-irqs = <31>; 325 }; 326 327 dbgu: serial@fffff200 { 328 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 329 reg = <0xfffff200 0x200>; 330 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 331 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 332 pinctrl-names = "default"; 333 pinctrl-0 = <&pinctrl_dbgu>; 334 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 335 clock-names = "usart"; 336 status = "disabled"; 337 }; 338 339 pinctrl@fffff400 { 340 #address-cells = <1>; 341 #size-cells = <1>; 342 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 343 ranges = <0xfffff400 0xfffff400 0x800>; 344 345 atmel,mux-mask = 346 /* A B */ 347 <0xffffffff 0xe05c6738>, /* pioA */ 348 <0xffffffff 0x0000c780>, /* pioB */ 349 <0xffffffff 0xe3ffff0e>, /* pioC */ 350 <0x003fffff 0x0001ff3c>; /* pioD */ 351 352 /* shared pinctrl settings */ 353 adc0 { 354 pinctrl_adc0_ts: adc0_ts-0 { 355 atmel,pins = 356 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, 357 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, 358 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, 359 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 360 }; 361 362 pinctrl_adc0_ad0: adc0_ad0-0 { 363 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; 364 }; 365 366 pinctrl_adc0_ad1: adc0_ad1-0 { 367 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 368 }; 369 370 pinctrl_adc0_ad2: adc0_ad2-0 { 371 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; 372 }; 373 374 pinctrl_adc0_ad3: adc0_ad3-0 { 375 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 376 }; 377 378 pinctrl_adc0_ad4: adc0_ad4-0 { 379 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; 380 }; 381 382 pinctrl_adc0_ad5: adc0_ad5-0 { 383 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; 384 }; 385 386 pinctrl_adc0_adtrg: adc0_adtrg-0 { 387 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 388 }; 389 }; 390 391 dbgu { 392 pinctrl_dbgu: dbgu-0 { 393 atmel,pins = 394 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 395 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 396 }; 397 }; 398 399 ebi { 400 pinctrl_ebi_addr_nand: ebi-addr-0 { 401 atmel,pins = 402 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, 403 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; 404 }; 405 }; 406 407 fb { 408 pinctrl_fb: fb-0 { 409 atmel,pins = 410 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, 411 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, 412 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, 413 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, 414 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 415 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, 416 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, 417 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, 418 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, 419 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, 420 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, 421 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, 422 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, 423 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, 424 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, 425 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, 426 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, 427 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, 428 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, 429 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, 430 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; 431 }; 432 }; 433 434 i2c_gpio0 { 435 pinctrl_i2c_gpio0: i2c_gpio0-0 { 436 atmel,pins = 437 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, 438 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 439 }; 440 }; 441 442 i2c_gpio1 { 443 pinctrl_i2c_gpio1: i2c_gpio1-0 { 444 atmel,pins = 445 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, 446 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 447 }; 448 }; 449 450 mmc0 { 451 pinctrl_mmc0_clk: mmc0_clk-0 { 452 atmel,pins = 453 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 454 }; 455 456 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 457 atmel,pins = 458 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 459 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 460 }; 461 462 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 463 atmel,pins = 464 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 465 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 466 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 467 }; 468 }; 469 470 nand { 471 pinctrl_nand_rb: nand-rb-0 { 472 atmel,pins = 473 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 474 }; 475 476 pinctrl_nand_cs: nand-cs-0 { 477 atmel,pins = 478 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 479 }; 480 481 pinctrl_nand_oe_we: nand-oe-we-0 { 482 atmel,pins = 483 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, 484 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; 485 }; 486 }; 487 488 pwm0 { 489 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { 490 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 491 }; 492 493 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { 494 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 495 }; 496 497 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { 498 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 499 }; 500 501 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { 502 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 503 }; 504 505 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { 506 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 507 }; 508 509 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { 510 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; 511 }; 512 513 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { 514 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 515 }; 516 517 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { 518 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; 519 }; 520 521 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { 522 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 523 }; 524 525 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { 526 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 527 }; 528 529 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { 530 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 531 }; 532 }; 533 534 spi0 { 535 pinctrl_spi0: spi0-0 { 536 atmel,pins = 537 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, 538 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, 539 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 540 }; 541 }; 542 543 ssc0 { 544 pinctrl_ssc0_tx: ssc0_tx-0 { 545 atmel,pins = 546 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, 547 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, 548 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; 549 }; 550 551 pinctrl_ssc0_rx: ssc0_rx-0 { 552 atmel,pins = 553 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, 554 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, 555 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 556 }; 557 }; 558 559 ssc1 { 560 pinctrl_ssc1_tx: ssc1_tx-0 { 561 atmel,pins = 562 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, 563 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, 564 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 565 }; 566 567 pinctrl_ssc1_rx: ssc1_rx-0 { 568 atmel,pins = 569 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, 570 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, 571 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 572 }; 573 }; 574 575 tcb0 { 576 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 577 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 578 }; 579 580 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 581 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; 582 }; 583 584 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 585 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 586 }; 587 588 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 589 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 590 }; 591 592 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 593 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; 594 }; 595 596 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 597 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 598 }; 599 600 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 601 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 602 }; 603 604 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 605 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 606 }; 607 608 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 609 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; 610 }; 611 }; 612 613 usart0 { 614 pinctrl_usart0: usart0-0 { 615 atmel,pins = 616 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 617 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 618 }; 619 620 pinctrl_usart0_rts: usart0_rts-0 { 621 atmel,pins = 622 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 623 }; 624 625 pinctrl_usart0_cts: usart0_cts-0 { 626 atmel,pins = 627 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 628 }; 629 630 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { 631 atmel,pins = 632 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, 633 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 634 }; 635 636 pinctrl_usart0_dcd: usart0_dcd-0 { 637 atmel,pins = 638 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; 639 }; 640 641 pinctrl_usart0_ri: usart0_ri-0 { 642 atmel,pins = 643 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; 644 }; 645 646 pinctrl_usart0_sck: usart0_sck-0 { 647 atmel,pins = 648 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; 649 }; 650 }; 651 652 usart1 { 653 pinctrl_usart1: usart1-0 { 654 atmel,pins = 655 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 656 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 657 }; 658 659 pinctrl_usart1_rts: usart1_rts-0 { 660 atmel,pins = 661 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 662 }; 663 664 pinctrl_usart1_cts: usart1_cts-0 { 665 atmel,pins = 666 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 667 }; 668 669 pinctrl_usart1_sck: usart1_sck-0 { 670 atmel,pins = 671 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 672 }; 673 }; 674 675 usart2 { 676 pinctrl_usart2: usart2-0 { 677 atmel,pins = 678 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 679 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 680 }; 681 682 pinctrl_usart2_rts: usart2_rts-0 { 683 atmel,pins = 684 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 685 }; 686 687 pinctrl_usart2_cts: usart2_cts-0 { 688 atmel,pins = 689 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 690 }; 691 692 pinctrl_usart2_sck: usart2_sck-0 { 693 atmel,pins = 694 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 695 }; 696 }; 697 698 usart3 { 699 pinctrl_usart3: usart3-0 { 700 atmel,pins = 701 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 702 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 703 }; 704 705 pinctrl_usart3_rts: usart3_rts-0 { 706 atmel,pins = 707 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 708 }; 709 710 pinctrl_usart3_cts: usart3_cts-0 { 711 atmel,pins = 712 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 713 }; 714 715 pinctrl_usart3_sck: usart3_sck-0 { 716 atmel,pins = 717 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; 718 }; 719 }; 720 721 pioA: gpio@fffff400 { 722 compatible = "atmel,at91rm9200-gpio"; 723 reg = <0xfffff400 0x200>; 724 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 725 #gpio-cells = <2>; 726 gpio-controller; 727 interrupt-controller; 728 #interrupt-cells = <2>; 729 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 730 }; 731 732 pioB: gpio@fffff600 { 733 compatible = "atmel,at91rm9200-gpio"; 734 reg = <0xfffff600 0x200>; 735 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 736 #gpio-cells = <2>; 737 gpio-controller; 738 interrupt-controller; 739 #interrupt-cells = <2>; 740 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 741 }; 742 743 pioC: gpio@fffff800 { 744 compatible = "atmel,at91rm9200-gpio"; 745 reg = <0xfffff800 0x200>; 746 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 747 #gpio-cells = <2>; 748 gpio-controller; 749 interrupt-controller; 750 #interrupt-cells = <2>; 751 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 752 }; 753 754 pioD: gpio@fffffa00 { 755 compatible = "atmel,at91rm9200-gpio"; 756 reg = <0xfffffa00 0x200>; 757 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 758 #gpio-cells = <2>; 759 gpio-controller; 760 interrupt-controller; 761 #interrupt-cells = <2>; 762 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 763 }; 764 }; 765 766 pmc: clock-controller@fffffc00 { 767 compatible = "atmel,at91sam9rl-pmc", "syscon"; 768 reg = <0xfffffc00 0x100>; 769 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 770 #clock-cells = <2>; 771 clocks = <&clk32k>, <&main_xtal>; 772 clock-names = "slow_clk", "main_xtal"; 773 }; 774 775 reset-controller@fffffd00 { 776 compatible = "atmel,at91sam9260-rstc"; 777 reg = <0xfffffd00 0x10>; 778 clocks = <&clk32k>; 779 }; 780 781 poweroff@fffffd10 { 782 compatible = "atmel,at91sam9260-shdwc"; 783 reg = <0xfffffd10 0x10>; 784 clocks = <&clk32k>; 785 }; 786 787 pit: timer@fffffd30 { 788 compatible = "atmel,at91sam9260-pit"; 789 reg = <0xfffffd30 0xf>; 790 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 791 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 792 }; 793 794 watchdog@fffffd40 { 795 compatible = "atmel,at91sam9260-wdt"; 796 reg = <0xfffffd40 0x10>; 797 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 798 clocks = <&clk32k>; 799 status = "disabled"; 800 }; 801 802 clk32k: clock-controller@fffffd50 { 803 compatible = "atmel,at91sam9x5-sckc"; 804 reg = <0xfffffd50 0x4>; 805 clocks = <&slow_xtal>; 806 #clock-cells = <0>; 807 }; 808 809 rtc@fffffd20 { 810 compatible = "atmel,at91sam9260-rtt"; 811 reg = <0xfffffd20 0x10>; 812 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 813 clocks = <&clk32k>; 814 status = "disabled"; 815 }; 816 817 gpbr: syscon@fffffd60 { 818 compatible = "atmel,at91sam9260-gpbr", "syscon"; 819 reg = <0xfffffd60 0x10>; 820 status = "disabled"; 821 }; 822 823 rtc@fffffe00 { 824 compatible = "atmel,at91rm9200-rtc"; 825 reg = <0xfffffe00 0x40>; 826 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 827 clocks = <&clk32k>; 828 status = "disabled"; 829 }; 830 831 }; 832 }; 833 834 i2c-gpio-0 { 835 compatible = "i2c-gpio"; 836 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ 837 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ 838 i2c-gpio,sda-open-drain; 839 i2c-gpio,scl-open-drain; 840 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 841 #address-cells = <1>; 842 #size-cells = <0>; 843 pinctrl-names = "default"; 844 pinctrl-0 = <&pinctrl_i2c_gpio0>; 845 status = "disabled"; 846 }; 847 848 i2c-gpio-1 { 849 compatible = "i2c-gpio"; 850 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ 851 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ 852 i2c-gpio,sda-open-drain; 853 i2c-gpio,scl-open-drain; 854 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 855 #address-cells = <1>; 856 #size-cells = <0>; 857 pinctrl-names = "default"; 858 pinctrl-0 = <&pinctrl_i2c_gpio1>; 859 status = "disabled"; 860 }; 861}; 862