1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring// Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 3*724ba675SRob Herring 4*724ba675SRob Herring/dts-v1/; 5*724ba675SRob Herring 6*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 7*724ba675SRob Herring#include "orion5x-mv88f5182.dtsi" 8*724ba675SRob Herring 9*724ba675SRob Herring/ { 10*724ba675SRob Herring model = "Marvell Reference Design 88F5182 NAS"; 11*724ba675SRob Herring compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x"; 12*724ba675SRob Herring 13*724ba675SRob Herring memory { 14*724ba675SRob Herring device_type = "memory"; 15*724ba675SRob Herring reg = <0x00000000 0x4000000>; /* 64 MB */ 16*724ba675SRob Herring }; 17*724ba675SRob Herring 18*724ba675SRob Herring chosen { 19*724ba675SRob Herring bootargs = "console=ttyS0,115200n8 earlyprintk"; 20*724ba675SRob Herring stdout-path = &uart0; 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring soc { 24*724ba675SRob Herring ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>, 25*724ba675SRob Herring <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, 26*724ba675SRob Herring <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x80000>, 27*724ba675SRob Herring <MBUS_ID(0x01, 0x1d) 0 0xfc000000 0x1000000>; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring gpio-leds { 31*724ba675SRob Herring compatible = "gpio-leds"; 32*724ba675SRob Herring pinctrl-0 = <&pmx_debug_led>; 33*724ba675SRob Herring pinctrl-names = "default"; 34*724ba675SRob Herring 35*724ba675SRob Herring led@0 { 36*724ba675SRob Herring label = "rd88f5182:cpu"; 37*724ba675SRob Herring linux,default-trigger = "heartbeat"; 38*724ba675SRob Herring gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 39*724ba675SRob Herring }; 40*724ba675SRob Herring }; 41*724ba675SRob Herring}; 42*724ba675SRob Herring 43*724ba675SRob Herring&devbus_bootcs { 44*724ba675SRob Herring status = "okay"; 45*724ba675SRob Herring 46*724ba675SRob Herring /* Read parameters */ 47*724ba675SRob Herring devbus,bus-width = <8>; 48*724ba675SRob Herring devbus,turn-off-ps = <90000>; 49*724ba675SRob Herring devbus,badr-skew-ps = <0>; 50*724ba675SRob Herring devbus,acc-first-ps = <186000>; 51*724ba675SRob Herring devbus,acc-next-ps = <186000>; 52*724ba675SRob Herring 53*724ba675SRob Herring /* Write parameters */ 54*724ba675SRob Herring devbus,wr-high-ps = <90000>; 55*724ba675SRob Herring devbus,wr-low-ps = <90000>; 56*724ba675SRob Herring devbus,ale-wr-ps = <90000>; 57*724ba675SRob Herring 58*724ba675SRob Herring flash@0 { 59*724ba675SRob Herring compatible = "cfi-flash"; 60*724ba675SRob Herring reg = <0 0x80000>; 61*724ba675SRob Herring bank-width = <1>; 62*724ba675SRob Herring }; 63*724ba675SRob Herring}; 64*724ba675SRob Herring 65*724ba675SRob Herring&devbus_cs1 { 66*724ba675SRob Herring status = "okay"; 67*724ba675SRob Herring 68*724ba675SRob Herring /* Read parameters */ 69*724ba675SRob Herring devbus,bus-width = <8>; 70*724ba675SRob Herring devbus,turn-off-ps = <90000>; 71*724ba675SRob Herring devbus,badr-skew-ps = <0>; 72*724ba675SRob Herring devbus,acc-first-ps = <186000>; 73*724ba675SRob Herring devbus,acc-next-ps = <186000>; 74*724ba675SRob Herring 75*724ba675SRob Herring /* Write parameters */ 76*724ba675SRob Herring devbus,wr-high-ps = <90000>; 77*724ba675SRob Herring devbus,wr-low-ps = <90000>; 78*724ba675SRob Herring devbus,ale-wr-ps = <90000>; 79*724ba675SRob Herring 80*724ba675SRob Herring flash@0 { 81*724ba675SRob Herring compatible = "cfi-flash"; 82*724ba675SRob Herring reg = <0 0x1000000>; 83*724ba675SRob Herring bank-width = <1>; 84*724ba675SRob Herring }; 85*724ba675SRob Herring}; 86*724ba675SRob Herring 87*724ba675SRob Herring&ehci0 { 88*724ba675SRob Herring status = "okay"; 89*724ba675SRob Herring}; 90*724ba675SRob Herring 91*724ba675SRob Herring&ehci1 { 92*724ba675SRob Herring status = "okay"; 93*724ba675SRob Herring}; 94*724ba675SRob Herring 95*724ba675SRob Herringð { 96*724ba675SRob Herring status = "okay"; 97*724ba675SRob Herring 98*724ba675SRob Herring ethernet-port@0 { 99*724ba675SRob Herring phy-handle = <ðphy>; 100*724ba675SRob Herring }; 101*724ba675SRob Herring}; 102*724ba675SRob Herring 103*724ba675SRob Herring&i2c { 104*724ba675SRob Herring status = "okay"; 105*724ba675SRob Herring clock-frequency = <100000>; 106*724ba675SRob Herring #address-cells = <1>; 107*724ba675SRob Herring 108*724ba675SRob Herring rtc@68 { 109*724ba675SRob Herring pinctrl-0 = <&pmx_rtc>; 110*724ba675SRob Herring pinctrl-names = "default"; 111*724ba675SRob Herring compatible = "dallas,ds1338"; 112*724ba675SRob Herring reg = <0x68>; 113*724ba675SRob Herring }; 114*724ba675SRob Herring}; 115*724ba675SRob Herring 116*724ba675SRob Herring&mdio { 117*724ba675SRob Herring status = "okay"; 118*724ba675SRob Herring 119*724ba675SRob Herring ethphy: ethernet-phy { 120*724ba675SRob Herring reg = <8>; 121*724ba675SRob Herring }; 122*724ba675SRob Herring}; 123*724ba675SRob Herring 124*724ba675SRob Herring&pinctrl { 125*724ba675SRob Herring pinctrl-0 = <&pmx_reset_switch &pmx_misc_gpios 126*724ba675SRob Herring &pmx_pci_gpios>; 127*724ba675SRob Herring pinctrl-names = "default"; 128*724ba675SRob Herring 129*724ba675SRob Herring /* 130*724ba675SRob Herring * MPP[20] PCI Clock to MV88F5182 131*724ba675SRob Herring * MPP[21] PCI Clock to mini PCI CON11 132*724ba675SRob Herring * MPP[22] USB 0 over current indication 133*724ba675SRob Herring * MPP[23] USB 1 over current indication 134*724ba675SRob Herring * MPP[24] USB 1 over current enable 135*724ba675SRob Herring * MPP[25] USB 0 over current enable 136*724ba675SRob Herring */ 137*724ba675SRob Herring 138*724ba675SRob Herring pmx_debug_led: pmx-debug_led { 139*724ba675SRob Herring marvell,pins = "mpp0"; 140*724ba675SRob Herring marvell,function = "gpio"; 141*724ba675SRob Herring }; 142*724ba675SRob Herring 143*724ba675SRob Herring pmx_reset_switch: pmx-reset-switch { 144*724ba675SRob Herring marvell,pins = "mpp1"; 145*724ba675SRob Herring marvell,function = "gpio"; 146*724ba675SRob Herring }; 147*724ba675SRob Herring 148*724ba675SRob Herring pmx_rtc: pmx-rtc { 149*724ba675SRob Herring marvell,pins = "mpp3"; 150*724ba675SRob Herring marvell,function = "gpio"; 151*724ba675SRob Herring }; 152*724ba675SRob Herring 153*724ba675SRob Herring pmx_misc_gpios: pmx-misc-gpios { 154*724ba675SRob Herring marvell,pins = "mpp4", "mpp5"; 155*724ba675SRob Herring marvell,function = "gpio"; 156*724ba675SRob Herring }; 157*724ba675SRob Herring 158*724ba675SRob Herring pmx_pci_gpios: pmx-pci-gpios { 159*724ba675SRob Herring marvell,pins = "mpp6", "mpp7"; 160*724ba675SRob Herring marvell,function = "gpio"; 161*724ba675SRob Herring }; 162*724ba675SRob Herring}; 163*724ba675SRob Herring 164*724ba675SRob Herring&sata { 165*724ba675SRob Herring pinctrl-0 = <&pmx_sata0 &pmx_sata1>; 166*724ba675SRob Herring pinctrl-names = "default"; 167*724ba675SRob Herring status = "okay"; 168*724ba675SRob Herring nr-ports = <2>; 169*724ba675SRob Herring}; 170*724ba675SRob Herring 171*724ba675SRob Herring&uart0 { 172*724ba675SRob Herring status = "okay"; 173*724ba675SRob Herring}; 174