1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring// Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 3*724ba675SRob Herring 4*724ba675SRob Herring#include "orion5x.dtsi" 5*724ba675SRob Herring 6*724ba675SRob Herring/ { 7*724ba675SRob Herring compatible = "marvell,orion5x-88f5182", "marvell,orion5x"; 8*724ba675SRob Herring 9*724ba675SRob Herring soc { 10*724ba675SRob Herring compatible = "marvell,orion5x-88f5182-mbus", "simple-bus"; 11*724ba675SRob Herring 12*724ba675SRob Herring internal-regs { 13*724ba675SRob Herring pinctrl: pinctrl@10000 { 14*724ba675SRob Herring compatible = "marvell,88f5182-pinctrl"; 15*724ba675SRob Herring reg = <0x10000 0x8>, <0x10050 0x4>; 16*724ba675SRob Herring 17*724ba675SRob Herring pmx_sata0: pmx-sata0 { 18*724ba675SRob Herring marvell,pins = "mpp12", "mpp14"; 19*724ba675SRob Herring marvell,function = "sata0"; 20*724ba675SRob Herring }; 21*724ba675SRob Herring 22*724ba675SRob Herring pmx_sata1: pmx-sata1 { 23*724ba675SRob Herring marvell,pins = "mpp13", "mpp15"; 24*724ba675SRob Herring marvell,function = "sata1"; 25*724ba675SRob Herring }; 26*724ba675SRob Herring }; 27*724ba675SRob Herring 28*724ba675SRob Herring core_clk: core-clocks@10030 { 29*724ba675SRob Herring compatible = "marvell,mv88f5182-core-clock"; 30*724ba675SRob Herring reg = <0x10010 0x4>; 31*724ba675SRob Herring #clock-cells = <1>; 32*724ba675SRob Herring }; 33*724ba675SRob Herring 34*724ba675SRob Herring mbusc: mbus-controller@20000 { 35*724ba675SRob Herring compatible = "marvell,mbus-controller"; 36*724ba675SRob Herring reg = <0x20000 0x100>, <0x1500 0x20>; 37*724ba675SRob Herring }; 38*724ba675SRob Herring }; 39*724ba675SRob Herring }; 40*724ba675SRob Herring}; 41