1// SPDX-License-Identifier: GPL-2.0
2/ {
3	mbus@f1000000 {
4		pciec: pcie@82000000 {
5			compatible = "marvell,kirkwood-pcie";
6			status = "disabled";
7			device_type = "pci";
8
9			#address-cells = <3>;
10			#size-cells = <2>;
11
12			bus-range = <0x00 0xff>;
13
14			ranges =
15			       <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16			        0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
17				0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
18				0x82000000 0x1 0     MBUS_ID(0x04, 0xe8) 0       1 0 /* Port 0.0 MEM */
19				0x81000000 0x1 0     MBUS_ID(0x04, 0xe0) 0       1 0 /* Port 0.0 IO  */
20				0x82000000 0x2 0     MBUS_ID(0x04, 0xd8) 0       1 0 /* Port 1.0 MEM */
21				0x81000000 0x2 0     MBUS_ID(0x04, 0xd0) 0       1 0 /* Port 1.0 IO  */>;
22
23			pcie0: pcie@1,0 {
24				device_type = "pci";
25				assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
26				reg = <0x0800 0 0 0 0>;
27				#address-cells = <3>;
28				#size-cells = <2>;
29				#interrupt-cells = <1>;
30				ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
31					  0x81000000 0 0 0x81000000 0x1 0 1 0>;
32				bus-range = <0x00 0xff>;
33				interrupt-names = "intx", "error";
34				interrupts = <9>, <44>;
35				interrupt-map-mask = <0 0 0 7>;
36				interrupt-map = <0 0 0 1 &pcie0_intc 0>,
37						<0 0 0 2 &pcie0_intc 1>,
38						<0 0 0 3 &pcie0_intc 2>,
39						<0 0 0 4 &pcie0_intc 3>;
40				marvell,pcie-port = <0>;
41				marvell,pcie-lane = <0>;
42				clocks = <&gate_clk 2>;
43				status = "disabled";
44
45				pcie0_intc: interrupt-controller {
46					interrupt-controller;
47					#interrupt-cells = <1>;
48				};
49			};
50
51			pcie1: pcie@2,0 {
52				device_type = "pci";
53				assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
54				reg = <0x1000 0 0 0 0>;
55				#address-cells = <3>;
56				#size-cells = <2>;
57				#interrupt-cells = <1>;
58				ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
59					  0x81000000 0 0 0x81000000 0x2 0 1 0>;
60				bus-range = <0x00 0xff>;
61				interrupt-names = "intx", "error";
62				interrupts = <10>, <45>;
63				interrupt-map-mask = <0 0 0 7>;
64				interrupt-map = <0 0 0 1 &pcie1_intc 0>,
65						<0 0 0 2 &pcie1_intc 1>,
66						<0 0 0 3 &pcie1_intc 2>,
67						<0 0 0 4 &pcie1_intc 3>;
68				marvell,pcie-port = <1>;
69				marvell,pcie-lane = <0>;
70				clocks = <&gate_clk 18>;
71				status = "disabled";
72
73				pcie1_intc: interrupt-controller {
74					interrupt-controller;
75					#interrupt-cells = <1>;
76				};
77			};
78		};
79	};
80	ocp@f1000000 {
81
82		pinctrl: pin-controller@10000 {
83			compatible = "marvell,88f6282-pinctrl";
84
85			pmx_sata0: pmx-sata0 {
86				marvell,pins = "mpp5", "mpp21", "mpp23";
87				marvell,function = "sata0";
88			};
89			pmx_sata1: pmx-sata1 {
90				marvell,pins = "mpp4", "mpp20", "mpp22";
91				marvell,function = "sata1";
92			};
93
94			/*
95			 * Default I2C1 pinctrl setting on mpp36/mpp37,
96			 * overwrite marvell,pins on board level if required.
97			 */
98			pmx_twsi1: pmx-twsi1 {
99				marvell,pins = "mpp36", "mpp37";
100				marvell,function = "twsi1";
101			};
102
103			pmx_sdio: pmx-sdio {
104				marvell,pins = "mpp12", "mpp13", "mpp14",
105					       "mpp15", "mpp16", "mpp17";
106				marvell,function = "sdio";
107			};
108		};
109
110		thermal: thermal@10078 {
111			compatible = "marvell,kirkwood-thermal";
112			reg = <0x10078 0x4>;
113			status = "okay";
114		};
115
116		rtc: rtc@10300 {
117			compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
118			reg = <0x10300 0x20>;
119			interrupts = <53>;
120			clocks = <&gate_clk 7>;
121		};
122
123		i2c1: i2c@11100 {
124			compatible = "marvell,mv64xxx-i2c";
125			reg = <0x11100 0x20>;
126			#address-cells = <1>;
127			#size-cells = <0>;
128			interrupts = <32>;
129			clock-frequency = <100000>;
130			clocks = <&gate_clk 7>;
131			pinctrl-0 = <&pmx_twsi1>;
132			pinctrl-names = "default";
133			status = "disabled";
134		};
135
136		sata: sata@80000 {
137			compatible = "marvell,orion-sata";
138			reg = <0x80000 0x5000>;
139			interrupts = <21>;
140			clocks = <&gate_clk 14>, <&gate_clk 15>;
141			clock-names = "0", "1";
142			phys = <&sata_phy0>, <&sata_phy1>;
143			phy-names = "port0", "port1";
144			status = "disabled";
145		};
146
147		sdio: mvsdio@90000 {
148			compatible = "marvell,orion-sdio";
149			reg = <0x90000 0x200>;
150			interrupts = <28>;
151			clocks = <&gate_clk 4>;
152			pinctrl-0 = <&pmx_sdio>;
153			pinctrl-names = "default";
154			bus-width = <4>;
155			cap-sdio-irq;
156			cap-sd-highspeed;
157			cap-mmc-highspeed;
158			status = "disabled";
159		};
160	};
161};
162