1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree file for the Linksys WRT1900AC (Mamba).
4*724ba675SRob Herring *
5*724ba675SRob Herring * Note: this board is shipped with a new generation boot loader that
6*724ba675SRob Herring * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
7*724ba675SRob Herring * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be
8*724ba675SRob Herring * used.
9*724ba675SRob Herring *
10*724ba675SRob Herring * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
11*724ba675SRob Herring *
12*724ba675SRob Herring * Based on armada-xp-axpwifiap.dts:
13*724ba675SRob Herring *
14*724ba675SRob Herring *     Copyright (C) 2013 Marvell
15*724ba675SRob Herring *
16*724ba675SRob Herring *     Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
17*724ba675SRob Herring */
18*724ba675SRob Herring
19*724ba675SRob Herring/dts-v1/;
20*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
21*724ba675SRob Herring#include <dt-bindings/input/input.h>
22*724ba675SRob Herring#include "armada-xp-mv78230.dtsi"
23*724ba675SRob Herring
24*724ba675SRob Herring/ {
25*724ba675SRob Herring	model = "Linksys WRT1900AC";
26*724ba675SRob Herring	compatible = "linksys,mamba", "marvell,armadaxp-mv78230",
27*724ba675SRob Herring		     "marvell,armadaxp", "marvell,armada-370-xp";
28*724ba675SRob Herring
29*724ba675SRob Herring	chosen {
30*724ba675SRob Herring		bootargs = "console=ttyS0,115200";
31*724ba675SRob Herring		stdout-path = &uart0;
32*724ba675SRob Herring	};
33*724ba675SRob Herring
34*724ba675SRob Herring	memory@0 {
35*724ba675SRob Herring		device_type = "memory";
36*724ba675SRob Herring		reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
37*724ba675SRob Herring	};
38*724ba675SRob Herring
39*724ba675SRob Herring	soc {
40*724ba675SRob Herring		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
41*724ba675SRob Herring			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
42*724ba675SRob Herring			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
43*724ba675SRob Herring			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
44*724ba675SRob Herring			  MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
45*724ba675SRob Herring
46*724ba675SRob Herring		internal-regs {
47*724ba675SRob Herring
48*724ba675SRob Herring			rtc@10300 {
49*724ba675SRob Herring				/* No crystal connected to the internal RTC */
50*724ba675SRob Herring				status = "disabled";
51*724ba675SRob Herring			};
52*724ba675SRob Herring
53*724ba675SRob Herring			/* J10: VCC, NC, RX, NC, TX, GND  */
54*724ba675SRob Herring			serial@12000 {
55*724ba675SRob Herring				status = "okay";
56*724ba675SRob Herring			};
57*724ba675SRob Herring
58*724ba675SRob Herring			sata@a0000 {
59*724ba675SRob Herring				nr-ports = <1>;
60*724ba675SRob Herring				status = "okay";
61*724ba675SRob Herring			};
62*724ba675SRob Herring
63*724ba675SRob Herring			ethernet@70000 {
64*724ba675SRob Herring				pinctrl-0 = <&ge0_rgmii_pins>;
65*724ba675SRob Herring				pinctrl-names = "default";
66*724ba675SRob Herring				status = "okay";
67*724ba675SRob Herring				phy-mode = "rgmii-id";
68*724ba675SRob Herring				buffer-manager = <&bm>;
69*724ba675SRob Herring				bm,pool-long = <0>;
70*724ba675SRob Herring				bm,pool-short = <1>;
71*724ba675SRob Herring				fixed-link {
72*724ba675SRob Herring					speed = <1000>;
73*724ba675SRob Herring					full-duplex;
74*724ba675SRob Herring				};
75*724ba675SRob Herring			};
76*724ba675SRob Herring
77*724ba675SRob Herring			ethernet@74000 {
78*724ba675SRob Herring				pinctrl-0 = <&ge1_rgmii_pins>;
79*724ba675SRob Herring				pinctrl-names = "default";
80*724ba675SRob Herring				status = "okay";
81*724ba675SRob Herring				phy-mode = "rgmii-id";
82*724ba675SRob Herring				buffer-manager = <&bm>;
83*724ba675SRob Herring				bm,pool-long = <2>;
84*724ba675SRob Herring				bm,pool-short = <3>;
85*724ba675SRob Herring				fixed-link {
86*724ba675SRob Herring					speed = <1000>;
87*724ba675SRob Herring					full-duplex;
88*724ba675SRob Herring				};
89*724ba675SRob Herring			};
90*724ba675SRob Herring
91*724ba675SRob Herring			/* USB part of the eSATA/USB 2.0 port */
92*724ba675SRob Herring			usb@50000 {
93*724ba675SRob Herring				status = "okay";
94*724ba675SRob Herring			};
95*724ba675SRob Herring
96*724ba675SRob Herring			i2c@11000 {
97*724ba675SRob Herring				status = "okay";
98*724ba675SRob Herring				clock-frequency = <100000>;
99*724ba675SRob Herring
100*724ba675SRob Herring				tmp421@4c {
101*724ba675SRob Herring					compatible = "ti,tmp421";
102*724ba675SRob Herring					reg = <0x4c>;
103*724ba675SRob Herring				};
104*724ba675SRob Herring
105*724ba675SRob Herring				tlc59116@68 {
106*724ba675SRob Herring					#address-cells = <1>;
107*724ba675SRob Herring					#size-cells = <0>;
108*724ba675SRob Herring					#gpio-cells = <2>;
109*724ba675SRob Herring					compatible = "ti,tlc59116";
110*724ba675SRob Herring					reg = <0x68>;
111*724ba675SRob Herring
112*724ba675SRob Herring					wan_amber@0 {
113*724ba675SRob Herring						label = "mamba:amber:wan";
114*724ba675SRob Herring						reg = <0x0>;
115*724ba675SRob Herring					};
116*724ba675SRob Herring
117*724ba675SRob Herring					wan_white@1 {
118*724ba675SRob Herring						label = "mamba:white:wan";
119*724ba675SRob Herring						reg = <0x1>;
120*724ba675SRob Herring					};
121*724ba675SRob Herring
122*724ba675SRob Herring					wlan_2g@2 {
123*724ba675SRob Herring						label = "mamba:white:wlan_2g";
124*724ba675SRob Herring						reg = <0x2>;
125*724ba675SRob Herring					};
126*724ba675SRob Herring
127*724ba675SRob Herring					wlan_5g@3 {
128*724ba675SRob Herring						label = "mamba:white:wlan_5g";
129*724ba675SRob Herring						reg = <0x3>;
130*724ba675SRob Herring					};
131*724ba675SRob Herring
132*724ba675SRob Herring					esata@4 {
133*724ba675SRob Herring						label = "mamba:white:esata";
134*724ba675SRob Herring						reg = <0x4>;
135*724ba675SRob Herring						linux,default-trigger = "disk-activity";
136*724ba675SRob Herring					};
137*724ba675SRob Herring
138*724ba675SRob Herring					usb2@5 {
139*724ba675SRob Herring						label = "mamba:white:usb2";
140*724ba675SRob Herring						reg = <0x5>;
141*724ba675SRob Herring					};
142*724ba675SRob Herring
143*724ba675SRob Herring					usb3_1@6 {
144*724ba675SRob Herring						label = "mamba:white:usb3_1";
145*724ba675SRob Herring						reg = <0x6>;
146*724ba675SRob Herring					};
147*724ba675SRob Herring
148*724ba675SRob Herring					usb3_2@7 {
149*724ba675SRob Herring						label = "mamba:white:usb3_2";
150*724ba675SRob Herring						reg = <0x7>;
151*724ba675SRob Herring					};
152*724ba675SRob Herring
153*724ba675SRob Herring					wps_white@8 {
154*724ba675SRob Herring						label = "mamba:white:wps";
155*724ba675SRob Herring						reg = <0x8>;
156*724ba675SRob Herring					};
157*724ba675SRob Herring
158*724ba675SRob Herring					wps_amber@9 {
159*724ba675SRob Herring						label = "mamba:amber:wps";
160*724ba675SRob Herring						reg = <0x9>;
161*724ba675SRob Herring					};
162*724ba675SRob Herring				};
163*724ba675SRob Herring			};
164*724ba675SRob Herring
165*724ba675SRob Herring			bm@c8000 {
166*724ba675SRob Herring				status = "okay";
167*724ba675SRob Herring			};
168*724ba675SRob Herring		};
169*724ba675SRob Herring
170*724ba675SRob Herring		bm-bppi {
171*724ba675SRob Herring			status = "okay";
172*724ba675SRob Herring		};
173*724ba675SRob Herring	};
174*724ba675SRob Herring
175*724ba675SRob Herring	gpio-keys {
176*724ba675SRob Herring		compatible = "gpio-keys";
177*724ba675SRob Herring		pinctrl-0 = <&keys_pin>;
178*724ba675SRob Herring		pinctrl-names = "default";
179*724ba675SRob Herring
180*724ba675SRob Herring		button-wps {
181*724ba675SRob Herring			label = "WPS";
182*724ba675SRob Herring			linux,code = <KEY_WPS_BUTTON>;
183*724ba675SRob Herring			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
184*724ba675SRob Herring		};
185*724ba675SRob Herring
186*724ba675SRob Herring		button-reset {
187*724ba675SRob Herring			label = "Factory Reset Button";
188*724ba675SRob Herring			linux,code = <KEY_RESTART>;
189*724ba675SRob Herring			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
190*724ba675SRob Herring		};
191*724ba675SRob Herring	};
192*724ba675SRob Herring
193*724ba675SRob Herring	gpio-leds {
194*724ba675SRob Herring		compatible = "gpio-leds";
195*724ba675SRob Herring		pinctrl-0 = <&power_led_pin>;
196*724ba675SRob Herring		pinctrl-names = "default";
197*724ba675SRob Herring
198*724ba675SRob Herring		led-power {
199*724ba675SRob Herring			label = "mamba:white:power";
200*724ba675SRob Herring			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
201*724ba675SRob Herring			default-state = "on";
202*724ba675SRob Herring		};
203*724ba675SRob Herring	};
204*724ba675SRob Herring
205*724ba675SRob Herring	pwm_fan {
206*724ba675SRob Herring		/* SUNON HA4010V4-0000-C99 */
207*724ba675SRob Herring
208*724ba675SRob Herring		compatible = "pwm-fan";
209*724ba675SRob Herring		pwms = <&gpio0 24 4000>;
210*724ba675SRob Herring	};
211*724ba675SRob Herring};
212*724ba675SRob Herring
213*724ba675SRob Herring&pciec {
214*724ba675SRob Herring	status = "okay";
215*724ba675SRob Herring
216*724ba675SRob Herring	/* Etron EJ168 USB 3.0 controller */
217*724ba675SRob Herring	pcie@1,0 {
218*724ba675SRob Herring		/* Port 0, Lane 0 */
219*724ba675SRob Herring		status = "okay";
220*724ba675SRob Herring	};
221*724ba675SRob Herring
222*724ba675SRob Herring	/* First mini-PCIe port */
223*724ba675SRob Herring	pcie@2,0 {
224*724ba675SRob Herring		/* Port 0, Lane 1 */
225*724ba675SRob Herring		status = "okay";
226*724ba675SRob Herring	};
227*724ba675SRob Herring
228*724ba675SRob Herring	/* Second mini-PCIe port */
229*724ba675SRob Herring	pcie@3,0 {
230*724ba675SRob Herring		/* Port 0, Lane 3 */
231*724ba675SRob Herring		status = "okay";
232*724ba675SRob Herring	};
233*724ba675SRob Herring};
234*724ba675SRob Herring
235*724ba675SRob Herring&pinctrl {
236*724ba675SRob Herring
237*724ba675SRob Herring	keys_pin: keys-pin {
238*724ba675SRob Herring		marvell,pins = "mpp32", "mpp33";
239*724ba675SRob Herring		marvell,function = "gpio";
240*724ba675SRob Herring	};
241*724ba675SRob Herring
242*724ba675SRob Herring	power_led_pin: power-led-pin {
243*724ba675SRob Herring		marvell,pins = "mpp40";
244*724ba675SRob Herring		marvell,function = "gpio";
245*724ba675SRob Herring	};
246*724ba675SRob Herring
247*724ba675SRob Herring	gpio_fan_pin: gpio-fan-pin {
248*724ba675SRob Herring		marvell,pins = "mpp24";
249*724ba675SRob Herring		marvell,function = "gpio";
250*724ba675SRob Herring	};
251*724ba675SRob Herring};
252*724ba675SRob Herring
253*724ba675SRob Herring&spi0 {
254*724ba675SRob Herring	status = "okay";
255*724ba675SRob Herring
256*724ba675SRob Herring	flash@0 {
257*724ba675SRob Herring		#address-cells = <1>;
258*724ba675SRob Herring		#size-cells = <1>;
259*724ba675SRob Herring		compatible = "everspin,mr25h256";
260*724ba675SRob Herring		reg = <0>; /* Chip select 0 */
261*724ba675SRob Herring		spi-max-frequency = <40000000>;
262*724ba675SRob Herring	};
263*724ba675SRob Herring};
264*724ba675SRob Herring
265*724ba675SRob Herring&mdio {
266*724ba675SRob Herring	status = "okay";
267*724ba675SRob Herring
268*724ba675SRob Herring	switch@0 {
269*724ba675SRob Herring		compatible = "marvell,mv88e6085";
270*724ba675SRob Herring		#address-cells = <1>;
271*724ba675SRob Herring		#size-cells = <0>;
272*724ba675SRob Herring		reg = <0>;
273*724ba675SRob Herring
274*724ba675SRob Herring		ports {
275*724ba675SRob Herring			#address-cells = <1>;
276*724ba675SRob Herring			#size-cells = <0>;
277*724ba675SRob Herring
278*724ba675SRob Herring			port@0 {
279*724ba675SRob Herring				reg = <0>;
280*724ba675SRob Herring				label = "lan4";
281*724ba675SRob Herring			};
282*724ba675SRob Herring
283*724ba675SRob Herring			port@1 {
284*724ba675SRob Herring				reg = <1>;
285*724ba675SRob Herring				label = "lan3";
286*724ba675SRob Herring			};
287*724ba675SRob Herring
288*724ba675SRob Herring			port@2 {
289*724ba675SRob Herring				reg = <2>;
290*724ba675SRob Herring				label = "lan2";
291*724ba675SRob Herring			};
292*724ba675SRob Herring
293*724ba675SRob Herring			port@3 {
294*724ba675SRob Herring				reg = <3>;
295*724ba675SRob Herring				label = "lan1";
296*724ba675SRob Herring			};
297*724ba675SRob Herring
298*724ba675SRob Herring			port@4 {
299*724ba675SRob Herring				reg = <4>;
300*724ba675SRob Herring				label = "internet";
301*724ba675SRob Herring			};
302*724ba675SRob Herring
303*724ba675SRob Herring			port@5 {
304*724ba675SRob Herring				reg = <5>;
305*724ba675SRob Herring				phy-mode = "rgmii-id";
306*724ba675SRob Herring				ethernet = <&eth0>;
307*724ba675SRob Herring				fixed-link {
308*724ba675SRob Herring					speed = <1000>;
309*724ba675SRob Herring					full-duplex;
310*724ba675SRob Herring				};
311*724ba675SRob Herring			};
312*724ba675SRob Herring		};
313*724ba675SRob Herring	};
314*724ba675SRob Herring};
315*724ba675SRob Herring
316*724ba675SRob Herring&nand_controller {
317*724ba675SRob Herring	status = "okay";
318*724ba675SRob Herring
319*724ba675SRob Herring	nand@0 {
320*724ba675SRob Herring		reg = <0>;
321*724ba675SRob Herring		label = "pxa3xx_nand-0";
322*724ba675SRob Herring		nand-rb = <0>;
323*724ba675SRob Herring		marvell,nand-keep-config;
324*724ba675SRob Herring		nand-on-flash-bbt;
325*724ba675SRob Herring		nand-ecc-strength = <4>;
326*724ba675SRob Herring		nand-ecc-step-size = <512>;
327*724ba675SRob Herring
328*724ba675SRob Herring		partitions {
329*724ba675SRob Herring			compatible = "fixed-partitions";
330*724ba675SRob Herring			#address-cells = <1>;
331*724ba675SRob Herring			#size-cells = <1>;
332*724ba675SRob Herring
333*724ba675SRob Herring			partition@0 {
334*724ba675SRob Herring				label = "u-boot";
335*724ba675SRob Herring				reg = <0x0000000 0x100000>;  /* 1MB */
336*724ba675SRob Herring				read-only;
337*724ba675SRob Herring			};
338*724ba675SRob Herring
339*724ba675SRob Herring			partition@100000 {
340*724ba675SRob Herring				label = "u_env";
341*724ba675SRob Herring				reg = <0x100000 0x40000>;    /* 256KB */
342*724ba675SRob Herring			};
343*724ba675SRob Herring
344*724ba675SRob Herring			partition@140000 {
345*724ba675SRob Herring				label = "s_env";
346*724ba675SRob Herring				reg = <0x140000 0x40000>;    /* 256KB */
347*724ba675SRob Herring			};
348*724ba675SRob Herring
349*724ba675SRob Herring			partition@900000 {
350*724ba675SRob Herring				label = "devinfo";
351*724ba675SRob Herring				reg = <0x900000 0x100000>;   /* 1MB */
352*724ba675SRob Herring				read-only;
353*724ba675SRob Herring			};
354*724ba675SRob Herring
355*724ba675SRob Herring			/* kernel1 overlaps with rootfs1 by design */
356*724ba675SRob Herring			partition@a00000 {
357*724ba675SRob Herring				label = "kernel1";
358*724ba675SRob Herring				reg = <0xa00000 0x2800000>;  /* 40MB */
359*724ba675SRob Herring			};
360*724ba675SRob Herring
361*724ba675SRob Herring			partition@d00000 {
362*724ba675SRob Herring				label = "rootfs1";
363*724ba675SRob Herring				reg = <0xd00000 0x2500000>;  /* 37MB */
364*724ba675SRob Herring			};
365*724ba675SRob Herring
366*724ba675SRob Herring			/* kernel2 overlaps with rootfs2 by design */
367*724ba675SRob Herring			partition@3200000 {
368*724ba675SRob Herring				label = "kernel2";
369*724ba675SRob Herring				reg = <0x3200000 0x2800000>; /* 40MB */
370*724ba675SRob Herring			};
371*724ba675SRob Herring
372*724ba675SRob Herring			partition@3500000 {
373*724ba675SRob Herring				label = "rootfs2";
374*724ba675SRob Herring				reg = <0x3500000 0x2500000>; /* 37MB */
375*724ba675SRob Herring			};
376*724ba675SRob Herring
377*724ba675SRob Herring			/*
378*724ba675SRob Herring			 * 38MB, last MB is for the BBT, not writable
379*724ba675SRob Herring			 */
380*724ba675SRob Herring			partition@5a00000 {
381*724ba675SRob Herring				label = "syscfg";
382*724ba675SRob Herring				reg = <0x5a00000 0x2600000>;
383*724ba675SRob Herring			};
384*724ba675SRob Herring
385*724ba675SRob Herring			/*
386*724ba675SRob Herring			 * Unused area between "s_env" and "devinfo".
387*724ba675SRob Herring			 * Moved here because otherwise the renumbered
388*724ba675SRob Herring			 * partitions would break the bootloader
389*724ba675SRob Herring			 * supplied bootargs
390*724ba675SRob Herring			 */
391*724ba675SRob Herring			partition@180000 {
392*724ba675SRob Herring				label = "unused_area";
393*724ba675SRob Herring				reg = <0x180000 0x780000>;   /* 7.5MB */
394*724ba675SRob Herring			};
395*724ba675SRob Herring		};
396*724ba675SRob Herring	};
397*724ba675SRob Herring};
398