1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree file for Marvell Armada 388 evaluation board
4*724ba675SRob Herring * (DB-88F6820)
5*724ba675SRob Herring *
6*724ba675SRob Herring *  Copyright (C) 2014 Marvell
7*724ba675SRob Herring *
8*724ba675SRob Herring * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9*724ba675SRob Herring */
10*724ba675SRob Herring
11*724ba675SRob Herring/dts-v1/;
12*724ba675SRob Herring#include "armada-388.dtsi"
13*724ba675SRob Herring
14*724ba675SRob Herring/ {
15*724ba675SRob Herring	model = "Marvell Armada 385 Development Board";
16*724ba675SRob Herring	compatible = "marvell,a385-db", "marvell,armada388",
17*724ba675SRob Herring		"marvell,armada385", "marvell,armada380";
18*724ba675SRob Herring
19*724ba675SRob Herring	chosen {
20*724ba675SRob Herring		stdout-path = "serial0:115200n8";
21*724ba675SRob Herring	};
22*724ba675SRob Herring
23*724ba675SRob Herring	memory {
24*724ba675SRob Herring		device_type = "memory";
25*724ba675SRob Herring		reg = <0x00000000 0x10000000>; /* 256 MB */
26*724ba675SRob Herring	};
27*724ba675SRob Herring
28*724ba675SRob Herring	soc {
29*724ba675SRob Herring		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
30*724ba675SRob Herring			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
31*724ba675SRob Herring			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
32*724ba675SRob Herring			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
33*724ba675SRob Herring			  MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
34*724ba675SRob Herring
35*724ba675SRob Herring		internal-regs {
36*724ba675SRob Herring			i2c@11000 {
37*724ba675SRob Herring				status = "okay";
38*724ba675SRob Herring				clock-frequency = <100000>;
39*724ba675SRob Herring				audio_codec: audio-codec@4a {
40*724ba675SRob Herring					#sound-dai-cells = <0>;
41*724ba675SRob Herring					compatible = "cirrus,cs42l51";
42*724ba675SRob Herring					reg = <0x4a>;
43*724ba675SRob Herring				};
44*724ba675SRob Herring			};
45*724ba675SRob Herring
46*724ba675SRob Herring			i2c@11100 {
47*724ba675SRob Herring				status = "okay";
48*724ba675SRob Herring				clock-frequency = <100000>;
49*724ba675SRob Herring			};
50*724ba675SRob Herring
51*724ba675SRob Herring			serial@12000 {
52*724ba675SRob Herring				status = "okay";
53*724ba675SRob Herring			};
54*724ba675SRob Herring
55*724ba675SRob Herring			ethernet@30000 {
56*724ba675SRob Herring				status = "okay";
57*724ba675SRob Herring				phy = <&phy1>;
58*724ba675SRob Herring				phy-mode = "rgmii-id";
59*724ba675SRob Herring				buffer-manager = <&bm>;
60*724ba675SRob Herring				bm,pool-long = <2>;
61*724ba675SRob Herring				bm,pool-short = <3>;
62*724ba675SRob Herring			};
63*724ba675SRob Herring
64*724ba675SRob Herring			usb@58000 {
65*724ba675SRob Herring				status = "okay";
66*724ba675SRob Herring			};
67*724ba675SRob Herring
68*724ba675SRob Herring			ethernet@70000 {
69*724ba675SRob Herring				status = "okay";
70*724ba675SRob Herring				phy = <&phy0>;
71*724ba675SRob Herring				phy-mode = "rgmii-id";
72*724ba675SRob Herring				buffer-manager = <&bm>;
73*724ba675SRob Herring				bm,pool-long = <0>;
74*724ba675SRob Herring				bm,pool-short = <1>;
75*724ba675SRob Herring			};
76*724ba675SRob Herring
77*724ba675SRob Herring			mdio@72004 {
78*724ba675SRob Herring				phy0: ethernet-phy@0 {
79*724ba675SRob Herring					reg = <0>;
80*724ba675SRob Herring				};
81*724ba675SRob Herring
82*724ba675SRob Herring				phy1: ethernet-phy@1 {
83*724ba675SRob Herring					reg = <1>;
84*724ba675SRob Herring				};
85*724ba675SRob Herring			};
86*724ba675SRob Herring
87*724ba675SRob Herring			sata@a8000 {
88*724ba675SRob Herring				status = "okay";
89*724ba675SRob Herring			};
90*724ba675SRob Herring
91*724ba675SRob Herring			sata@e0000 {
92*724ba675SRob Herring				status = "okay";
93*724ba675SRob Herring			};
94*724ba675SRob Herring
95*724ba675SRob Herring			bm@c8000 {
96*724ba675SRob Herring				status = "okay";
97*724ba675SRob Herring			};
98*724ba675SRob Herring
99*724ba675SRob Herring			sdhci@d8000 {
100*724ba675SRob Herring				broken-cd;
101*724ba675SRob Herring				wp-inverted;
102*724ba675SRob Herring				bus-width = <8>;
103*724ba675SRob Herring				status = "okay";
104*724ba675SRob Herring				no-1-8-v;
105*724ba675SRob Herring			};
106*724ba675SRob Herring
107*724ba675SRob Herring			audio-controller@e8000 {
108*724ba675SRob Herring				pinctrl-0 = <&i2s_pins>;
109*724ba675SRob Herring				pinctrl-names = "default";
110*724ba675SRob Herring				status = "disabled";
111*724ba675SRob Herring			};
112*724ba675SRob Herring
113*724ba675SRob Herring			usb3@f0000 {
114*724ba675SRob Herring				status = "okay";
115*724ba675SRob Herring			};
116*724ba675SRob Herring
117*724ba675SRob Herring			usb3@f8000 {
118*724ba675SRob Herring				status = "okay";
119*724ba675SRob Herring			};
120*724ba675SRob Herring		};
121*724ba675SRob Herring
122*724ba675SRob Herring		bm-bppi {
123*724ba675SRob Herring			status = "okay";
124*724ba675SRob Herring		};
125*724ba675SRob Herring
126*724ba675SRob Herring		pcie {
127*724ba675SRob Herring			status = "okay";
128*724ba675SRob Herring			/*
129*724ba675SRob Herring			 * The two PCIe units are accessible through
130*724ba675SRob Herring			 * standard PCIe slots on the board.
131*724ba675SRob Herring			 */
132*724ba675SRob Herring			pcie@1,0 {
133*724ba675SRob Herring				/* Port 0, Lane 0 */
134*724ba675SRob Herring				status = "okay";
135*724ba675SRob Herring			};
136*724ba675SRob Herring			pcie@2,0 {
137*724ba675SRob Herring				/* Port 1, Lane 0 */
138*724ba675SRob Herring				status = "okay";
139*724ba675SRob Herring			};
140*724ba675SRob Herring		};
141*724ba675SRob Herring	};
142*724ba675SRob Herring
143*724ba675SRob Herring	sound {
144*724ba675SRob Herring		compatible = "simple-audio-card";
145*724ba675SRob Herring		simple-audio-card,name = "Armada 385 DB Audio";
146*724ba675SRob Herring		simple-audio-card,mclk-fs = <256>;
147*724ba675SRob Herring		simple-audio-card,widgets =
148*724ba675SRob Herring			"Headphone", "Out Jack",
149*724ba675SRob Herring			"Line", "In Jack";
150*724ba675SRob Herring		simple-audio-card,routing =
151*724ba675SRob Herring			"Out Jack", "HPL",
152*724ba675SRob Herring			"Out Jack", "HPR",
153*724ba675SRob Herring			"AIN1L", "In Jack",
154*724ba675SRob Herring			"AIN1R", "In Jack";
155*724ba675SRob Herring		status = "disabled";
156*724ba675SRob Herring
157*724ba675SRob Herring		simple-audio-card,dai-link@0 {
158*724ba675SRob Herring			format = "i2s";
159*724ba675SRob Herring			cpu {
160*724ba675SRob Herring				sound-dai = <&audio_controller 0>;
161*724ba675SRob Herring			};
162*724ba675SRob Herring
163*724ba675SRob Herring			codec {
164*724ba675SRob Herring				sound-dai = <&audio_codec>;
165*724ba675SRob Herring			};
166*724ba675SRob Herring		};
167*724ba675SRob Herring
168*724ba675SRob Herring		simple-audio-card,dai-link@1 {
169*724ba675SRob Herring			format = "i2s";
170*724ba675SRob Herring			cpu {
171*724ba675SRob Herring				sound-dai = <&audio_controller 1>;
172*724ba675SRob Herring			};
173*724ba675SRob Herring
174*724ba675SRob Herring			codec {
175*724ba675SRob Herring				sound-dai = <&spdif_out>;
176*724ba675SRob Herring			};
177*724ba675SRob Herring		};
178*724ba675SRob Herring
179*724ba675SRob Herring		simple-audio-card,dai-link@2 {
180*724ba675SRob Herring			format = "i2s";
181*724ba675SRob Herring			cpu {
182*724ba675SRob Herring				sound-dai = <&audio_controller 1>;
183*724ba675SRob Herring			};
184*724ba675SRob Herring
185*724ba675SRob Herring			codec {
186*724ba675SRob Herring				sound-dai = <&spdif_in>;
187*724ba675SRob Herring			};
188*724ba675SRob Herring		};
189*724ba675SRob Herring	};
190*724ba675SRob Herring
191*724ba675SRob Herring	spdif_out: spdif-out {
192*724ba675SRob Herring		#sound-dai-cells = <0>;
193*724ba675SRob Herring		compatible = "linux,spdif-dit";
194*724ba675SRob Herring	};
195*724ba675SRob Herring
196*724ba675SRob Herring	spdif_in: spdif-in {
197*724ba675SRob Herring		#sound-dai-cells = <0>;
198*724ba675SRob Herring		compatible = "linux,spdif-dir";
199*724ba675SRob Herring	};
200*724ba675SRob Herring};
201*724ba675SRob Herring
202*724ba675SRob Herring&spi0 {
203*724ba675SRob Herring	status = "okay";
204*724ba675SRob Herring
205*724ba675SRob Herring	flash@0 {
206*724ba675SRob Herring		#address-cells = <1>;
207*724ba675SRob Herring		#size-cells = <1>;
208*724ba675SRob Herring		compatible = "w25q32", "jedec,spi-nor";
209*724ba675SRob Herring		reg = <0>; /* Chip select 0 */
210*724ba675SRob Herring		spi-max-frequency = <108000000>;
211*724ba675SRob Herring	};
212*724ba675SRob Herring};
213*724ba675SRob Herring
214*724ba675SRob Herring&nand_controller {
215*724ba675SRob Herring	status = "okay";
216*724ba675SRob Herring
217*724ba675SRob Herring	nand@0 {
218*724ba675SRob Herring		reg = <0>;
219*724ba675SRob Herring		label = "pxa3xx_nand-0";
220*724ba675SRob Herring		nand-rb = <0>;
221*724ba675SRob Herring		marvell,nand-keep-config;
222*724ba675SRob Herring		nand-on-flash-bbt;
223*724ba675SRob Herring		nand-ecc-strength = <4>;
224*724ba675SRob Herring		nand-ecc-step-size = <512>;
225*724ba675SRob Herring
226*724ba675SRob Herring		partitions {
227*724ba675SRob Herring			compatible = "fixed-partitions";
228*724ba675SRob Herring			#address-cells = <1>;
229*724ba675SRob Herring			#size-cells = <1>;
230*724ba675SRob Herring
231*724ba675SRob Herring			partition@0 {
232*724ba675SRob Herring				label = "U-Boot";
233*724ba675SRob Herring				reg = <0 0x800000>;
234*724ba675SRob Herring			};
235*724ba675SRob Herring			partition@800000 {
236*724ba675SRob Herring				label = "Linux";
237*724ba675SRob Herring				reg = <0x800000 0x800000>;
238*724ba675SRob Herring			};
239*724ba675SRob Herring			partition@1000000 {
240*724ba675SRob Herring				label = "Filesystem";
241*724ba675SRob Herring				reg = <0x1000000 0x3f000000>;
242*724ba675SRob Herring			};
243*724ba675SRob Herring		};
244*724ba675SRob Herring	};
245*724ba675SRob Herring};
246