1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree Bindings for Cisco Meraki MX64W with A0 SoC.
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring/dts-v1/;
9*724ba675SRob Herring
10*724ba675SRob Herring#include "bcm958625-meraki-kingpin.dtsi"
11*724ba675SRob Herring#include "bcm-nsp-ax.dtsi"
12*724ba675SRob Herring
13*724ba675SRob Herring/ {
14*724ba675SRob Herring	model = "Cisco Meraki MX64W(A0)";
15*724ba675SRob Herring	compatible = "meraki,mx64w-a0", "brcm,bcm58625", "brcm,nsp";
16*724ba675SRob Herring
17*724ba675SRob Herring	chosen {
18*724ba675SRob Herring		stdout-path = "serial0:115200n8";
19*724ba675SRob Herring	};
20*724ba675SRob Herring
21*724ba675SRob Herring	memory@60000000 {
22*724ba675SRob Herring		device_type = "memory";
23*724ba675SRob Herring		reg = <0x60000000 0x80000000>;
24*724ba675SRob Herring	};
25*724ba675SRob Herring};
26*724ba675SRob Herring
27*724ba675SRob Herring&pcie0 {
28*724ba675SRob Herring	status = "okay";
29*724ba675SRob Herring};
30*724ba675SRob Herring
31*724ba675SRob Herring&pcie1 {
32*724ba675SRob Herring	status = "okay";
33*724ba675SRob Herring};
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