1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3#include "aspeed-g5.dtsi"
4#include <dt-bindings/gpio/aspeed-gpio.h>
5
6/ {
7	model = "Zaius BMC";
8	compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
9
10	aliases {
11		i2c15 = &i2cpcie0;
12		i2c16 = &i2cpcie1;
13		i2c17 = &i2cpcie2;
14		i2c19 = &i2cpcie3;
15		i2c20 = &i2cpcie4;
16	};
17
18	chosen {
19		stdout-path = &uart5;
20		bootargs = "console=ttyS4,115200 earlycon";
21	};
22
23	memory@80000000 {
24		reg = <0x80000000 0x40000000>;
25	};
26
27	reserved-memory {
28		#address-cells = <1>;
29		#size-cells = <1>;
30		ranges;
31
32		flash_memory: region@98000000 {
33			no-map;
34			reg = <0x98000000 0x04000000>; /* 64M */
35		};
36	};
37
38	onewire0 {
39		compatible = "w1-gpio";
40		gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
41	};
42
43	onewire1 {
44		compatible = "w1-gpio";
45		gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
46	};
47
48	onewire2 {
49		compatible = "w1-gpio";
50		gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
51	};
52
53	onewire3 {
54		compatible = "w1-gpio";
55		gpios = <&gpio ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
56	};
57
58	gpio-keys {
59		compatible = "gpio-keys";
60
61		event-checkstop {
62			label = "checkstop";
63			gpios = <&gpio ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
64			linux,code = <ASPEED_GPIO(F, 7)>;
65		};
66
67		event-pcie-e2b-present{
68			label = "pcie-e2b-present";
69			gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
70			linux,code = <ASPEED_GPIO(E, 7)>;
71		};
72	};
73
74	leds {
75		compatible = "gpio-leds";
76
77		sys_boot_status {
78			label = "System boot status";
79			gpios = <&gpio ASPEED_GPIO(D, 5) GPIO_ACTIVE_LOW>;
80		};
81
82		attention {
83			label = "Attention";
84			gpios = <&gpio ASPEED_GPIO(D, 6) GPIO_ACTIVE_LOW>;
85		};
86
87		plt_fault {
88			label = "Platform fault";
89			gpios = <&gpio ASPEED_GPIO(D, 7) GPIO_ACTIVE_LOW>;
90		};
91
92		hdd_fault {
93			label = "Onboard drive fault";
94			gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
95		};
96	};
97
98	fsi: gpio-fsi {
99		compatible = "fsi-master-gpio", "fsi-master";
100		#address-cells = <2>;
101		#size-cells = <0>;
102		no-gpio-delays;
103
104		trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
105		enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
106		clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
107		data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
108		mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
109	};
110
111	iio-hwmon {
112		compatible = "iio-hwmon";
113		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
114			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
115			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
116			<&adc 13>, <&adc 14>, <&adc 15>;
117	};
118
119	iio-hwmon-battery {
120		compatible = "iio-hwmon";
121		io-channels = <&adc 12>;
122	};
123
124};
125
126&fmc {
127	status = "okay";
128
129	flash@0 {
130		status = "okay";
131		label = "bmc";
132		m25p,fast-read;
133		spi-max-frequency = <50000000>;
134#include "openbmc-flash-layout.dtsi"
135	};
136};
137
138&spi1 {
139	status = "okay";
140	pinctrl-names = "default";
141	pinctrl-0 = <&pinctrl_spi1_default>;
142
143	flash@0 {
144		status = "okay";
145		label = "pnor";
146		m25p,fast-read;
147		spi-max-frequency = <100000000>;
148	};
149};
150
151&spi2 {
152	status = "okay";
153	pinctrl-names = "default";
154	pinctrl-0 = <&pinctrl_spi2ck_default
155		     &pinctrl_spi2cs0_default
156		     &pinctrl_spi2cs1_default
157		     &pinctrl_spi2miso_default
158		     &pinctrl_spi2mosi_default>;
159
160	flash@0 {
161		status = "okay";
162	};
163};
164
165&uart1 {
166	status = "okay";
167	pinctrl-names = "default";
168	pinctrl-0 = <&pinctrl_txd1_default
169		     &pinctrl_rxd1_default>;
170};
171
172&lpc_ctrl {
173	status = "okay";
174	memory-region = <&flash_memory>;
175	flash = <&spi1>;
176};
177
178&lpc_snoop {
179	status = "okay";
180	snoop-ports = <0x80>;
181};
182
183
184&uart5 {
185	status = "okay";
186};
187
188&mac0 {
189	status = "okay";
190	pinctrl-names = "default";
191	pinctrl-0 = <&pinctrl_rmii1_default>;
192	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
193		 <&syscon ASPEED_CLK_MAC1RCLK>;
194	clock-names = "MACCLK", "RCLK";
195	use-ncsi;
196};
197
198&mac1 {
199	status = "okay";
200
201	pinctrl-names = "default";
202	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
203};
204
205&i2c0 {
206	status = "okay";
207
208	eeprom@50 {
209		compatible = "atmel,24c64";
210		reg = <0x50>;
211		pagesize = <32>;
212	};
213
214	rtc@68 {
215		compatible = "nxp,pcf8523";
216		reg = <0x68>;
217	};
218
219	ucd90160@64 {
220		compatible = "ti,ucd90160";
221		reg = <0x64>;
222	};
223
224	/* Power sequencer UCD90160 PMBUS @64h
225	 * FRU AT24C64D @50h
226	 * RTC PCF8523 @68h
227	 * Clock buffer 9DBL04 @6dh
228	 */
229};
230
231&i2c1 {
232	status = "okay";
233
234	i2c-switch@71 {
235		compatible = "nxp,pca9546";
236		reg = <0x71>;
237		#address-cells = <1>;
238		#size-cells = <0>;
239
240		i2cpcie0: i2c@0 {
241			#address-cells = <1>;
242			#size-cells = <0>;
243			reg = <0>;
244		};
245		i2cpcie1: i2c@1 {
246			#address-cells = <1>;
247			#size-cells = <0>;
248			reg = <1>;
249		};
250		i2cpcie2: i2c@2 {
251			#address-cells = <1>;
252			#size-cells = <0>;
253			reg = <2>;
254		};
255		i2ctpm: i2c@3 {
256			#address-cells = <1>;
257			#size-cells = <0>;
258			reg = <3>;
259		};
260	};
261
262	/* MUX1 PCA9546A @71h
263	 *   PCIe 0
264	 *   PCIe 1
265	 *   PCIe 2
266	 *   TPM header
267	 */
268};
269
270&i2c2 {
271	status = "disabled";
272
273	/* OCP Mezz Connector A (OOB SMBUS) */
274};
275
276&i2c3 {
277	status = "disabled";
278
279	/* OCP Mezz Connector A (PCIe slot SMBUS) */
280};
281
282&i2c4 {
283	status = "okay";
284
285	i2c-switch@71 {
286		compatible = "nxp,pca9546";
287		reg = <0x71>;
288		#address-cells = <1>;
289		#size-cells = <0>;
290
291		i2cpcie3: i2c@0 {
292			#address-cells = <1>;
293			#size-cells = <0>;
294			reg = <0>;
295		};
296		i2cpcie4: i2c@1 {
297			#address-cells = <1>;
298			#size-cells = <0>;
299			reg = <1>;
300		};
301	};
302
303	/* MUX1 PCA9546A @71h
304	 *   PCIe 3
305	 *   PCIe 4
306	 */
307};
308
309
310&i2c5 {
311	status = "disabled";
312
313	/* CPU0 PRM 0.7V */
314	/* CPU0 PRM 1.2V CH03 */
315	/* CPU0 PRM 0.8V */
316	/* CPU0 PRM 1.2V CH47 */
317};
318
319&i2c6 {
320	status = "disabled";
321
322	/* CPU1 PRM 0.7V */
323	/* CPU1 PRM 1.2V CH03 */
324	/* CPU1 PRM 0.8V */
325	/* CPU1 PRM 1.2V CH47 */
326};
327
328&i2c7 {
329	status = "okay";
330
331	pca9541a@70 {
332		compatible = "nxp,pca9541";
333		reg = <0x70>;
334
335		i2c-arb {
336			#address-cells = <1>;
337			#size-cells = <0>;
338
339			hotswap@54 {
340				compatible = "ti,lm5066i";
341				reg = <0x54>;
342			};
343		};
344
345	};
346
347	vrm@64 {
348		compatible = "isil,isl68137";
349		reg = <0x64>;
350	};
351
352	vrm@40 {
353		compatible = "isil,isl68137";
354		reg = <0x40>;
355	};
356
357	vrm@60 {
358		compatible = "isil,isl68137";
359		reg = <0x60>;
360	};
361
362	vrm@43 {
363		compatible = "infineon,ir38064";
364		reg = <0x43>;
365	};
366
367	vrm@41 {
368		compatible = "isil,isl68137";
369		reg = <0x41>;
370	};
371
372	/* Master selector PCA9541A @70h (other master: CPU0)
373	 *   LM5066I PMBUS @10h
374	 */
375
376	/*
377	 * Brick will be one of these types/addresses.  Depending
378	 * on the board SKU only one is actually present and will successfully
379	 * instantiate while the others will fail the probe operation.
380	 * These are the PVT (and presumably beyond) addresses:
381	 *    12V Quarter Brick DC/DC Converter Q54SJ12050 @6Ah
382	 *    12V Quarter Brick DC/DC Converter Q54SH12050 @30h
383	 */
384	power-brick@6a {
385		compatible = "delta,dps800";
386		reg = <0x6a>;
387	};
388	power-brick@30 {
389		compatible = "delta,dps800";
390		reg = <0x30>;
391	};
392
393	/* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
394	/* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
395	/* CPU0 VR ISL68137 0.8V PMBUS @60h */
396	/* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @43h */
397	/* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
398	/* Master selector PCA9541A @70h (other master: CPU0)
399	 *   LM5066I PMBUS @10h
400	 */
401};
402
403&i2c8 {
404	status = "okay";
405
406	vrm@64 {
407		compatible = "isil,isl68137";
408		reg = <0x64>;
409	};
410
411	vrm@40 {
412		compatible = "isil,isl68137";
413		reg = <0x40>;
414	};
415
416	vrm@41 {
417		compatible = "isil,isl68137";
418		reg = <0x41>;
419	};
420
421	vrm@42 {
422		compatible = "infineon,ir38064";
423		reg = <0x42>;
424	};
425
426	vrm@60 {
427		compatible = "isil,isl68137";
428		reg = <0x60>;
429	};
430
431	/* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @64h */
432	/* CPU1 VR ISL68137 1.2V CH03 PMBUS @40h */
433	/* CPU1 VR ISL68137 1.2V CH47 PMBUS @41h */
434	/* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
435	/* CPU1 VR ISL68137 0.8V PMBUS @60h */
436};
437
438
439&i2c9 {
440	status = "disabled";
441
442	/* Fan board */
443};
444
445&i2c10 {
446	status = "disabled";
447};
448
449&i2c11 {
450	status = "disabled";
451
452	/* GPU sideband */
453};
454
455&i2c12 {
456	status = "disabled";
457};
458
459&i2c13 {
460	status = "disabled";
461
462	/* MUX PI3USB102
463	 *   CPU0 debug
464	 *   CPU1 debug
465	 */
466};
467
468&pinctrl {
469	aspeed,external-nodes = <&gfx &lhc>;
470
471	pinctrl_gpioh_unbiased: gpioi_unbiased {
472		pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";
473		bias-disable;
474	};
475};
476
477&gpio {
478	pinctrl-names = "default";
479	pinctrl-0 = <&pinctrl_gpioh_unbiased>;
480
481	gpio-line-names =
482	/*A0-A7*/	"","cfam-reset","","","","","","",
483	/*B0-B7*/	"","","","","","","","",
484	/*C0-C7*/	"","","","","","","","",
485	/*D0-D7*/	"fsi-enable","","","","","led-sys-boot-status","led-attention",
486				"led-fault",
487	/*E0-E7*/	"","","","","","","","presence-pcie-e2b",
488	/*F0-F7*/	"","","","","","","","checkstop",
489	/*G0-G7*/	"fsi-clock","fsi-data","","","","","","",
490	/*H0-H7*/	"onewire0","onewire1","onewire2","onewire3","","","","",
491	/*I0-I7*/	"","","","power-button","","","","",
492	/*J0-J7*/	"","","","","","","","",
493	/*K0-K7*/	"","","","","","","","",
494	/*L0-L7*/	"","","","","","","","",
495	/*M0-M7*/	"","","","","","","","",
496	/*N0-N7*/	"","","","","","","","",
497	/*O0-O7*/	"","","","","iso_u164_en","","fsi-trans","",
498	/*P0-P7*/	"ncsi_mux_en_n","bmc_i2c2_sw_rst_n","","bmc_i2c5_sw_rst_n","",
499				"","fsi-mux","",
500	/*Q0-Q7*/	"","","","","","","","",
501	/*R0-R7*/	"","","","","","","","",
502	/*S0-S7*/	"","","","","","","","",
503	/*T0-T7*/	"","","","","","","","",
504	/*U0-U7*/	"","","","","","","","",
505	/*V0-V7*/	"","","","","","","","",
506	/*W0-W7*/	"","","","","","","","",
507	/*X0-X7*/	"","","","","","","","",
508	/*Y0-Y7*/	"","","","","","","","",
509	/*Z0-Z7*/	"","","","","","","","",
510	/*AA0-AA7*/	"","","led-hdd-fault","","","","","",
511	/*AB0-AB7*/	"","","","","","","","",
512	/*AC0-AC7*/	"","","","","","","","";
513
514	line_iso_u146_en {
515		gpio-hog;
516		gpios = <ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH>;
517		output-high;
518	};
519
520	ncsi_mux_en_n {
521		gpio-hog;
522		gpios = <ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
523		output-low;
524	};
525
526	line_bmc_i2c2_sw_rst_n {
527		gpio-hog;
528		gpios = <ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
529		output-high;
530	};
531
532	line_bmc_i2c5_sw_rst_n {
533		gpio-hog;
534		gpios = <ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
535		output-high;
536	};
537};
538
539&vuart {
540	status = "okay";
541};
542
543&gfx {
544	status = "okay";
545};
546
547&pwm_tacho {
548	status = "okay";
549	pinctrl-names = "default";
550	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
551		&pinctrl_pwm2_default &pinctrl_pwm3_default>;
552
553	fan@0 {
554		reg = <0x00>;
555		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
556	};
557
558	fan@1 {
559		reg = <0x01>;
560		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
561	};
562
563	fan@2 {
564		reg = <0x02>;
565		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
566	};
567
568	fan@3 {
569		reg = <0x03>;
570		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
571	};
572};
573
574&ibt {
575	status = "okay";
576};
577
578#include "ibm-power9-dual.dtsi"
579