1// SPDX-License-Identifier: GPL-2.0+
2// Copyright (c) 2021 Facebook Inc.
3/dts-v1/;
4
5#include "aspeed-g6.dtsi"
6#include <dt-bindings/gpio/aspeed-gpio.h>
7#include <dt-bindings/usb/pd.h>
8#include <dt-bindings/leds/leds-pca955x.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/i2c/i2c.h>
11
12/ {
13	model = "Facebook Catalina BMC";
14	compatible = "facebook,catalina-bmc", "aspeed,ast2600";
15
16	aliases {
17		serial0 = &uart1;
18		serial2 = &uart3;
19		serial3 = &uart4;
20		serial4 = &uart5;
21		i2c16 = &i2c1mux0ch0;
22		i2c17 = &i2c1mux0ch1;
23		i2c18 = &i2c1mux0ch2;
24		i2c19 = &i2c1mux0ch3;
25		i2c20 = &i2c1mux0ch4;
26		i2c21 = &i2c1mux0ch5;
27		i2c22 = &i2c1mux0ch6;
28		i2c23 = &i2c1mux0ch7;
29		i2c24 = &i2c0mux0ch0;
30		i2c25 = &i2c0mux0ch1;
31		i2c26 = &i2c0mux0ch2;
32		i2c27 = &i2c0mux0ch3;
33		i2c28 = &i2c0mux1ch0;
34		i2c29 = &i2c0mux1ch1;
35		i2c30 = &i2c0mux1ch2;
36		i2c31 = &i2c0mux1ch3;
37		i2c32 = &i2c0mux2ch0;
38		i2c33 = &i2c0mux2ch1;
39		i2c34 = &i2c0mux2ch2;
40		i2c35 = &i2c0mux2ch3;
41		i2c36 = &i2c0mux3ch0;
42		i2c37 = &i2c0mux3ch1;
43		i2c38 = &i2c0mux3ch2;
44		i2c39 = &i2c0mux3ch3;
45		i2c40 = &i2c0mux4ch0;
46		i2c41 = &i2c0mux4ch1;
47		i2c42 = &i2c0mux4ch2;
48		i2c43 = &i2c0mux4ch3;
49		i2c44 = &i2c0mux5ch0;
50		i2c45 = &i2c0mux5ch1;
51		i2c46 = &i2c0mux5ch2;
52		i2c47 = &i2c0mux5ch3;
53		i2c48 = &i2c30mux0ch0;
54		i2c49 = &i2c30mux0ch1;
55		i2c50 = &i2c30mux0ch2;
56		i2c51 = &i2c30mux0ch3;
57		i2c52 = &i2c30mux0ch4;
58		i2c53 = &i2c30mux0ch5;
59		i2c54 = &i2c30mux0ch6;
60		i2c55 = &i2c30mux0ch7;
61	};
62
63	chosen {
64		stdout-path = "serial4:57600n8";
65	};
66
67	memory@80000000 {
68		device_type = "memory";
69		reg = <0x80000000 0x80000000>;
70	};
71
72	iio-hwmon {
73		compatible = "iio-hwmon";
74		io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
75			      <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
76			      <&adc1 2>;
77	};
78
79	spi1_gpio: spi {
80		compatible = "spi-gpio";
81		#address-cells = <1>;
82		#size-cells = <0>;
83
84		sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
85		mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
86		miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
87		cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
88		num-chipselects = <1>;
89
90		tpm@0 {
91			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
92			spi-max-frequency = <33000000>;
93			reg = <0>;
94		};
95	};
96
97	leds {
98		compatible = "gpio-leds";
99
100		led-0 {
101			label = "bmc_heartbeat_amber";
102			gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
103			linux,default-trigger = "heartbeat";
104		};
105
106		led-1 {
107			label = "fp_id_amber";
108			default-state = "off";
109			gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
110		};
111
112		led-2 {
113			label = "bmc_ready_noled";
114			gpios = <&gpio0 ASPEED_GPIO(B, 3) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>;
115		};
116
117		led-3 {
118			label = "bmc_ready_cpld_noled";
119			gpios = <&gpio0 ASPEED_GPIO(P, 5) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>;
120		};
121	};
122
123	p1v8_bmc_aux: regulator-p1v8-bmc-aux {
124		compatible = "regulator-fixed";
125		regulator-name = "p1v8_bmc_aux";
126		regulator-min-microvolt = <1800000>;
127		regulator-max-microvolt = <1800000>;
128		regulator-always-on;
129	};
130
131	p2v5_bmc_aux: regulator-p2v5-bmc-aux {
132		compatible = "regulator-fixed";
133		regulator-name = "p2v5_bmc_aux";
134		regulator-min-microvolt = <2500000>;
135		regulator-max-microvolt = <2500000>;
136		regulator-always-on;
137	};
138};
139
140&uart1 {
141	status = "okay";
142};
143
144&uart3 {
145	status = "okay";
146};
147
148&uart4 {
149	status = "okay";
150};
151
152&uart5 {
153	status = "okay";
154};
155
156&mac3 {
157	status = "okay";
158	pinctrl-names = "default";
159	pinctrl-0 = <&pinctrl_ncsi4_default>;
160	use-ncsi;
161};
162
163&fmc {
164	status = "okay";
165	flash@0 {
166		status = "okay";
167		m25p,fast-read;
168		label = "bmc";
169		spi-max-frequency = <50000000>;
170#include "openbmc-flash-layout-128.dtsi"
171	};
172	flash@1 {
173		status = "okay";
174		m25p,fast-read;
175		label = "alt-bmc";
176		spi-max-frequency = <50000000>;
177	};
178};
179
180&i2c0 {
181	status = "okay";
182
183	i2c-mux@71 {
184		compatible = "nxp,pca9546";
185		reg = <0x71>;
186		#address-cells = <1>;
187		#size-cells = <0>;
188
189		i2c0mux0ch0: i2c@0 {
190			#address-cells = <1>;
191			#size-cells = <0>;
192			reg = <0>;
193		};
194		i2c0mux0ch1: i2c@1 {
195			#address-cells = <1>;
196			#size-cells = <0>;
197			reg = <1>;
198		};
199		i2c0mux0ch2: i2c@2 {
200			#address-cells = <1>;
201			#size-cells = <0>;
202			reg = <2>;
203		};
204		i2c0mux0ch3: i2c@3 {
205			#address-cells = <1>;
206			#size-cells = <0>;
207			reg = <3>;
208		};
209	};
210
211	i2c-mux@72 {
212		compatible = "nxp,pca9546";
213		reg = <0x72>;
214		#address-cells = <1>;
215		#size-cells = <0>;
216
217		i2c0mux1ch0: i2c@0 {
218			#address-cells = <1>;
219			#size-cells = <0>;
220			reg = <0>;
221		};
222		i2c0mux1ch1: i2c@1 {
223			#address-cells = <1>;
224			#size-cells = <0>;
225			reg = <1>;
226
227			// IO Mezz 0 IOEXP
228			io_expander7: gpio@20 {
229				compatible = "nxp,pca9535";
230				reg = <0x20>;
231				gpio-controller;
232				#gpio-cells = <2>;
233			};
234
235			// IO Mezz 0 FRU EEPROM
236			eeprom@50 {
237				compatible = "atmel,24c64";
238				reg = <0x50>;
239			};
240		};
241		i2c0mux1ch2: i2c@2 {
242			#address-cells = <1>;
243			#size-cells = <0>;
244			reg = <2>;
245			i2c-mux@70 {
246				compatible = "nxp,pca9548";
247				reg = <0x70>;
248				#address-cells = <1>;
249				#size-cells = <0>;
250
251				i2c30mux0ch0: i2c@0 {
252					#address-cells = <1>;
253					#size-cells = <0>;
254					reg = <0>;
255				};
256				i2c30mux0ch1: i2c@1 {
257					#address-cells = <1>;
258					#size-cells = <0>;
259					reg = <1>;
260				};
261				i2c30mux0ch2: i2c@2 {
262					#address-cells = <1>;
263					#size-cells = <0>;
264					reg = <2>;
265				};
266				i2c30mux0ch3: i2c@3 {
267					#address-cells = <1>;
268					#size-cells = <0>;
269					reg = <3>;
270				};
271				i2c30mux0ch4: i2c@4 {
272					#address-cells = <1>;
273					#size-cells = <0>;
274					reg = <4>;
275				};
276				i2c30mux0ch5: i2c@5 {
277					#address-cells = <1>;
278					#size-cells = <0>;
279					reg = <5>;
280				};
281				i2c30mux0ch6: i2c@6 {
282					#address-cells = <1>;
283					#size-cells = <0>;
284					reg = <6>;
285					// HDD FRU EEPROM
286					eeprom@52 {
287						compatible = "atmel,24c64";
288						reg = <0x52>;
289					};
290				};
291				i2c30mux0ch7: i2c@7 {
292					#address-cells = <1>;
293					#size-cells = <0>;
294					reg = <7>;
295
296					power-sensor@40 {
297						compatible = "ti,ina230";
298						reg = <0x40>;
299						shunt-resistor = <2000>;
300					};
301					power-sensor@41 {
302						compatible = "ti,ina230";
303						reg = <0x41>;
304						shunt-resistor = <2000>;
305					};
306					power-sensor@44 {
307						compatible = "ti,ina230";
308						reg = <0x44>;
309						shunt-resistor = <2000>;
310					};
311					power-sensor@45 {
312						compatible = "ti,ina230";
313						reg = <0x45>;
314						shunt-resistor = <2000>;
315					};
316				};
317			};
318		};
319		i2c0mux1ch3: i2c@3 {
320			#address-cells = <1>;
321			#size-cells = <0>;
322			reg = <3>;
323		};
324	};
325
326	i2c-mux@73 {
327		compatible = "nxp,pca9546";
328		reg = <0x73>;
329		#address-cells = <1>;
330		#size-cells = <0>;
331
332		i2c0mux2ch0: i2c@0 {
333			#address-cells = <1>;
334			#size-cells = <0>;
335			reg = <0>;
336		};
337		i2c0mux2ch1: i2c@1 {
338			#address-cells = <1>;
339			#size-cells = <0>;
340			reg = <1>;
341		};
342		i2c0mux2ch2: i2c@2 {
343			#address-cells = <1>;
344			#size-cells = <0>;
345			reg = <2>;
346		};
347		i2c0mux2ch3: i2c@3 {
348			#address-cells = <1>;
349			#size-cells = <0>;
350			reg = <3>;
351		};
352	};
353
354	i2c-mux@75 {
355		compatible = "nxp,pca9546";
356		reg = <0x75>;
357		#address-cells = <1>;
358		#size-cells = <0>;
359
360		i2c0mux3ch0: i2c@0 {
361			#address-cells = <1>;
362			#size-cells = <0>;
363			reg = <0>;
364		};
365		i2c0mux3ch1: i2c@1 {
366			#address-cells = <1>;
367			#size-cells = <0>;
368			reg = <1>;
369		};
370		i2c0mux3ch2: i2c@2 {
371			#address-cells = <1>;
372			#size-cells = <0>;
373			reg = <2>;
374		};
375		i2c0mux3ch3: i2c@3 {
376			#address-cells = <1>;
377			#size-cells = <0>;
378			reg = <3>;
379		};
380	};
381
382	i2c-mux@76 {
383		compatible = "nxp,pca9546";
384		reg = <0x76>;
385		#address-cells = <1>;
386		#size-cells = <0>;
387
388		i2c0mux4ch0: i2c@0 {
389			#address-cells = <1>;
390			#size-cells = <0>;
391			reg = <0>;
392		};
393		i2c0mux4ch1: i2c@1 {
394			#address-cells = <1>;
395			#size-cells = <0>;
396			reg = <1>;
397
398			// IO Mezz 1 IOEXP
399			io_expander8: gpio@21 {
400				compatible = "nxp,pca9535";
401				reg = <0x21>;
402				gpio-controller;
403				#gpio-cells = <2>;
404			};
405
406			// IO Mezz 1 FRU EEPROM
407			eeprom@50 {
408				compatible = "atmel,24c64";
409				reg = <0x50>;
410			};
411		};
412		i2c0mux4ch2: i2c@2 {
413			#address-cells = <1>;
414			#size-cells = <0>;
415			reg = <2>;
416		};
417		i2c0mux4ch3: i2c@3 {
418			#address-cells = <1>;
419			#size-cells = <0>;
420			reg = <3>;
421		};
422	};
423
424	i2c-mux@77 {
425		compatible = "nxp,pca9546";
426		reg = <0x77>;
427		#address-cells = <1>;
428		#size-cells = <0>;
429
430		i2c0mux5ch0: i2c@0 {
431			#address-cells = <1>;
432			#size-cells = <0>;
433			reg = <0>;
434		};
435		i2c0mux5ch1: i2c@1 {
436			#address-cells = <1>;
437			#size-cells = <0>;
438			reg = <1>;
439		};
440		i2c0mux5ch2: i2c@2 {
441			#address-cells = <1>;
442			#size-cells = <0>;
443			reg = <2>;
444		};
445		i2c0mux5ch3: i2c@3 {
446			#address-cells = <1>;
447			#size-cells = <0>;
448			reg = <3>;
449		};
450	};
451};
452
453&i2c1 {
454	status = "okay";
455	i2c-mux@70 {
456		compatible = "nxp,pca9548";
457		#address-cells = <1>;
458		#size-cells = <0>;
459		reg = <0x70>;
460		i2c-mux-idle-disconnect;
461
462		i2c1mux0ch0: i2c@0 {
463			#address-cells = <1>;
464			#size-cells = <0>;
465			reg = <0x0>;
466
467			power-sensor@41 {
468				compatible = "ti,ina238";
469				reg = <0x41>;
470				shunt-resistor = <500>;
471			};
472			power-sensor@42 {
473				compatible = "ti,ina238";
474				reg = <0x42>;
475				shunt-resistor = <500>;
476			};
477			power-sensor@44 {
478				compatible = "ti,ina238";
479				reg = <0x44>;
480				shunt-resistor = <500>;
481			};
482		};
483		i2c1mux0ch1: i2c@1 {
484			#address-cells = <1>;
485			#size-cells = <0>;
486			reg = <0x1>;
487
488			power-sensor@41 {
489				compatible = "ti,ina238";
490				reg = <0x41>;
491			};
492			power-sensor@43 {
493				compatible = "ti,ina238";
494				reg = <0x43>;
495			};
496		};
497		i2c1mux0ch2: i2c@2 {
498			#address-cells = <1>;
499			#size-cells = <0>;
500			reg = <0x2>;
501		};
502		i2c1mux0ch3: i2c@3 {
503			#address-cells = <1>;
504			#size-cells = <0>;
505			reg = <0x3>;
506		};
507		i2c1mux0ch4: i2c@4 {
508			#address-cells = <1>;
509			#size-cells = <0>;
510			reg = <0x4>;
511
512			power-monitor@42 {
513				compatible = "lltc,ltc4287";
514				reg = <0x42>;
515				shunt-resistor-micro-ohms = <200>;
516			};
517			power-monitor@43 {
518				compatible = "lltc,ltc4287";
519				reg = <0x43>;
520				shunt-resistor-micro-ohms = <200>;
521			};
522		};
523		i2c1mux0ch5: i2c@5 {
524			#address-cells = <1>;
525			#size-cells = <0>;
526			reg = <0x5>;
527
528			// PDB FRU EEPROM
529			eeprom@54 {
530				compatible = "atmel,24c64";
531				reg = <0x54>;
532			};
533
534			// PDB TEMP SENSOR
535			temperature-sensor@4f {
536				compatible = "ti,tmp75";
537				reg = <0x4f>;
538			};
539		};
540		i2c1mux0ch6: i2c@6 {
541			#address-cells = <1>;
542			#size-cells = <0>;
543			reg = <0x6>;
544
545			// PDB IOEXP
546			io_expander5: gpio@27 {
547				compatible = "nxp,pca9554";
548				reg = <0x27>;
549				gpio-controller;
550				#gpio-cells = <2>;
551			};
552
553			// OSFP IOEXP
554			io_expander6: gpio@25 {
555				compatible = "nxp,pca9555";
556				reg = <0x25>;
557				gpio-controller;
558				#gpio-cells = <2>;
559			};
560
561			// OSFP FRU EEPROM
562			eeprom@51 {
563				compatible = "atmel,24c64";
564				reg = <0x51>;
565			};
566		};
567		i2c1mux0ch7: i2c@7 {
568			#address-cells = <1>;
569			#size-cells = <0>;
570			reg = <0x7>;
571
572			// FIO FRU EEPROM
573			eeprom@53 {
574				compatible = "atmel,24c64";
575				reg = <0x53>;
576			};
577
578			// FIO TEMP SENSOR
579			temperature-sensor@4b {
580				compatible = "ti,tmp75";
581				reg = <0x4b>;
582			};
583		};
584	};
585};
586
587&i2c2 {
588	status = "okay";
589
590	// Module 0 IOEXP
591	io_expander0: gpio@20 {
592		compatible = "nxp,pca9555";
593		reg = <0x20>;
594		gpio-controller;
595		#gpio-cells = <2>;
596		interrupt-parent = <&gpio0>;
597		interrupts = <ASPEED_GPIO(B, 4) IRQ_TYPE_LEVEL_LOW>;
598	};
599
600	// Module 1 IOEXP
601	io_expander1: gpio@21 {
602		compatible = "nxp,pca9555";
603		reg = <0x21>;
604		gpio-controller;
605		#gpio-cells = <2>;
606		interrupt-parent = <&gpio0>;
607		interrupts = <ASPEED_GPIO(B, 4) IRQ_TYPE_LEVEL_LOW>;
608	};
609
610	// HMC IOEXP
611	io_expander2: gpio@27 {
612		compatible = "nxp,pca9555";
613		reg = <0x27>;
614		gpio-controller;
615		#gpio-cells = <2>;
616		interrupt-parent = <&gpio0>;
617		interrupts = <ASPEED_GPIO(B, 4) IRQ_TYPE_LEVEL_LOW>;
618	};
619
620	// Module 0 EEPROM
621	eeprom@50 {
622		compatible = "atmel,24c64";
623		reg = <0x50>;
624	};
625
626	// Module 1 EEPROM
627	eeprom@51 {
628		compatible = "atmel,24c64";
629		reg = <0x51>;
630	};
631};
632
633&i2c3 {
634	status = "okay";
635};
636
637&i2c4 {
638	status = "okay";
639};
640
641&i2c5 {
642	status = "okay";
643};
644
645&i2c6 {
646	status = "okay";
647
648	// BMC IOEXP on Module 0
649	io_expander3: gpio@21 {
650		compatible = "nxp,pca9555";
651		reg = <0x21>;
652		gpio-controller;
653		#gpio-cells = <2>;
654	};
655
656	rtc@6f {
657		compatible = "nuvoton,nct3018y";
658		reg = <0x6f>;
659	};
660};
661
662&i2c7 {
663	status = "okay";
664};
665
666&i2c8 {
667	status = "okay";
668};
669
670&i2c9 {
671	status = "okay";
672
673	// SCM CPLD IOEXP
674	io_expander4: gpio@4f {
675		compatible = "nxp,pca9555";
676		reg = <0x4f>;
677		gpio-controller;
678		#gpio-cells = <2>;
679	};
680
681	// SCM TEMP SENSOR
682	temperature-sensor@4b {
683		compatible = "ti,tmp75";
684		reg = <0x4b>;
685	};
686
687	// SCM FRU EEPROM
688	eeprom@50 {
689		compatible = "atmel,24c64";
690		reg = <0x50>;
691	};
692
693	// BSM FRU EEPROM
694	eeprom@56 {
695		compatible = "atmel,24c64";
696		reg = <0x56>;
697	};
698};
699
700&i2c10 {
701	status = "okay";
702
703	// OCP NIC0 TEMP
704	temperature-sensor@1f {
705		compatible = "ti,tmp421";
706		reg = <0x1f>;
707	};
708
709	// OCP NIC0 FRU EEPROM
710	eeprom@50 {
711		compatible = "atmel,24c64";
712		reg = <0x50>;
713	};
714};
715
716&i2c11 {
717	status = "okay";
718
719	ssif-bmc@10 {
720		compatible = "ssif-bmc";
721		reg = <0x10>;
722	};
723};
724
725&i2c12 {
726	status = "okay";
727
728	// Module 1 FRU EEPROM
729	eeprom@50 {
730		compatible = "atmel,24c64";
731		reg = <0x50>;
732	};
733};
734
735&i2c13 {
736	status = "okay";
737
738	// Module 0 FRU EEPROM
739	eeprom@50 {
740		compatible = "atmel,24c64";
741		reg = <0x50>;
742	};
743
744	// Left CBC FRU EEPROM
745	eeprom@54 {
746		compatible = "atmel,24c02";
747		reg = <0x54>;
748	};
749
750	// Right CBC FRU EEPROM
751	eeprom@55 {
752		compatible = "atmel,24c02";
753		reg = <0x55>;
754	};
755
756	// HMC FRU EEPROM
757	eeprom@57 {
758		compatible = "atmel,24c02";
759		reg = <0x57>;
760	};
761};
762
763&i2c14 {
764	status = "okay";
765
766	// PDB CPLD IOEXP 0x10
767	io_expander9: gpio@10 {
768		compatible = "nxp,pca9555";
769		interrupt-parent = <&gpio0>;
770		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
771		reg = <0x10>;
772		gpio-controller;
773		#gpio-cells = <2>;
774	};
775
776	// PDB CPLD IOEXP 0x11
777	io_expander10: gpio@11 {
778		compatible = "nxp,pca9555";
779		interrupt-parent = <&gpio0>;
780		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
781		reg = <0x11>;
782		gpio-controller;
783		#gpio-cells = <2>;
784	};
785
786	// PDB CPLD IOEXP 0x12
787	io_expander11: gpio@12 {
788		compatible = "nxp,pca9555";
789		interrupt-parent = <&gpio0>;
790		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
791		reg = <0x12>;
792		gpio-controller;
793		#gpio-cells = <2>;
794	};
795
796	// PDB CPLD IOEXP 0x13
797	io_expander12: gpio@13 {
798		compatible = "nxp,pca9555";
799		interrupt-parent = <&gpio0>;
800		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
801		reg = <0x13>;
802		gpio-controller;
803		#gpio-cells = <2>;
804	};
805
806	// PDB CPLD IOEXP 0x14
807	io_expander13: gpio@14 {
808		compatible = "nxp,pca9555";
809		interrupt-parent = <&gpio0>;
810		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
811		reg = <0x14>;
812		gpio-controller;
813		#gpio-cells = <2>;
814	};
815
816	// PDB CPLD IOEXP 0x15
817	io_expander14: gpio@15 {
818		compatible = "nxp,pca9555";
819		interrupt-parent = <&gpio0>;
820		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
821		reg = <0x15>;
822		gpio-controller;
823		#gpio-cells = <2>;
824	};
825};
826
827&i2c15 {
828	status = "okay";
829
830	// OCP NIC1 TEMP
831	temperature-sensor@1f {
832		compatible = "ti,tmp421";
833		reg = <0x1f>;
834	};
835
836	// OCP NIC1 FRU EEPROM
837	eeprom@50 {
838		compatible = "atmel,24c64";
839		reg = <0x50>;
840	};
841};
842
843&adc0 {
844	vref-supply = <&p1v8_bmc_aux>;
845	status = "okay";
846
847	pinctrl-names = "default";
848	pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
849		&pinctrl_adc2_default &pinctrl_adc3_default
850		&pinctrl_adc4_default &pinctrl_adc5_default
851		&pinctrl_adc6_default &pinctrl_adc7_default>;
852};
853
854&adc1 {
855	vref-supply = <&p2v5_bmc_aux>;
856	status = "okay";
857
858	pinctrl-names = "default";
859	pinctrl-0 = <&pinctrl_adc10_default>;
860};
861
862&ehci0 {
863	status = "okay";
864};
865
866&wdt1 {
867	status = "okay";
868	pinctrl-names = "default";
869	pinctrl-0 = <&pinctrl_wdtrst1_default>;
870	aspeed,reset-type = "soc";
871	aspeed,external-signal;
872	aspeed,ext-push-pull;
873	aspeed,ext-active-high;
874	aspeed,ext-pulse-duration = <256>;
875};
876
877&pinctrl {
878	pinctrl_ncsi3_default: ncsi3_default {
879		function = "RMII3";
880		groups = "NCSI3";
881	};
882
883	pinctrl_ncsi4_default: ncsi4_default {
884		function = "RMII4";
885		groups = "NCSI4";
886	};
887};
888
889&gpio0 {
890	gpio-line-names =
891	/*A0-A7*/	"","","","","","","","",
892	/*B0-B7*/	"BATTERY_DETECT","PRSNT1_HPM_SCM_N",
893			"BMC_I2C1_FPGA_ALERT_L","BMC_READY",
894			"IOEXP_INT_L","FM_ID_LED",
895			"","",
896	/*C0-C7*/	"","","","",
897			"PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N",
898			"","BMC_I2C_SSIF_ALERT_L",
899	/*D0-D7*/	"","","","","","","","",
900	/*E0-E7*/	"","","","","","","","",
901	/*F0-F7*/	"","","","","","","","",
902	/*G0-G7*/	"","","","","","",
903			"FM_DEBUG_PORT_PRSNT_N","FM_BMC_DBP_PRESENT_N",
904	/*H0-H7*/	"PWR_BRAKE_L","RUN_POWER_EN",
905			"SHDN_FORCE_L","SHDN_REQ_L",
906			"","","","",
907	/*I0-I7*/	"","","","",
908			"","FLASH_WP_STATUS",
909			"FM_PDB_HEALTH_N","RUN_POWER_PG",
910	/*J0-J7*/	"","","","","","","","",
911	/*K0-K7*/	"","","","","","","","",
912	/*L0-L7*/	"","","","","","","","",
913	/*M0-M7*/	"PCIE_EP_RST_EN","BMC_FRU_WP",
914			"SCM_HPM_STBY_RST_N","SCM_HPM_STBY_EN",
915			"STBY_POWER_PG_3V3","TH500_SHDN_OK_L","","",
916	/*N0-N7*/	"LED_POSTCODE_0","LED_POSTCODE_1",
917			"LED_POSTCODE_2","LED_POSTCODE_3",
918			"LED_POSTCODE_4","LED_POSTCODE_5",
919			"LED_POSTCODE_6","LED_POSTCODE_7",
920	/*O0-O7*/	"HMC_I2C3_FPGA_ALERT_L","FPGA_READY_HMC",
921			"CHASSIS_AC_LOSS_L","BSM_PRSNT_R_N",
922			"PSU_SMB_ALERT_L","FM_TPM_PRSNT_0_N",
923			"","USBDBG_IPMI_EN_L",
924	/*P0-P7*/	"PWR_BTN_BMC_N","IPEX_CABLE_PRSNT_L",
925			"ID_RST_BTN_BMC_N","RST_BMC_RSTBTN_OUT_N",
926			"host0-ready","BMC_READY_CPLD","","BMC_HEARTBEAT_N",
927	/*Q0-Q7*/	"IRQ_PCH_TPM_SPI_N","USB_OC0_REAR_R_N",
928			"UART_MUX_SEL","I2C_MUX_RESET_L",
929			"RSVD_NV_PLT_DETECT","SPI_TPM_INT_L",
930			"CPU_JTAG_MUX_SELECT","THERM_BB_OVERT_L",
931	/*R0-R7*/	"THERM_BB_WARN_L","SPI_BMC_FPGA_INT_L",
932			"CPU_BOOT_DONE","PMBUS_GNT_L",
933			"CHASSIS_PWR_BRK_L","PCIE_WAKE_L",
934			"PDB_THERM_OVERT_L","HMC_I2C2_FPGA_ALERT_L",
935	/*S0-S7*/	"","","SYS_BMC_PWRBTN_R_N","FM_TPM_PRSNT_1_N",
936			"FM_BMC_DEBUG_SW_N","UID_LED_N",
937			"SYS_FAULT_LED_N","RUN_POWER_FAULT_L",
938	/*T0-T7*/	"","","","","","","","",
939	/*U0-U7*/	"","","","","","","","",
940	/*V0-V7*/	"L2_RST_REQ_OUT_L","L0L1_RST_REQ_OUT_L",
941			"BMC_ID_BEEP_SEL","BMC_I2C0_FPGA_ALERT_L",
942			"SMB_BMC_TMP_ALERT","PWR_LED_N",
943			"SYS_RST_OUT_L","IRQ_TPM_SPI_N",
944	/*W0-W7*/	"","","","","","","","",
945	/*X0-X7*/	"","","","","","","","",
946	/*Y0-Y7*/	"","RST_BMC_SELF_HW",
947			"FM_FLASH_LATCH_N","BMC_EMMC_RST_N",
948			"","","","",
949	/*Z0-Z7*/	"","","","","","","","";
950};
951
952&io_expander0 {
953	gpio-line-names =
954		"FPGA_THERM_OVERT_L","FPGA_READY_BMC",
955		"HMC_BMC_DETECT","HMC_PGOOD",
956		"","BMC_SELF_PWR_CYCLE",
957		"FPGA_EROT_FATAL_ERROR_L","WP_HW_EXT_CTRL_L",
958		"EROT_FPGA_RST_L","FPGA_EROT_RECOVERY_L",
959		"BMC_EROT_FPGA_SPI_MUX_SEL","USB2_HUB_RESET_L",
960		"NCSI_CS1_SEL","SGPIO_EN_L",
961		"B2B_IOEXP_INT_L","I2C_BUS_MUX_RESET_L";
962};
963
964&io_expander1 {
965	gpio-line-names =
966		"SEC_FPGA_THERM_OVERT_L","SEC_FPGA_READY_BMC",
967		"","",
968		"","",
969		"SEC_FPGA_EROT_FATAL_ERROR_L","SEC_WP_HW_EXT_CTRL_L",
970		"SEC_EROT_FPGA_RST_L","SEC_FPGA_EROT_RECOVERY_L",
971		"SEC_BMC_EROT_FPGA_SPI_MUX_SEL","",
972		"","",
973		"","SEC_I2C_BUS_MUX_RESET_L";
974};
975
976&io_expander2 {
977	gpio-line-names =
978		"HMC_PRSNT_L","HMC_READY",
979		"HMC_EROT_FATAL_ERROR_L","I2C_MUX_SEL",
980		"HMC_EROT_SPI_MUX_SEL","HMC_EROT_RECOVERY_L",
981		"HMC_EROT_RST_L","GLOBAL_WP_HMC",
982		"FPGA_RST_L","USB2_HUB_RST",
983		"CPU_UART_MUX_SEL","",
984		"","","","";
985};
986
987&io_expander3 {
988	gpio-line-names =
989		"RTC_MUX_SEL","PCI_MUX_SEL","TPM_MUX_SEL","FAN_MUX-SEL",
990		"SGMII_MUX_SEL","DP_MUX_SEL","UPHY3_USB_SEL","NCSI_MUX_SEL",
991		"BMC_PHY_RST","RTC_CLR_L","BMC_12V_CTRL","PS_RUN_IO0_PG",
992		"","","","";
993};
994
995&io_expander4 {
996	gpio-line-names =
997		"stby_power_en_cpld","stby_power_gd_cpld","","",
998		"","","","",
999		"","","","",
1000		"","","","";
1001};
1002
1003&io_expander5 {
1004	gpio-line-names =
1005		"JTAG_MUX_SEL","IOX_BMC_RESET","","",
1006		"","","","";
1007};
1008
1009&io_expander6 {
1010	gpio-line-names =
1011		"OSFP_PHASE_ID0","OSFP_PHASE_ID1",
1012		"OSFP_PHASE_ID2","OSFP_PHASE_ID3",
1013		"","","","",
1014		"OSFP_BOARD_ID0","OSFP_BOARD_ID1",
1015		"OSFP_BOARD_ID2","PWRGD_P3V3_N1",
1016		"PWRGD_P3V3_N2","","","";
1017};
1018
1019&io_expander7 {
1020	gpio-line-names =
1021		"RST_CX7_0","RST_CX7_1",
1022		"CX0_SSD0_PRSNT_L","CX1_SSD1_PRSNT_L",
1023		"CX_BOOT_CMPLT_CX0","CX_BOOT_CMPLT_CX1",
1024		"CX_TWARN_CX0_L","CX_TWARN_CX1_L",
1025		"CX_OVT_SHDN_CX0","CX_OVT_SHDN_CX1",
1026		"FNP_L_CX0","FNP_L_CX1",
1027		"","MCU_GPIO","MCU_RST_N","MCU_RECOVERY_N";
1028};
1029
1030&io_expander8 {
1031	gpio-line-names =
1032		"SEC_RST_CX7_0","SEC_RST_CX7_1",
1033		"SEC_CX0_SSD0_PRSNT_L","SEC_CX1_SSD1_PRSNT_L",
1034		"SEC_CX_BOOT_CMPLT_CX0","SEC_CX_BOOT_CMPLT_CX1",
1035		"SEC_CX_TWARN_CX0_L","SEC_CX_TWARN_CX1_L",
1036		"SEC_CX_OVT_SHDN_CX0","SEC_CX_OVT_SHDN_CX1",
1037		"SEC_FNP_L_CX0","SEC_FNP_L_CX1",
1038		"","SEC_MCU_GPIO","SEC_MCU_RST_N","SEC_MCU_RECOVERY_N";
1039};
1040
1041&io_expander9 {
1042	gpio-line-names =
1043		"LEAK3_DETECT_R","LEAK1_DETECT_R",
1044		"LEAK2_DETECT_R","LEAK0_DETECT_R",
1045		"CHASSIS3_LEAK_Q_N_PLD","CHASSIS1_LEAK_Q_N_PLD",
1046		"CHASSIS2_LEAK_Q_N_PLD","CHASSIS0_LEAK_Q_N_PLD",
1047		"P12V_AUX_FAN_ALERT_PLD_N","P12V_AUX_FAN_OC_PLD_N",
1048		"P12V_AUX_FAN_FAULT_PLD_N","LEAK_DETECT_RMC_N_R",
1049		"RSVD_RMC_GPIO3_R","SMB_RJ45_FIO_TMP_ALERT",
1050		"","";
1051};
1052
1053&io_expander10 {
1054	gpio-line-names =
1055		"FM_P12V_NIC1_FLTB_R_N","FM_P3V3_NIC1_FAULT_R_N",
1056		"OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N",
1057		"P12V_AUX_NIC1_SENSE_ALERT_R_N",
1058		"FM_P12V_NIC0_FLTB_R_N","FM_P3V3_NIC0_FAULT_R_N",
1059		"OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N",
1060		"P12V_AUX_NIC0_SENSE_ALERT_R_N",
1061		"P12V_AUX_PSU_SMB_ALERT_R_L","P12V_SCM_SENSE_ALERT_R_N",
1062		"NODEB_PSU_SMB_ALERT_R_L","NODEA_PSU_SMB_ALERT_R_L",
1063		"P52V_SENSE_ALERT_PLD_N","P48V_HS2_FAULT_N_PLD",
1064		"P48V_HS1_FAULT_N_PLD","";
1065};
1066
1067&io_expander11 {
1068	gpio-line-names =
1069		"FAN_7_PRESENT_N","FAN_6_PRESENT_N",
1070		"FAN_5_PRESENT_N","FAN_4_PRESENT_N",
1071		"FAN_3_PRESENT_N","FAN_2_PRESENT_N",
1072		"FAN_1_PRESENT_N","FAN_0_PRESENT_N",
1073		"PRSNT_CHASSIS3_LEAK_CABLE_R_N","PRSNT_CHASSIS1_LEAK_CABLE_R_N",
1074		"PRSNT_CHASSIS2_LEAK_CABLE_R_N","PRSNT_CHASSIS0_LEAK_CABLE_R_N",
1075		"PRSNT_RJ45_FIO_N_R","PRSNT_HDDBD_POWER_CABLE_N",
1076		"PRSNT_OSFP_POWER_CABLE_N","";
1077};
1078
1079&io_expander12 {
1080	gpio-line-names =
1081		"RST_OCP_V3_1_R_N","NIC0_PERST_N",
1082		"OCP_SFF_PERST_FROM_HOST_ISO_PLD_N","OCP_SFF_MAIN_PWR_EN",
1083		"FM_OCP_SFF_PWR_GOOD_PLD","OCP_SFF_AUX_PWR_PLD_EN_R",
1084		"HP_LVC3_OCP_V3_1_PWRGD_PLD","HP_OCP_V3_1_HSC_PWRGD_PLD_R",
1085		"RST_OCP_V3_2_R_N","NIC1_PERST_N",
1086		"OCP_V3_2_PERST_FROM_HOST_ISO_PLD_N","OCP_V3_2_MAIN_PWR_EN",
1087		"FM_OCP_V3_2_PWR_GOOD_PLD","OCP_V3_2_AUX_PWR_PLD_EN_R",
1088		"HP_LVC3_OCP_V3_2_PWRGD_PLD","HP_OCP_V3_2_HSC_PWRGD_PLD_R";
1089};
1090
1091&io_expander13 {
1092	gpio-line-names =
1093		"NODEA_NODEB_PWOK_PLD_ISO_R","PWR_EN_NICS",
1094		"PWRGD_P12V_AUX_FAN_PLD","P12V_AUX_FAN_EN_PLD",
1095		"PWRGD_P3V3_AUX_PLD","PWRGD_P12V_AUX_PLD_ISO_R",
1096		"FM_MAIN_PWREN_FROM_RMC_R","FM_MAIN_PWREN_RMC_EN_ISO_R",
1097		"PWRGD_RMC_R","PWRGD_P12V_AUX_FAN_PLD",
1098		"P12V_AUX_FAN_EN_PLD","FM_SYS_THROTTLE_N",
1099		"HP_LVC3_OCP_V3_2_PRSNT2_PLD_N","HP_LVC3_OCP_V3_1_PRSNT2_PLD_N",
1100		"","";
1101};
1102
1103&io_expander14 {
1104	gpio-line-names =
1105		"","","","","","","","",
1106		"FM_BOARD_BMC_SKU_ID3","FM_BOARD_BMC_SKU_ID2",
1107		"FM_BOARD_BMC_SKU_ID1","FM_BOARD_BMC_SKU_ID0",
1108		"FAB_BMC_REV_ID2","FAB_BMC_REV_ID1",
1109		"FAB_BMC_REV_ID0","";
1110};
1111