1// SPDX-License-Identifier: GPL-2.0+ 2/dts-v1/; 3 4#include "aspeed-g5.dtsi" 5#include <dt-bindings/gpio/aspeed-gpio.h> 6#include <dt-bindings/i2c/i2c.h> 7#include <dt-bindings/interrupt-controller/irq.h> 8#include <dt-bindings/watchdog/aspeed-wdt.h> 9 10/{ 11 model = "ASRock E3C256D4I BMC"; 12 compatible = "asrock,e3c256d4i-bmc", "aspeed,ast2500"; 13 14 aliases { 15 serial4 = &uart5; 16 17 i2c20 = &i2c2mux0ch0; 18 i2c21 = &i2c2mux0ch1; 19 i2c22 = &i2c2mux0ch2; 20 i2c23 = &i2c2mux0ch3; 21 }; 22 23 chosen { 24 stdout-path = &uart5; 25 bootargs = "console=tty0 console=ttyS4,115200 earlycon"; 26 }; 27 28 memory@80000000 { 29 reg = <0x80000000 0x20000000>; 30 }; 31 32 leds { 33 compatible = "gpio-leds"; 34 35 heartbeat { 36 gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; 37 linux,default-trigger = "timer"; 38 }; 39 40 system-fault { 41 gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>; 42 panic-indicator; 43 }; 44 }; 45 46 iio-hwmon { 47 compatible = "iio-hwmon"; 48 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 49 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, 50 <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, 51 <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; 52 }; 53}; 54 55&fmc { 56 status = "okay"; 57 flash@0 { 58 status = "okay"; 59 m25p,fast-read; 60 label = "bmc"; 61 spi-max-frequency = <100000000>; /* 100 MHz */ 62#include "openbmc-flash-layout-64.dtsi" 63 }; 64}; 65 66&uart1 { 67 status = "okay"; 68}; 69 70&uart2 { 71 status = "okay"; 72}; 73 74&uart3 { 75 status = "okay"; 76}; 77 78&uart4 { 79 status = "okay"; 80}; 81 82&uart5 { 83 status = "okay"; 84}; 85 86&uart_routing { 87 status = "okay"; 88}; 89 90&mac0 { 91 status = "okay"; 92 93 pinctrl-names = "default"; 94 pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; 95 96 nvmem-cells = <ð0_macaddress>; 97 nvmem-cell-names = "mac-address"; 98}; 99 100&i2c0 { 101 status = "okay"; 102}; 103 104&i2c1 { 105 status = "okay"; 106}; 107 108&i2c2 { 109 status = "okay"; 110 111 i2c-mux@70 { 112 compatible = "nxp,pca9545"; 113 reg = <0x70>; 114 #address-cells = <1>; 115 #size-cells = <0>; 116 117 i2c2mux0ch0: i2c@0 { 118 #address-cells = <1>; 119 #size-cells = <0>; 120 reg = <0>; 121 }; 122 123 i2c2mux0ch1: i2c@1 { 124 #address-cells = <1>; 125 #size-cells = <0>; 126 reg = <1>; 127 }; 128 129 i2c2mux0ch2: i2c@2 { 130 #address-cells = <1>; 131 #size-cells = <0>; 132 reg = <2>; 133 }; 134 135 i2c2mux0ch3: i2c@3 { 136 #address-cells = <1>; 137 #size-cells = <0>; 138 reg = <3>; 139 }; 140 }; 141}; 142 143&i2c3 { 144 status = "okay"; 145}; 146 147&i2c4 { 148 status = "okay"; 149}; 150 151&i2c5 { 152 status = "okay"; 153}; 154 155&i2c6 { 156 status = "okay"; 157}; 158 159&i2c7 { 160 status = "okay"; 161}; 162 163&i2c9 { 164 status = "okay"; 165}; 166 167&i2c10 { 168 status = "okay"; 169}; 170 171&i2c11 { 172 status = "okay"; 173 174 vrm@60 { 175 compatible = "renesas,isl69269", "isl69269"; 176 reg = <0x60>; 177 }; 178}; 179 180&i2c12 { 181 status = "okay"; 182 183 /* FRU eeprom */ 184 eeprom@57 { 185 compatible = "st,24c128", "atmel,24c128"; 186 #address-cells = <1>; 187 #size-cells = <1>; 188 reg = <0x57>; 189 pagesize = <16>; 190 191 eth0_macaddress: macaddress@3f80 { 192 reg = <0x3f80 6>; 193 }; 194 }; 195}; 196 197&video { 198 status = "okay"; 199}; 200 201&vhub { 202 status = "okay"; 203}; 204 205&lpc_ctrl { 206 status = "okay"; 207}; 208 209&lpc_snoop { 210 status = "okay"; 211 snoop-ports = <0x80>; 212}; 213 214&kcs3 { 215 status = "okay"; 216 aspeed,lpc-io-reg = <0xca2>; 217}; 218 219&peci0 { 220 status = "okay"; 221}; 222 223&wdt1 { 224 aspeed,reset-mask = <(AST2500_WDT_RESET_DEFAULT & ~AST2500_WDT_RESET_LPC)>; 225}; 226 227&wdt2 { 228 aspeed,reset-mask = <(AST2500_WDT_RESET_DEFAULT & ~AST2500_WDT_RESET_LPC)>; 229}; 230 231&pwm_tacho { 232 status = "okay"; 233 pinctrl-names = "default"; 234 pinctrl-0 = <&pinctrl_pwm0_default /* CPU */ 235 &pinctrl_pwm2_default /* rear */ 236 &pinctrl_pwm4_default>; /* front */ 237 238 /* CPU */ 239 fan@0 { 240 reg = <0x00>; 241 aspeed,fan-tach-ch = /bits/ 8 <0x00>; 242 }; 243 244 /* rear */ 245 fan@2 { 246 reg = <0x02>; 247 aspeed,fan-tach-ch = /bits/ 8 <0x02>; 248 }; 249 250 /* front */ 251 fan@4 { 252 reg = <0x04>; 253 aspeed,fan-tach-ch = /bits/ 8 <0x04>; 254 }; 255}; 256 257&gpio { 258 status = "okay"; 259 gpio-line-names = 260 /* A */ "", "", "NMI_BTN_N", "BMC_NMI", "", "", "", "", 261 /* B */ "", "", "", "", "", "", "", "", 262 /* C */ "", "", "", "", "", "", "", "", 263 /* D */ "BMC_PSIN", "BMC_PSOUT", "BMC_RESETCON", "RESETCON", 264 "", "", "", "", 265 /* E */ "", "", "", "", "", "", "", "", 266 /* F */ "LOCATORLED_STATUS_N", "LOCATORBTN", "", "", 267 "", "", "BMC_PCH_SCI_LPC", "BMC_NCSI_MUX_CTL", 268 /* G */ "HWM_BAT_EN", "CHASSIS_ID0", "CHASSIS_ID1", "CHASSIS_ID2", 269 "", "", "", "", 270 /* H */ "FM_ME_RCVR_N", "O_PWROK", "", "D4_DIMM_EVENT_3V_N", 271 "MFG_MODE_N", "BMC_RTCRST", "BMC_HB_LED_N", "BMC_CASEOPEN", 272 /* I */ "", "", "", "", "", "", "", "", 273 /* J */ "BMC_READY", "BMC_PCH_BIOS_CS_N", "BMC_SMI", "", "", "", "", "", 274 /* K */ "", "", "", "", "", "", "", "", 275 /* L */ "", "", "", "", "", "", "", "", 276 /* M */ "", "", "", "", "", "", "", "", 277 /* N */ "", "", "", "", "", "", "", "", 278 /* O */ "", "", "", "", "", "", "", "", 279 /* P */ "", "", "", "", "", "", "", "", 280 /* Q */ "", "", "", "", "", "", "", "", 281 /* R */ "", "", "", "", "", "", "", "", 282 /* S */ "PCHHOT_BMC_N", "", "RSMRST", "", "", "", "", "", 283 /* T */ "", "", "", "", "", "", "", "", 284 /* U */ "", "", "", "", "", "", "", "", 285 /* V */ "", "", "", "", "", "", "", "", 286 /* W */ "", "", "", "", "", "", "", "", 287 /* X */ "", "", "", "", "", "", "", "", 288 /* Y */ "SLP_S3", "SLP_S5", "", "", "", "", "", "", 289 /* Z */ "CPU_CATERR_BMC_N", "", "SYSTEM_FAULT_LED_N", "BMC_THROTTLE_N", 290 "", "", "", "", 291 /* AA */ "CPU1_THERMTRIP_LATCH_N", "", "CPU1_PROCHOT_N", "", 292 "", "", "IRQ_SMI_ACTIVE_N", "FM_BIOS_POST_CMPLT_N", 293 /* AB */ "", "", "ME_OVERRIDE", "BMC_DMI_MODIFY", "", "", "", "", 294 /* AC */ "", "", "", "", "", "", "", ""; 295}; 296 297&adc { 298 status = "okay"; 299 pinctrl-names = "default"; 300 pinctrl-0 = <&pinctrl_adc0_default /* 3VSB */ 301 &pinctrl_adc1_default /* 5VSB */ 302 &pinctrl_adc2_default /* CPU1 */ 303 &pinctrl_adc3_default /* VCCSA */ 304 &pinctrl_adc4_default /* VCCM */ 305 &pinctrl_adc5_default /* V10M */ 306 &pinctrl_adc6_default /* VCCIO */ 307 &pinctrl_adc7_default /* VCCGT */ 308 &pinctrl_adc8_default /* VPPM */ 309 &pinctrl_adc9_default /* BAT */ 310 &pinctrl_adc10_default /* 3V */ 311 &pinctrl_adc11_default /* 5V */ 312 &pinctrl_adc12_default /* 12V */ 313 &pinctrl_adc13_default /* GND */ 314 &pinctrl_adc14_default /* GND */ 315 &pinctrl_adc15_default>; /* GND */ 316}; 317