1/*
2 * linux/arch/arm/boot/compressed/head-sa1100.S
3 *
4 * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net>
5 *
6 * SA1100 specific tweaks.  This is merged into head.S by the linker.
7 *
8 */
9
10#include <linux/linkage.h>
11#include <asm/mach-types.h>
12
13		.section        ".start", "ax"
14		.arch	armv4
15
16__SA1100_start:
17
18		@ Preserve r8/r7 i.e. kernel entry values
19#ifdef CONFIG_SA1100_COLLIE
20		mov	r7, #MACH_TYPE_COLLIE
21#endif
22#ifdef CONFIG_SA1100_SIMPAD
23		@ UNTIL we've something like an open bootldr
24		mov	r7, #MACH_TYPE_SIMPAD	@should be 87
25#endif
26		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
27		ands	r0, r0, #0x0d
28		beq	99f
29
30		@ Data cache might be active.
31		@ Be sure to flush kernel binary out of the cache,
32		@ whatever state it is, before it is turned off.
33		@ This is done by fetching through currently executed
34		@ memory to be sure we hit the same cache.
35		bic	r2, pc, #0x1f
36		add	r3, r2, #0x4000		@ 16 kb is quite enough...
371:		ldr	r0, [r2], #32
38		teq	r2, r3
39		bne	1b
40		mcr	p15, 0, r0, c7, c10, 4	@ drain WB
41		mcr	p15, 0, r0, c7, c7, 0	@ flush I & D caches
42
43		@ disabling MMU and caches
44		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
45		bic	r0, r0, #0x0d		@ clear WB, DC, MMU
46		bic	r0, r0, #0x1000		@ clear Icache
47		mcr	p15, 0, r0, c1, c0, 0
4899:
49