1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 4 */ 5 6 #include <linux/ptrace.h> 7 #include <linux/module.h> 8 #include <linux/mm.h> 9 #include <linux/fs.h> 10 #include <linux/kdev_t.h> 11 #include <linux/proc_fs.h> 12 #include <linux/file.h> 13 #include <linux/sched/mm.h> 14 #include <linux/sched/debug.h> 15 16 #include <asm/arcregs.h> 17 #include <asm/irqflags.h> 18 19 #define ARC_PATH_MAX 256 20 21 /* 22 * Common routine to print scratch regs (r0-r12) or callee regs (r13-r25) 23 * -Prints 3 regs per line and a CR. 24 * -To continue, callee regs right after scratch, special handling of CR 25 */ 26 static noinline void print_reg_file(long *reg_rev, int start_num) 27 { 28 unsigned int i; 29 char buf[512]; 30 int n = 0, len = sizeof(buf); 31 32 for (i = start_num; i < start_num + 13; i++) { 33 n += scnprintf(buf + n, len - n, "r%02u: 0x%08lx\t", 34 i, (unsigned long)*reg_rev); 35 36 if (((i + 1) % 3) == 0) 37 n += scnprintf(buf + n, len - n, "\n"); 38 39 /* because pt_regs has regs reversed: r12..r0, r25..r13 */ 40 if (is_isa_arcv2() && start_num == 0) 41 reg_rev++; 42 else 43 reg_rev--; 44 } 45 46 if (start_num != 0) 47 n += scnprintf(buf + n, len - n, "\n\n"); 48 49 /* To continue printing callee regs on same line as scratch regs */ 50 if (start_num == 0) 51 pr_info("%s", buf); 52 else 53 pr_cont("%s\n", buf); 54 } 55 56 static void show_callee_regs(struct callee_regs *cregs) 57 { 58 print_reg_file(&(cregs->r13), 13); 59 } 60 61 static void print_task_path_n_nm(struct task_struct *tsk) 62 { 63 char *path_nm = NULL; 64 struct mm_struct *mm; 65 struct file *exe_file; 66 char buf[ARC_PATH_MAX]; 67 68 mm = get_task_mm(tsk); 69 if (!mm) 70 goto done; 71 72 exe_file = get_mm_exe_file(mm); 73 mmput(mm); 74 75 if (exe_file) { 76 path_nm = file_path(exe_file, buf, ARC_PATH_MAX-1); 77 fput(exe_file); 78 } 79 80 done: 81 pr_info("Path: %s\n", !IS_ERR(path_nm) ? path_nm : "?"); 82 } 83 84 static void show_faulting_vma(unsigned long address) 85 { 86 struct vm_area_struct *vma; 87 struct mm_struct *active_mm = current->active_mm; 88 89 /* can't use print_vma_addr() yet as it doesn't check for 90 * non-inclusive vma 91 */ 92 down_read(&active_mm->mmap_sem); 93 vma = find_vma(active_mm, address); 94 95 /* check against the find_vma( ) behaviour which returns the next VMA 96 * if the container VMA is not found 97 */ 98 if (vma && (vma->vm_start <= address)) { 99 char buf[ARC_PATH_MAX]; 100 char *nm = "?"; 101 102 if (vma->vm_file) { 103 nm = file_path(vma->vm_file, buf, ARC_PATH_MAX-1); 104 if (IS_ERR(nm)) 105 nm = "?"; 106 } 107 pr_info(" @off 0x%lx in [%s] VMA: 0x%08lx to 0x%08lx\n", 108 vma->vm_start < TASK_UNMAPPED_BASE ? 109 address : address - vma->vm_start, 110 nm, vma->vm_start, vma->vm_end); 111 } else 112 pr_info(" @No matching VMA found\n"); 113 114 up_read(&active_mm->mmap_sem); 115 } 116 117 static void show_ecr_verbose(struct pt_regs *regs) 118 { 119 unsigned int vec, cause_code; 120 unsigned long address; 121 122 /* For Data fault, this is data address not instruction addr */ 123 address = current->thread.fault_address; 124 125 vec = regs->ecr_vec; 126 cause_code = regs->ecr_cause; 127 128 /* For DTLB Miss or ProtV, display the memory involved too */ 129 if (vec == ECR_V_DTLB_MISS) { 130 pr_cont("Invalid %s @ 0x%08lx by insn @ %pS\n", 131 (cause_code == 0x01) ? "Read" : 132 ((cause_code == 0x02) ? "Write" : "EX"), 133 address, (void *)regs->ret); 134 } else if (vec == ECR_V_ITLB_MISS) { 135 pr_cont("Insn could not be fetched\n"); 136 } else if (vec == ECR_V_MACH_CHK) { 137 pr_cont("Machine Check (%s)\n", (cause_code == 0x0) ? 138 "Double Fault" : "Other Fatal Err"); 139 140 } else if (vec == ECR_V_PROTV) { 141 if (cause_code == ECR_C_PROTV_INST_FETCH) 142 pr_cont("Execute from Non-exec Page\n"); 143 else if (cause_code == ECR_C_PROTV_MISALIG_DATA && 144 IS_ENABLED(CONFIG_ISA_ARCOMPACT)) 145 pr_cont("Misaligned r/w from 0x%08lx\n", address); 146 else 147 pr_cont("%s access not allowed on page\n", 148 (cause_code == 0x01) ? "Read" : 149 ((cause_code == 0x02) ? "Write" : "EX")); 150 } else if (vec == ECR_V_INSN_ERR) { 151 pr_cont("Illegal Insn\n"); 152 #ifdef CONFIG_ISA_ARCV2 153 } else if (vec == ECR_V_MEM_ERR) { 154 if (cause_code == 0x00) 155 pr_cont("Bus Error from Insn Mem\n"); 156 else if (cause_code == 0x10) 157 pr_cont("Bus Error from Data Mem\n"); 158 else 159 pr_cont("Bus Error, check PRM\n"); 160 } else if (vec == ECR_V_MISALIGN) { 161 pr_cont("Misaligned r/w from 0x%08lx\n", address); 162 #endif 163 } else if (vec == ECR_V_TRAP) { 164 if (regs->ecr_param == 5) 165 pr_cont("gcc generated __builtin_trap\n"); 166 } else { 167 pr_cont("Check Programmer's Manual\n"); 168 } 169 } 170 171 /************************************************************************ 172 * API called by rest of kernel 173 ***********************************************************************/ 174 175 void show_regs(struct pt_regs *regs) 176 { 177 struct task_struct *tsk = current; 178 struct callee_regs *cregs; 179 180 /* 181 * generic code calls us with preemption disabled, but some calls 182 * here could sleep, so re-enable to avoid lockdep splat 183 */ 184 preempt_enable(); 185 186 print_task_path_n_nm(tsk); 187 show_regs_print_info(KERN_INFO); 188 189 show_ecr_verbose(regs); 190 191 if (user_mode(regs)) 192 show_faulting_vma(regs->ret); /* faulting code, not data */ 193 194 pr_info("ECR: 0x%08lx EFA: 0x%08lx ERET: 0x%08lx\n", 195 regs->event, current->thread.fault_address, regs->ret); 196 197 pr_info("STAT32: 0x%08lx", regs->status32); 198 199 #define STS_BIT(r, bit) r->status32 & STATUS_##bit##_MASK ? #bit" " : "" 200 201 #ifdef CONFIG_ISA_ARCOMPACT 202 pr_cont(" [%2s%2s%2s%2s%2s%2s%2s]", 203 (regs->status32 & STATUS_U_MASK) ? "U " : "K ", 204 STS_BIT(regs, DE), STS_BIT(regs, AE), 205 STS_BIT(regs, A2), STS_BIT(regs, A1), 206 STS_BIT(regs, E2), STS_BIT(regs, E1)); 207 #else 208 pr_cont(" [%2s%2s%2s%2s]", 209 STS_BIT(regs, IE), 210 (regs->status32 & STATUS_U_MASK) ? "U " : "K ", 211 STS_BIT(regs, DE), STS_BIT(regs, AE)); 212 #endif 213 pr_cont(" BTA: 0x%08lx\n", regs->bta); 214 pr_info("BLK: %pS\n SP: 0x%08lx FP: 0x%08lx\n", 215 (void *)regs->blink, regs->sp, regs->fp); 216 pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", 217 regs->lp_start, regs->lp_end, regs->lp_count); 218 219 /* print regs->r0 thru regs->r12 220 * Sequential printing was generating horrible code 221 */ 222 print_reg_file(&(regs->r0), 0); 223 224 /* If Callee regs were saved, display them too */ 225 cregs = (struct callee_regs *)current->thread.callee_reg; 226 if (cregs) 227 show_callee_regs(cregs); 228 229 preempt_disable(); 230 } 231 232 void show_kernel_fault_diag(const char *str, struct pt_regs *regs, 233 unsigned long address) 234 { 235 current->thread.fault_address = address; 236 237 /* Show fault description */ 238 pr_info("\n%s\n", str); 239 240 /* Caller and Callee regs */ 241 show_regs(regs); 242 243 /* Show stack trace if this Fatality happened in kernel mode */ 244 if (!user_mode(regs)) 245 show_stacktrace(current, regs); 246 } 247