1 /* 2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * RajeshwarR: Dec 11, 2007 9 * -- Added support for Inter Processor Interrupts 10 * 11 * Vineetg: Nov 1st, 2007 12 * -- Initial Write (Borrowed heavily from ARM) 13 */ 14 15 #include <linux/spinlock.h> 16 #include <linux/sched.h> 17 #include <linux/interrupt.h> 18 #include <linux/profile.h> 19 #include <linux/mm.h> 20 #include <linux/cpu.h> 21 #include <linux/irq.h> 22 #include <linux/atomic.h> 23 #include <linux/cpumask.h> 24 #include <linux/reboot.h> 25 #include <linux/irqdomain.h> 26 #include <asm/processor.h> 27 #include <asm/setup.h> 28 #include <asm/mach_desc.h> 29 30 #ifndef CONFIG_ARC_HAS_LLSC 31 arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED; 32 arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED; 33 #endif 34 35 struct plat_smp_ops __weak plat_smp_ops; 36 37 /* XXX: per cpu ? Only needed once in early seconday boot */ 38 struct task_struct *secondary_idle_tsk; 39 40 /* Called from start_kernel */ 41 void __init smp_prepare_boot_cpu(void) 42 { 43 } 44 45 /* 46 * Called from setup_arch() before calling setup_processor() 47 * 48 * - Initialise the CPU possible map early - this describes the CPUs 49 * which may be present or become present in the system. 50 * - Call early smp init hook. This can initialize a specific multi-core 51 * IP which is say common to several platforms (hence not part of 52 * platform specific int_early() hook) 53 */ 54 void __init smp_init_cpus(void) 55 { 56 unsigned int i; 57 58 for (i = 0; i < NR_CPUS; i++) 59 set_cpu_possible(i, true); 60 61 if (plat_smp_ops.init_early_smp) 62 plat_smp_ops.init_early_smp(); 63 } 64 65 /* called from init ( ) => process 1 */ 66 void __init smp_prepare_cpus(unsigned int max_cpus) 67 { 68 int i; 69 70 /* 71 * if platform didn't set the present map already, do it now 72 * boot cpu is set to present already by init/main.c 73 */ 74 if (num_present_cpus() <= 1) { 75 for (i = 0; i < max_cpus; i++) 76 set_cpu_present(i, true); 77 } 78 } 79 80 void __init smp_cpus_done(unsigned int max_cpus) 81 { 82 83 } 84 85 /* 86 * Default smp boot helper for Run-on-reset case where all cores start off 87 * together. Non-masters need to wait for Master to start running. 88 * This is implemented using a flag in memory, which Non-masters spin-wait on. 89 * Master sets it to cpu-id of core to "ungate" it. 90 */ 91 static volatile int wake_flag; 92 93 static void arc_default_smp_cpu_kick(int cpu, unsigned long pc) 94 { 95 BUG_ON(cpu == 0); 96 wake_flag = cpu; 97 } 98 99 void arc_platform_smp_wait_to_boot(int cpu) 100 { 101 /* for halt-on-reset, we've waited already */ 102 if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET)) 103 return; 104 105 while (wake_flag != cpu) 106 ; 107 108 wake_flag = 0; 109 } 110 111 const char *arc_platform_smp_cpuinfo(void) 112 { 113 return plat_smp_ops.info ? : ""; 114 } 115 116 /* 117 * The very first "C" code executed by secondary 118 * Called from asm stub in head.S 119 * "current"/R25 already setup by low level boot code 120 */ 121 void start_kernel_secondary(void) 122 { 123 struct mm_struct *mm = &init_mm; 124 unsigned int cpu = smp_processor_id(); 125 126 /* MMU, Caches, Vector Table, Interrupts etc */ 127 setup_processor(); 128 129 atomic_inc(&mm->mm_users); 130 atomic_inc(&mm->mm_count); 131 current->active_mm = mm; 132 cpumask_set_cpu(cpu, mm_cpumask(mm)); 133 134 /* Some SMP H/w setup - for each cpu */ 135 if (plat_smp_ops.init_per_cpu) 136 plat_smp_ops.init_per_cpu(cpu); 137 138 if (machine_desc->init_per_cpu) 139 machine_desc->init_per_cpu(cpu); 140 141 notify_cpu_starting(cpu); 142 set_cpu_online(cpu, true); 143 144 pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu); 145 146 local_irq_enable(); 147 preempt_disable(); 148 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 149 } 150 151 /* 152 * Called from kernel_init( ) -> smp_init( ) - for each CPU 153 * 154 * At this point, Secondary Processor is "HALT"ed: 155 * -It booted, but was halted in head.S 156 * -It was configured to halt-on-reset 157 * So need to wake it up. 158 * 159 * Essential requirements being where to run from (PC) and stack (SP) 160 */ 161 int __cpu_up(unsigned int cpu, struct task_struct *idle) 162 { 163 unsigned long wait_till; 164 165 secondary_idle_tsk = idle; 166 167 pr_info("Idle Task [%d] %p", cpu, idle); 168 pr_info("Trying to bring up CPU%u ...\n", cpu); 169 170 if (plat_smp_ops.cpu_kick) 171 plat_smp_ops.cpu_kick(cpu, 172 (unsigned long)first_lines_of_secondary); 173 else 174 arc_default_smp_cpu_kick(cpu, (unsigned long)NULL); 175 176 /* wait for 1 sec after kicking the secondary */ 177 wait_till = jiffies + HZ; 178 while (time_before(jiffies, wait_till)) { 179 if (cpu_online(cpu)) 180 break; 181 } 182 183 if (!cpu_online(cpu)) { 184 pr_info("Timeout: CPU%u FAILED to comeup !!!\n", cpu); 185 return -1; 186 } 187 188 secondary_idle_tsk = NULL; 189 190 return 0; 191 } 192 193 /* 194 * not supported here 195 */ 196 int setup_profiling_timer(unsigned int multiplier) 197 { 198 return -EINVAL; 199 } 200 201 /*****************************************************************************/ 202 /* Inter Processor Interrupt Handling */ 203 /*****************************************************************************/ 204 205 enum ipi_msg_type { 206 IPI_EMPTY = 0, 207 IPI_RESCHEDULE = 1, 208 IPI_CALL_FUNC, 209 IPI_CPU_STOP, 210 }; 211 212 /* 213 * In arches with IRQ for each msg type (above), receiver can use IRQ-id to 214 * figure out what msg was sent. For those which don't (ARC has dedicated IPI 215 * IRQ), the msg-type needs to be conveyed via per-cpu data 216 */ 217 218 static DEFINE_PER_CPU(unsigned long, ipi_data); 219 220 static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg) 221 { 222 unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu); 223 unsigned long old, new; 224 unsigned long flags; 225 226 pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu); 227 228 local_irq_save(flags); 229 230 /* 231 * Atomically write new msg bit (in case others are writing too), 232 * and read back old value 233 */ 234 do { 235 new = old = ACCESS_ONCE(*ipi_data_ptr); 236 new |= 1U << msg; 237 } while (cmpxchg(ipi_data_ptr, old, new) != old); 238 239 /* 240 * Call the platform specific IPI kick function, but avoid if possible: 241 * Only do so if there's no pending msg from other concurrent sender(s). 242 * Otherwise, recevier will see this msg as well when it takes the 243 * IPI corresponding to that msg. This is true, even if it is already in 244 * IPI handler, because !@old means it has not yet dequeued the msg(s) 245 * so @new msg can be a free-loader 246 */ 247 if (plat_smp_ops.ipi_send && !old) 248 plat_smp_ops.ipi_send(cpu); 249 250 local_irq_restore(flags); 251 } 252 253 static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg) 254 { 255 unsigned int cpu; 256 257 for_each_cpu(cpu, callmap) 258 ipi_send_msg_one(cpu, msg); 259 } 260 261 void smp_send_reschedule(int cpu) 262 { 263 ipi_send_msg_one(cpu, IPI_RESCHEDULE); 264 } 265 266 void smp_send_stop(void) 267 { 268 struct cpumask targets; 269 cpumask_copy(&targets, cpu_online_mask); 270 cpumask_clear_cpu(smp_processor_id(), &targets); 271 ipi_send_msg(&targets, IPI_CPU_STOP); 272 } 273 274 void arch_send_call_function_single_ipi(int cpu) 275 { 276 ipi_send_msg_one(cpu, IPI_CALL_FUNC); 277 } 278 279 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 280 { 281 ipi_send_msg(mask, IPI_CALL_FUNC); 282 } 283 284 /* 285 * ipi_cpu_stop - handle IPI from smp_send_stop() 286 */ 287 static void ipi_cpu_stop(void) 288 { 289 machine_halt(); 290 } 291 292 static inline int __do_IPI(unsigned long msg) 293 { 294 int rc = 0; 295 296 switch (msg) { 297 case IPI_RESCHEDULE: 298 scheduler_ipi(); 299 break; 300 301 case IPI_CALL_FUNC: 302 generic_smp_call_function_interrupt(); 303 break; 304 305 case IPI_CPU_STOP: 306 ipi_cpu_stop(); 307 break; 308 309 default: 310 rc = 1; 311 } 312 313 return rc; 314 } 315 316 /* 317 * arch-common ISR to handle for inter-processor interrupts 318 * Has hooks for platform specific IPI 319 */ 320 irqreturn_t do_IPI(int irq, void *dev_id) 321 { 322 unsigned long pending; 323 unsigned long __maybe_unused copy; 324 325 pr_debug("IPI [%ld] received on cpu %d\n", 326 *this_cpu_ptr(&ipi_data), smp_processor_id()); 327 328 if (plat_smp_ops.ipi_clear) 329 plat_smp_ops.ipi_clear(irq); 330 331 /* 332 * "dequeue" the msg corresponding to this IPI (and possibly other 333 * piggybacked msg from elided IPIs: see ipi_send_msg_one() above) 334 */ 335 copy = pending = xchg(this_cpu_ptr(&ipi_data), 0); 336 337 do { 338 unsigned long msg = __ffs(pending); 339 int rc; 340 341 rc = __do_IPI(msg); 342 if (rc) 343 pr_info("IPI with bogus msg %ld in %ld\n", msg, copy); 344 pending &= ~(1U << msg); 345 } while (pending); 346 347 return IRQ_HANDLED; 348 } 349 350 /* 351 * API called by platform code to hookup arch-common ISR to their IPI IRQ 352 * 353 * Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map 354 * function needs to call call irq_set_percpu_devid() for IPI IRQ, otherwise 355 * request_percpu_irq() below will fail 356 */ 357 static DEFINE_PER_CPU(int, ipi_dev); 358 359 int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq) 360 { 361 int *dev = per_cpu_ptr(&ipi_dev, cpu); 362 unsigned int virq = irq_find_mapping(NULL, hwirq); 363 364 if (!virq) 365 panic("Cannot find virq for root domain and hwirq=%lu", hwirq); 366 367 /* Boot cpu calls request, all call enable */ 368 if (!cpu) { 369 int rc; 370 371 rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev); 372 if (rc) 373 panic("Percpu IRQ request failed for %u\n", virq); 374 } 375 376 enable_percpu_irq(virq, 0); 377 378 return 0; 379 } 380