1 /* 2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #include <linux/seq_file.h> 10 #include <linux/fs.h> 11 #include <linux/delay.h> 12 #include <linux/root_dev.h> 13 #include <linux/console.h> 14 #include <linux/module.h> 15 #include <linux/cpu.h> 16 #include <linux/of_fdt.h> 17 #include <linux/cache.h> 18 #include <asm/sections.h> 19 #include <asm/arcregs.h> 20 #include <asm/tlb.h> 21 #include <asm/setup.h> 22 #include <asm/page.h> 23 #include <asm/irq.h> 24 #include <asm/unwind.h> 25 #include <asm/clk.h> 26 #include <asm/mach_desc.h> 27 28 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x)) 29 30 int running_on_hw = 1; /* vs. on ISS */ 31 32 char __initdata command_line[COMMAND_LINE_SIZE]; 33 const struct machine_desc *machine_desc; 34 35 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */ 36 37 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; 38 39 static void read_arc_build_cfg_regs(void) 40 { 41 struct bcr_perip uncached_space; 42 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 43 FIX_PTR(cpu); 44 45 READ_BCR(AUX_IDENTITY, cpu->core); 46 47 cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR); 48 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); 49 50 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); 51 cpu->uncached_base = uncached_space.start << 24; 52 53 cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR); 54 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR); 55 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR); 56 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR); 57 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR); 58 READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul); 59 60 cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR); 61 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR); 62 63 /* Note that we read the CCM BCRs independent of kernel config 64 * This is to catch the cases where user doesn't know that 65 * CCMs are present in hardware build 66 */ 67 { 68 struct bcr_iccm iccm; 69 struct bcr_dccm dccm; 70 struct bcr_dccm_base dccm_base; 71 unsigned int bcr_32bit_val; 72 73 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR); 74 if (bcr_32bit_val) { 75 iccm = *((struct bcr_iccm *)&bcr_32bit_val); 76 cpu->iccm.base_addr = iccm.base << 16; 77 cpu->iccm.sz = 0x2000 << (iccm.sz - 1); 78 } 79 80 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR); 81 if (bcr_32bit_val) { 82 dccm = *((struct bcr_dccm *)&bcr_32bit_val); 83 cpu->dccm.sz = 0x800 << (dccm.sz); 84 85 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base); 86 cpu->dccm.base_addr = dccm_base.addr << 8; 87 } 88 } 89 90 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem); 91 92 read_decode_mmu_bcr(); 93 read_decode_cache_bcr(); 94 95 READ_BCR(ARC_REG_FP_BCR, cpu->fp); 96 READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp); 97 } 98 99 static const struct cpuinfo_data arc_cpu_tbl[] = { 100 { {0x10, "ARCTangent A5"}, 0x1F}, 101 { {0x20, "ARC 600" }, 0x2F}, 102 { {0x30, "ARC 700" }, 0x33}, 103 { {0x34, "ARC 700 R4.10"}, 0x34}, 104 { {0x00, NULL } } 105 }; 106 107 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len) 108 { 109 int n = 0; 110 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 111 struct bcr_identity *core = &cpu->core; 112 const struct cpuinfo_data *tbl; 113 int be = 0; 114 #ifdef CONFIG_CPU_BIG_ENDIAN 115 be = 1; 116 #endif 117 FIX_PTR(cpu); 118 119 n += scnprintf(buf + n, len - n, 120 "\nARC IDENTITY\t: Family [%#02x]" 121 " Cpu-id [%#02x] Chip-id [%#4x]\n", 122 core->family, core->cpu_id, 123 core->chip_id); 124 125 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) { 126 if ((core->family >= tbl->info.id) && 127 (core->family <= tbl->up_range)) { 128 n += scnprintf(buf + n, len - n, 129 "processor\t: %s %s\n", 130 tbl->info.str, 131 be ? "[Big Endian]" : ""); 132 break; 133 } 134 } 135 136 if (tbl->info.id == 0) 137 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n"); 138 139 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n", 140 (unsigned int)(arc_get_core_freq() / 1000000), 141 (unsigned int)(arc_get_core_freq() / 10000) % 100); 142 143 n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n", 144 (cpu->timers & 0x200) ? "TIMER1" : "", 145 (cpu->timers & 0x100) ? "TIMER0" : ""); 146 147 n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n", 148 cpu->vec_base); 149 150 n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n", 151 cpu->uncached_base); 152 153 return buf; 154 } 155 156 static const struct id_to_str mul_type_nm[] = { 157 { 0x0, "N/A"}, 158 { 0x1, "32x32 (spl Result Reg)" }, 159 { 0x2, "32x32 (ANY Result Reg)" } 160 }; 161 162 static const struct id_to_str mac_mul_nm[] = { 163 {0x0, "N/A"}, 164 {0x1, "N/A"}, 165 {0x2, "Dual 16 x 16"}, 166 {0x3, "N/A"}, 167 {0x4, "32x16"}, 168 {0x5, "N/A"}, 169 {0x6, "Dual 16x16 and 32x16"} 170 }; 171 172 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len) 173 { 174 int n = 0; 175 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 176 177 FIX_PTR(cpu); 178 #define IS_AVAIL1(var, str) ((var) ? str : "") 179 #define IS_AVAIL2(var, str) ((var == 0x2) ? str : "") 180 #define IS_USED(cfg) (IS_ENABLED(cfg) ? "(in-use)" : "(not used)") 181 182 n += scnprintf(buf + n, len - n, 183 "Extn [700-Base]\t: %s %s %s %s %s %s\n", 184 IS_AVAIL2(cpu->extn.norm, "norm,"), 185 IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"), 186 IS_AVAIL1(cpu->extn.swap, "swap,"), 187 IS_AVAIL2(cpu->extn.minmax, "minmax,"), 188 IS_AVAIL1(cpu->extn.crc, "crc,"), 189 IS_AVAIL2(cpu->extn.ext_arith, "ext-arith")); 190 191 n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s", 192 mul_type_nm[cpu->extn.mul].str); 193 194 n += scnprintf(buf + n, len - n, " MAC MPY: %s\n", 195 mac_mul_nm[cpu->extn_mac_mul.type].str); 196 197 if (cpu->core.family == 0x34) { 198 n += scnprintf(buf + n, len - n, 199 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n", 200 IS_USED(CONFIG_ARC_HAS_LLSC), 201 IS_USED(CONFIG_ARC_HAS_SWAPE), 202 IS_USED(CONFIG_ARC_HAS_RTSC)); 203 } 204 205 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s", 206 !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : ""); 207 208 if (cpu->dccm.sz) 209 n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ", 210 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz)); 211 212 if (cpu->iccm.sz) 213 n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB", 214 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz)); 215 216 n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s", 217 !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : ""); 218 219 if (cpu->fp.ver) 220 n += scnprintf(buf + n, len - n, "SP [v%d] %s", 221 cpu->fp.ver, cpu->fp.fast ? "(fast)" : ""); 222 223 if (cpu->dpfp.ver) 224 n += scnprintf(buf + n, len - n, "DP [v%d] %s", 225 cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : ""); 226 227 n += scnprintf(buf + n, len - n, "\n"); 228 229 n += scnprintf(buf + n, len - n, 230 "OS ABI [v3]\t: no-legacy-syscalls\n"); 231 232 return buf; 233 } 234 235 static void arc_chk_ccms(void) 236 { 237 #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM) 238 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 239 240 #ifdef CONFIG_ARC_HAS_DCCM 241 /* 242 * DCCM can be arbit placed in hardware. 243 * Make sure it's placement/sz matches what Linux is built with 244 */ 245 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr) 246 panic("Linux built with incorrect DCCM Base address\n"); 247 248 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz) 249 panic("Linux built with incorrect DCCM Size\n"); 250 #endif 251 252 #ifdef CONFIG_ARC_HAS_ICCM 253 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz) 254 panic("Linux built with incorrect ICCM Size\n"); 255 #endif 256 #endif 257 } 258 259 /* 260 * Ensure that FP hardware and kernel config match 261 * -If hardware contains DPFP, kernel needs to save/restore FPU state 262 * across context switches 263 * -If hardware lacks DPFP, but kernel configured to save FPU state then 264 * kernel trying to access non-existant DPFP regs will crash 265 * 266 * We only check for Dbl precision Floating Point, because only DPFP 267 * hardware has dedicated regs which need to be saved/restored on ctx-sw 268 * (Single Precision uses core regs), thus kernel is kind of oblivious to it 269 */ 270 static void arc_chk_fpu(void) 271 { 272 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 273 274 if (cpu->dpfp.ver) { 275 #ifndef CONFIG_ARC_FPU_SAVE_RESTORE 276 pr_warn("DPFP support broken in this kernel...\n"); 277 #endif 278 } else { 279 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE 280 panic("H/w lacks DPFP support, apps won't work\n"); 281 #endif 282 } 283 } 284 285 /* 286 * Initialize and setup the processor core 287 * This is called by all the CPUs thus should not do special case stuff 288 * such as only for boot CPU etc 289 */ 290 291 void setup_processor(void) 292 { 293 char str[512]; 294 int cpu_id = smp_processor_id(); 295 296 read_arc_build_cfg_regs(); 297 arc_init_IRQ(); 298 299 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str))); 300 301 arc_mmu_init(); 302 arc_cache_init(); 303 arc_chk_ccms(); 304 305 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str))); 306 307 #ifdef CONFIG_SMP 308 printk(arc_platform_smp_cpuinfo()); 309 #endif 310 311 arc_chk_fpu(); 312 } 313 314 void __init setup_arch(char **cmdline_p) 315 { 316 /* This also populates @boot_command_line from /bootargs */ 317 machine_desc = setup_machine_fdt(__dtb_start); 318 if (!machine_desc) 319 panic("Embedded DT invalid\n"); 320 321 /* Append any u-boot provided cmdline */ 322 #ifdef CONFIG_CMDLINE_UBOOT 323 /* Add a whitespace seperator between the 2 cmdlines */ 324 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); 325 strlcat(boot_command_line, command_line, COMMAND_LINE_SIZE); 326 #endif 327 328 /* Save unparsed command line copy for /proc/cmdline */ 329 *cmdline_p = boot_command_line; 330 331 /* To force early parsing of things like mem=xxx */ 332 parse_early_param(); 333 334 /* Platform/board specific: e.g. early console registration */ 335 if (machine_desc->init_early) 336 machine_desc->init_early(); 337 338 setup_processor(); 339 340 #ifdef CONFIG_SMP 341 smp_init_cpus(); 342 #endif 343 344 setup_arch_memory(); 345 346 /* copy flat DT out of .init and then unflatten it */ 347 unflatten_and_copy_device_tree(); 348 349 /* Can be issue if someone passes cmd line arg "ro" 350 * But that is unlikely so keeping it as it is 351 */ 352 root_mountflags &= ~MS_RDONLY; 353 354 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE) 355 conswitchp = &dummy_con; 356 #endif 357 358 arc_unwind_init(); 359 arc_unwind_setup(); 360 } 361 362 static int __init customize_machine(void) 363 { 364 /* Add platform devices */ 365 if (machine_desc->init_machine) 366 machine_desc->init_machine(); 367 368 return 0; 369 } 370 arch_initcall(customize_machine); 371 372 static int __init init_late_machine(void) 373 { 374 if (machine_desc->init_late) 375 machine_desc->init_late(); 376 377 return 0; 378 } 379 late_initcall(init_late_machine); 380 /* 381 * Get CPU information for use by the procfs. 382 */ 383 384 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c))) 385 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p)) 386 387 static int show_cpuinfo(struct seq_file *m, void *v) 388 { 389 char *str; 390 int cpu_id = ptr_to_cpu(v); 391 392 str = (char *)__get_free_page(GFP_TEMPORARY); 393 if (!str) 394 goto done; 395 396 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 397 398 seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n", 399 loops_per_jiffy / (500000 / HZ), 400 (loops_per_jiffy / (5000 / HZ)) % 100); 401 402 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 403 404 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE)); 405 406 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE)); 407 408 #ifdef CONFIG_SMP 409 seq_printf(m, arc_platform_smp_cpuinfo()); 410 #endif 411 412 free_page((unsigned long)str); 413 done: 414 seq_printf(m, "\n\n"); 415 416 return 0; 417 } 418 419 static void *c_start(struct seq_file *m, loff_t *pos) 420 { 421 /* 422 * Callback returns cpu-id to iterator for show routine, NULL to stop. 423 * However since NULL is also a valid cpu-id (0), we use a round-about 424 * way to pass it w/o having to kmalloc/free a 2 byte string. 425 * Encode cpu-id as 0xFFcccc, which is decoded by show routine. 426 */ 427 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL; 428 } 429 430 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 431 { 432 ++*pos; 433 return c_start(m, pos); 434 } 435 436 static void c_stop(struct seq_file *m, void *v) 437 { 438 } 439 440 const struct seq_operations cpuinfo_op = { 441 .start = c_start, 442 .next = c_next, 443 .stop = c_stop, 444 .show = show_cpuinfo 445 }; 446 447 static DEFINE_PER_CPU(struct cpu, cpu_topology); 448 449 static int __init topology_init(void) 450 { 451 int cpu; 452 453 for_each_present_cpu(cpu) 454 register_cpu(&per_cpu(cpu_topology, cpu), cpu); 455 456 return 0; 457 } 458 459 subsys_initcall(topology_init); 460